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rba done w/o wordline

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This commit is contained in:
Jesse Cirimelli-Low
2023-08-24 02:55:45 -07:00
parent 64b0cd25d7
commit 036cc54b99
11 changed files with 208 additions and 1539 deletions
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compiler/modules/bitcell_base_array.py
+3 -2
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@@ -158,9 +158,10 @@ class bitcell_base_array(design):
height=wl_pin.height())
def route_supplies(self):
for inst in self.cell_inst.values():
for inst in self.insts:
for pin_name in ["vdd", "gnd"]:
self.copy_layout_pin(inst, pin_name)
if pin_name in inst.mod.get_pin_names():
self.copy_layout_pin(inst, pin_name)
def add_layout_pins(self):
""" Add the layout pins """