Clean up tests. Enable 8-way tests. Some tests still have channel route conflicts.

compiler/tests/19_multi_bank_test.py

@@ -18,22 +18,22 @@ class multi_bank_test(openram_test):
         global verify
         import verify
 
-        import bank
+        from bank import bank
 
         debug.info(1, "No column mux")
-        a = bank.bank(word_size=4, num_words=16, words_per_row=1, num_banks=2, name="bank1_multi")
+        a = bank(word_size=4, num_words=16, words_per_row=1, num_banks=2, name="bank1_multi")
         self.local_check(a)
 
         debug.info(1, "Two way column mux")
-        a = bank.bank(word_size=4, num_words=32, words_per_row=2, num_banks=2, name="bank2_multi")
+        a = bank(word_size=4, num_words=32, words_per_row=2, num_banks=2, name="bank2_multi")
         self.local_check(a)
 
         debug.info(1, "Four way column mux")
-        a = bank.bank(word_size=4, num_words=64, words_per_row=4, num_banks=2, name="bank3_multi")
+        a = bank(word_size=4, num_words=64, words_per_row=4, num_banks=2, name="bank3_multi")
         self.local_check(a)
 
         debug.info(1, "Eight way column mux")
-        a = bank.bank(word_size=2, num_words=128, words_per_row=8, num_banks=2, name="bank4_multi")
+        a = bank(word_size=2, num_words=128, words_per_row=8, num_banks=2, name="bank4_multi")
         self.local_check(a)
         
         globals.end_openram()

compiler/tests/19_single_bank_test.py

@@ -18,23 +18,23 @@ class single_bank_test(openram_test):
         global verify
         import verify
 
-        import bank
+        from bank import bank
 
         debug.info(1, "No column mux")
-        a = bank.bank(word_size=4, num_words=16, words_per_row=1, num_banks=1, name="bank1_single")
+        a = bank(word_size=4, num_words=16, words_per_row=1, num_banks=1, name="bank1_single")
         self.local_check(a)
 
         debug.info(1, "Two way column mux")
-        a = bank.bank(word_size=4, num_words=32, words_per_row=2, num_banks=1, name="bank2_single")
+        a = bank(word_size=4, num_words=32, words_per_row=2, num_banks=1, name="bank2_single")
         self.local_check(a)
 
         debug.info(1, "Four way column mux")
-        a = bank.bank(word_size=4, num_words=64, words_per_row=4, num_banks=1, name="bank3_single")
+        a = bank(word_size=4, num_words=64, words_per_row=4, num_banks=1, name="bank3_single")
         self.local_check(a)
 
         # Eight way has a short circuit of one column mux select to gnd rail
         debug.info(1, "Eight way column mux")
-        a = bank.bank(word_size=2, num_words=128, words_per_row=8, num_banks=1, name="bank4_single")
+        a = bank(word_size=2, num_words=128, words_per_row=8, num_banks=1, name="bank4_single")
         self.local_check(a)
         
         globals.end_openram()

compiler/tests/20_sram_1bank_test.py

@@ -18,23 +18,23 @@ class sram_1bank_test(openram_test):
         global verify
         import verify
 
-        import sram
+        from sram import sram
 
         debug.info(1, "Single bank, no column mux with control logic")
-        a = sram.sram(word_size=4, num_words=16, num_banks=1, name="sram1")
+        a = sram(word_size=4, num_words=16, num_banks=1, name="sram1")
         self.local_check(a, final_verification=True)
 
         debug.info(1, "Single bank two way column mux with control logic")
-        a = sram.sram(word_size=4, num_words=32, num_banks=1, name="sram2")
+        a = sram(word_size=4, num_words=32, num_banks=1, name="sram2")
         self.local_check(a, final_verification=True)
 
         debug.info(1, "Single bank, four way column mux with control logic")
-        a = sram.sram(word_size=4, num_words=64, num_banks=1, name="sram3")
+        a = sram(word_size=4, num_words=64, num_banks=1, name="sram3")
         self.local_check(a, final_verification=True)
 
-        # debug.info(1, "Single bank, eight way column mux with control logic")
+        debug.info(1, "Single bank, eight way column mux with control logic")
-        # a = sram.sram(word_size=2, num_words=128, num_banks=1, name="sram4")
+        a = sram(word_size=2, num_words=128, num_banks=1, name="sram4")
-        # self.local_check(a, final_verification=True)
+        self.local_check(a, final_verification=True)
         
         globals.end_openram()
         

compiler/tests/20_sram_2bank_test.py

@@ -19,23 +19,23 @@ class sram_2bank_test(openram_test):
         global verify
         import verify
 
-        import sram
+        from sram import sram
 
         debug.info(1, "Two bank, no column mux with control logic")
-        a = sram.sram(word_size=16, num_words=32, num_banks=2, name="sram1")
+        a = sram(word_size=16, num_words=32, num_banks=2, name="sram1")
         self.local_check(a, final_verification=True)
 
         debug.info(1, "Two bank two way column mux with control logic")
-        a = sram.sram(word_size=16, num_words=64, num_banks=2, name="sram2")
+        a = sram(word_size=16, num_words=64, num_banks=2, name="sram2")
         self.local_check(a, final_verification=True)
 
         debug.info(1, "Two bank, four way column mux with control logic")
-        a = sram.sram(word_size=16, num_words=128, num_banks=2, name="sram3")
+        a = sram(word_size=16, num_words=128, num_banks=2, name="sram3")
         self.local_check(a, final_verification=True)
 
-        # debug.info(1, "Two bank, eight way column mux with control logic")
+        debug.info(1, "Two bank, eight way column mux with control logic")
-        # a = sram.sram(word_size=2, num_words=256 num_banks=2, name="sram4")
+        a = sram(word_size=2, num_words=256 num_banks=2, name="sram4")
-        # self.local_check(a, final_verification=True)
+        self.local_check(a, final_verification=True)
 
         globals.end_openram()
         

compiler/tests/20_sram_4bank_test.py

@@ -19,23 +19,23 @@ class sram_4bank_test(openram_test):
         global verify
         import verify
 
-        import sram
+        from sram import sram
 
         debug.info(1, "Four bank, no column mux with control logic")
-        a = sram.sram(word_size=16, num_words=64, num_banks=4, name="sram1")
+        a = sram(word_size=16, num_words=64, num_banks=4, name="sram1")
         self.local_check(a, final_verification=True)
 
         debug.info(1, "Four bank two way column mux with control logic")
-        a = sram.sram(word_size=16, num_words=128, num_banks=4, name="sram2")
+        a = sram(word_size=16, num_words=128, num_banks=4, name="sram2")
         self.local_check(a, final_verification=True)
 
         debug.info(1, "Four bank, four way column mux with control logic")
-        a = sram.sram(word_size=16, num_words=256, num_banks=4, name="sram3")
+        a = sram(word_size=16, num_words=256, num_banks=4, name="sram3")
         self.local_check(a, final_verification=True)
 
-        # debug.info(1, "Four bank, eight way column mux with control logic")
+        debug.info(1, "Four bank, eight way column mux with control logic")
-        # a = sram.sram(word_size=2, num_words=256, num_banks=4, name="sram4")
+        a = sram.sram(word_size=2, num_words=256, num_banks=4, name="sram4")
-        # self.local_check(a, final_verification=True)
+        self.local_check(a, final_verification=True)
 
         globals.end_openram()