mirror of https://github.com/VLSIDA/OpenRAM.git
22 lines
875 B
SourcePawn
22 lines
875 B
SourcePawn
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.SUBCKT write_driver din bl br wen vdd gnd
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*inverters for enable and data input
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minP bl_bar din vdd vdd pmos_vtg w=360.000000n l=50.000000n
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minN bl_bar din gnd gnd nmos_vtg w=180.000000n l=50.000000n
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moutP wen_bar wen vdd vdd pmos_vtg w=360.000000n l=50.000000n
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moutN wen_bar wen gnd gnd nmos_vtg w=180.000000n l=50.000000n
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*tristate for BL
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mout0P int1 bl_bar vdd vdd pmos_vtg w=360.000000n l=50.000000n
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mout0P2 bl wen_bar int1 vdd pmos_vtg w=360.000000n l=50.000000n
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mout0N bl wen int2 gnd nmos_vtg w=180.000000n l=50.000000n
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mout0N2 int2 bl_bar gnd gnd nmos_vtg w=180.000000n l=50.000000n
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*tristate for BR
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mout1P int3 din vdd vdd pmos_vtg w=360.000000n l=50.000000n
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mout1P2 br wen_bar int3 vdd pmos_vtg w=360.000000n l=50.000000n
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mout1N br wen int4 gnd nmos_vtg w=180.000000n l=50.000000n
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mout1N2 int4 din gnd gnd nmos_vtg w=180.000000n l=50.000000n
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.ENDS write_driver
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