mirror of https://github.com/VLSIDA/OpenRAM.git
18 lines
683 B
Tcl
18 lines
683 B
Tcl
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# Setup file for netgen
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ignore class c
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equate class {-circuit1 nfet} {-circuit2 n}
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equate class {-circuit1 pfet} {-circuit2 p}
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# This circuit has symmetries and needs to be flattened to resolve them
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# or the banks won't pass
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flatten class {-circuit1 bitcell_array_0}
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flatten class {-circuit1 bitcell_array_1}
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#flatten class {-circuit1 precharge_array_0}
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#flatten class {-circuit1 precharge_array_1}
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#flatten class {-circuit1 precharge_array_2}
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#flatten class {-circuit1 precharge_array_3}
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property {-circuit1 nfet} remove as ad ps pd
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property {-circuit1 pfet} remove as ad ps pd
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property {-circuit2 n} remove as ad ps pd
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property {-circuit2 p} remove as ad ps pd
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permute transistors
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