mirror of https://github.com/VLSIDA/OpenRAM.git
45 lines
1.4 KiB
Plaintext
45 lines
1.4 KiB
Plaintext
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# SUE version MMI_SUE5.0.7
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proc SCHEMATIC_write_driver {} {
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make inout -name BL -origin {550 260}
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make inout -name BR -origin {830 250}
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make inverter -WP 2.1u -LP 0.6u -WN 1.2u -LN 0.6u -origin {280 520}
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make nand2 -WP 2.1u -WN 2.1u -origin {90 360}
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make inverter -WP 2.1u -LP 0.6u -WN 1.2u -LN 0.6u -origin {270 360}
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make nmos -W 3.6u -L 0.6u -origin {830 410}
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make nmos -W 3.6u -L 0.6u -origin {710 610}
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make global -name gnd -origin {710 690}
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make nand2 -WP 2.1u -WN 2.1u -origin {90 520}
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make nmos -W 3.6u -L 0.6u -origin {550 410}
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make input -name wen -origin {-290 340}
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make input -name din -origin {-290 380}
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make inverter -WP 2.1u -LP 0.6u -WN 1.2u -LN 0.6u -origin {-80 540}
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make_wire 160 360 240 360
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make_wire 830 250 830 370
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make_wire 550 260 550 370
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make_wire 550 450 550 560
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make_wire 550 560 710 560
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make_wire 710 560 710 570
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make_wire 710 560 830 560
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make_wire 830 560 830 450
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make_wire 710 650 710 690
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make_wire 250 520 160 520
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make_wire 770 410 770 520
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make_wire 770 520 330 520
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make_wire 320 360 490 360
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make_wire 490 360 490 410
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make_wire -180 380 -290 380
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make_wire -180 380 70 380
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make_wire -180 540 -110 540
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make_wire -180 380 -180 540
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make_wire -30 540 70 540
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make_wire 20 340 20 500
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make_wire 20 500 70 500
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make_wire 20 340 70 340
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make_wire -240 340 -240 610
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make_wire -240 610 650 610
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make_wire -240 340 20 340
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make_wire -240 340 -290 340
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}
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