2018-05-12 01:32:00 +02:00
|
|
|
#!/usr/bin/env python3
|
2016-11-08 18:57:35 +01:00
|
|
|
"""
|
2018-05-12 01:32:00 +02:00
|
|
|
Run a regression test on a 2 bank SRAM
|
2016-11-08 18:57:35 +01:00
|
|
|
"""
|
|
|
|
|
|
|
|
|
|
import unittest
|
2018-01-30 01:59:29 +01:00
|
|
|
from testutils import header,openram_test
|
2016-11-08 18:57:35 +01:00
|
|
|
import sys,os
|
|
|
|
|
sys.path.append(os.path.join(sys.path[0],".."))
|
|
|
|
|
import globals
|
2017-11-16 22:52:58 +01:00
|
|
|
from globals import OPTS
|
2016-11-08 18:57:35 +01:00
|
|
|
import debug
|
|
|
|
|
|
2018-05-12 01:32:00 +02:00
|
|
|
@unittest.skip("Multibank is not working yet.")
|
2018-01-30 01:59:29 +01:00
|
|
|
class sram_2bank_test(openram_test):
|
2016-11-08 18:57:35 +01:00
|
|
|
|
|
|
|
|
def runTest(self):
|
|
|
|
|
globals.init_openram("config_20_{0}".format(OPTS.tech_name))
|
2018-01-12 19:24:49 +01:00
|
|
|
global verify
|
|
|
|
|
import verify
|
2016-11-08 18:57:35 +01:00
|
|
|
|
2018-07-18 00:13:00 +02:00
|
|
|
from sram import sram
|
2016-11-08 18:57:35 +01:00
|
|
|
|
2017-09-14 00:46:41 +02:00
|
|
|
debug.info(1, "Two bank, no column mux with control logic")
|
2018-07-18 00:13:00 +02:00
|
|
|
a = sram(word_size=16, num_words=32, num_banks=2, name="sram1")
|
2018-02-05 23:52:51 +01:00
|
|
|
self.local_check(a, final_verification=True)
|
2016-11-08 18:57:35 +01:00
|
|
|
|
2017-09-14 00:46:41 +02:00
|
|
|
debug.info(1, "Two bank two way column mux with control logic")
|
2018-07-18 00:13:00 +02:00
|
|
|
a = sram(word_size=16, num_words=64, num_banks=2, name="sram2")
|
2018-02-05 23:52:51 +01:00
|
|
|
self.local_check(a, final_verification=True)
|
2017-09-14 00:46:41 +02:00
|
|
|
|
|
|
|
|
debug.info(1, "Two bank, four way column mux with control logic")
|
2018-07-18 00:13:00 +02:00
|
|
|
a = sram(word_size=16, num_words=128, num_banks=2, name="sram3")
|
2018-02-05 23:52:51 +01:00
|
|
|
self.local_check(a, final_verification=True)
|
2017-09-14 00:46:41 +02:00
|
|
|
|
2018-07-18 00:13:00 +02:00
|
|
|
debug.info(1, "Two bank, eight way column mux with control logic")
|
|
|
|
|
a = sram(word_size=2, num_words=256 num_banks=2, name="sram4")
|
|
|
|
|
self.local_check(a, final_verification=True)
|
2017-09-14 00:46:41 +02:00
|
|
|
|
2016-11-11 23:05:14 +01:00
|
|
|
globals.end_openram()
|
|
|
|
|
|
2016-11-08 18:57:35 +01:00
|
|
|
# instantiate a copy of the class to actually run the test
|
|
|
|
|
if __name__ == "__main__":
|
|
|
|
|
(OPTS, args) = globals.parse_args()
|
|
|
|
|
del sys.argv[1:]
|
|
|
|
|
header(__file__, OPTS.tech_name)
|
|
|
|
|
unittest.main()
|