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luke / verilator
SystemVerilog 0 0
Verilator open-source SystemVerilog simulator and lint system
rtl verilog cpp compilers verilog-simulator verilator systemc system-verilog
Updated 2026-06-14 19:36:49 +02:00
luke / sv2v
Haskell 0 0
SystemVerilog to Verilog conversion
verilog yosys systemverilog conversion
Updated 2026-03-27 23:46:29 +01:00