diff --git a/VHDL-frontend-efforts.md b/VHDL-frontend-efforts.md index ce78c0c..0a5b203 100644 --- a/VHDL-frontend-efforts.md +++ b/VHDL-frontend-efforts.md @@ -1,2 +1,2 @@ -* https://github.com/tgingold/ghdlsynth-beta +* GHDL-synth: https://github.com/tgingold/ghdlsynth-beta Requires a minor patch to the yosys Makefile. Most of the heavy lifting is actually done in https://github.com/ghdl/ghdl/tree/master/src/synth \ No newline at end of file