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16 Commits

Author SHA1 Message Date
Krystine Sherwin 11edbf52d5
analogdevices: Use dump_meminit 
Add `INIT_FILE` and `SIM_INIT_BEHAVIOR` parameters.
Add `init any` to non-full ADI ram blocks.
 2025-11-14 10:14:36 +13:00
Lofty 8ff0039141 analogdevices: ignore $assert cells 2025-11-12 22:44:12 +00:00
Krystine Sherwin 801db868a9 analogdevices: Add BRAM options 
Enable `-force-params`, and tidy up lutram mapping too.
 2025-11-12 22:44:12 +00:00
Lofty ae34fcb82c analogdevices: DSP tweaks 2025-11-12 22:44:12 +00:00
Lofty e189ee10aa analogdevices: DSP inference 2025-11-12 22:44:12 +00:00
Lofty a1a0926316 analogdevices: remove cells_xtra 2025-11-12 22:44:12 +00:00
Lofty 764c2e160b analogdevices: use single tech param 2025-11-12 22:44:12 +00:00
Lofty 0b6aea3ed9 analogdevices: expreso does not care about clock buffers 2025-11-12 22:44:12 +00:00
Lofty 6c4327da04 analogdevices: prepare for t40lp timings 2025-11-12 22:44:12 +00:00
Krystine Sherwin 4690ef36ce analogdevices: Adding RBRAM2 and -tech 2025-11-12 22:44:12 +00:00
Krystine Sherwin 9d887dbc81 analogdevices: (some) Native BRAM 
Specifically, the SDP configurations for RBRAM (ignoring 2048x09 because it makes the memlib format unhappy).
Drop the unused defines from the synth pass.
Remove comments from the lutram files referencing xilinx.
 2025-11-12 22:44:12 +00:00
Lofty 59cde69540 analogdevices: LUTRAM config 2025-11-12 22:44:12 +00:00
Lofty 3870976bcc analogdevices: update timing model 2025-11-12 22:44:12 +00:00
Lofty 8651e3ac89 test suite 2025-11-12 22:44:11 +00:00
Lofty 28600c7f9f synth_analogdevices: remove scopeinfo cells 2025-11-12 22:44:11 +00:00
Lofty 384964bcf7 Create synth_analogdevices 2025-11-12 22:44:11 +00:00