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16,153 Commits 120 Branches 61 Tags 71 MiB
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16 Commits

Author SHA1 Message Date
Krystine Sherwin eb2b57b084
analogdevices: Use dump_meminit 
Add `INIT_FILE` and `SIM_INIT_BEHAVIOR` parameters.
Add `init any` to non-full ADI ram blocks.
 2025-11-10 17:23:41 +13:00
Lofty 22e04ac81e analogdevices: ignore $assert cells 2025-11-09 15:44:35 +00:00
Krystine Sherwin 2ab84648b4 analogdevices: Add BRAM options 
Enable `-force-params`, and tidy up lutram mapping too.
 2025-11-09 15:44:35 +00:00
Lofty 8101eca236 analogdevices: DSP tweaks 2025-11-09 15:44:35 +00:00
Lofty 0261d18759 analogdevices: DSP inference 2025-11-09 15:44:35 +00:00
Lofty d62d789ce4 analogdevices: remove cells_xtra 2025-11-09 15:44:35 +00:00
Lofty 47c5a52674 analogdevices: use single tech param 2025-11-09 15:44:35 +00:00
Lofty 4aa5008c56 analogdevices: expreso does not care about clock buffers 2025-11-09 15:44:35 +00:00
Lofty 3e1ca2f3e6 analogdevices: prepare for t40lp timings 2025-11-09 15:44:35 +00:00
Krystine Sherwin dc76af06a0 analogdevices: Adding RBRAM2 and -tech 2025-11-09 15:44:34 +00:00
Krystine Sherwin 3f90865a28 analogdevices: (some) Native BRAM 
Specifically, the SDP configurations for RBRAM (ignoring 2048x09 because it makes the memlib format unhappy).
Drop the unused defines from the synth pass.
Remove comments from the lutram files referencing xilinx.
 2025-11-09 15:44:34 +00:00
Lofty a2983851f0 analogdevices: LUTRAM config 2025-11-09 15:44:34 +00:00
Lofty 2b384b8d53 analogdevices: update timing model 2025-11-09 15:44:34 +00:00
Lofty 9f26034176 test suite 2025-11-09 15:44:34 +00:00
Lofty a1d13843ad synth_analogdevices: remove scopeinfo cells 2025-11-09 15:44:34 +00:00
Lofty f4c003b1c5 Create synth_analogdevices 2025-11-09 15:44:34 +00:00