diff --git a/passes/techmap/abc.cc b/passes/techmap/abc.cc
index 88d3ba1a9..4f9fb3a95 100644
--- a/passes/techmap/abc.cc
+++ b/passes/techmap/abc.cc
@@ -146,6 +146,7 @@ struct AbcConfig
 	bool cmos_cost = false;
 	int max_threads = -1;    // -1 means auto (use number of modules)
 	int reserved_cores = 4;  // cores reserved for main thread and other work
+	bool abc_node_retention = false; // retain nodes in ABC (off by default)
 };
 
 struct AbcSigVal {
@@ -991,7 +992,7 @@ void AbcModuleState::prepare_module(RTLIL::Design *design, RTLIL::Module *module
 	log_header(design, "Extracting gate netlist of module `%s' to `%s/input.blif'..\n",
 			module->name.c_str(), replace_tempdir(run_abc.tempdir_name, run_abc.tempdir_name, config.show_tempdir).c_str());
 
-	std::string abc_script = stringf("read_blif \"%s/input.blif\"; ", run_abc.tempdir_name);
+	std::string abc_script = stringf("read_blif " + (config.abc_node_retention ? " -r" : "") + " \"%s/input.blif\"; ", run_abc.tempdir_name);
 
 	if (!config.liberty_files.empty() || !config.genlib_files.empty()) {
 		std::string dont_use_args;
@@ -2084,7 +2085,7 @@ struct AbcPass : public Pass {
 		config.map_mux16 = design->scratchpad_get_bool("abc.mux16", false);
 		config.abc_dress = design->scratchpad_get_bool("abc.dress", false);
 		g_arg = design->scratchpad_get_string("abc.g", g_arg);
-
+		config.abc_node_retention = design->scratchpad_get_bool("abc.node_retention", false);
 		config.fast_mode = design->scratchpad_get_bool("abc.fast", false);
 		bool dff_mode = design->scratchpad_get_bool("abc.dff", false);
 		std::string clk_str;