From bea80c06b997865dfbb6ed9c2876488bea45e62a Mon Sep 17 00:00:00 2001
From: "Emil J. Tywoniak" <emil@tywoniak.eu>
Date: Tue, 25 Nov 2025 16:11:05 +0100
Subject: [PATCH] newcelltypes: TurboCellTypes -> StaticCellTypes

---
 kernel/newcelltypes.h   | 2 +-
 passes/opt/opt_clean.cc | 8 ++++----
 passes/opt/opt_expr.cc  | 2 +-
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/kernel/newcelltypes.h b/kernel/newcelltypes.h
index df1c13960..92c947439 100644
--- a/kernel/newcelltypes.h
+++ b/kernel/newcelltypes.h
@@ -5,7 +5,7 @@
 
 YOSYS_NAMESPACE_BEGIN
 
-namespace TurboCellTypes {
+namespace StaticCellTypes {
 
 constexpr int MAX_CELLS = 300;
 constexpr int MAX_PORTS = 10;
diff --git a/passes/opt/opt_clean.cc b/passes/opt/opt_clean.cc
index e631c4655..d9ca996ac 100644
--- a/passes/opt/opt_clean.cc
+++ b/passes/opt/opt_clean.cc
@@ -102,9 +102,9 @@ struct keep_cache_t
 };
 
 keep_cache_t keep_cache;
-static constexpr auto ct_reg = TurboCellTypes::Categories::join(
-	TurboCellTypes::Compat::internals_mem_ff,
-	TurboCellTypes::categories.is_anyinit);
+static constexpr auto ct_reg = StaticCellTypes::Categories::join(
+	StaticCellTypes::Compat::internals_mem_ff,
+	StaticCellTypes::categories.is_anyinit);
 CellTypes ct_all;
 int count_rm_cells, count_rm_wires;
 
@@ -525,7 +525,7 @@ bool rmunused_module_init(RTLIL::Module *module, bool verbose)
 	dict<SigBit, State> qbits;
 
 	for (auto cell : module->cells())
-		if (TurboCellTypes::Compat::internals_mem_ff(cell->type) && cell->hasPort(ID::Q))
+		if (StaticCellTypes::Compat::internals_mem_ff(cell->type) && cell->hasPort(ID::Q))
 		{
 			SigSpec sig = cell->getPort(ID::Q);
 
diff --git a/passes/opt/opt_expr.cc b/passes/opt/opt_expr.cc
index 97079ceca..e8be360a8 100644
--- a/passes/opt/opt_expr.cc
+++ b/passes/opt/opt_expr.cc
@@ -433,7 +433,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
 		if (cell->type.in(ID($dffe), ID($adffe), ID($aldffe), ID($sdffe), ID($sdffce), ID($dffsre), ID($dlatch), ID($adlatch), ID($dlatchsr)))
 			handle_polarity_inv(cell, ID::EN, ID::EN_POLARITY, assign_map, invert_map);
 
-		if (!TurboCellTypes::Compat::stdcells_mem(cell->type))
+		if (!StaticCellTypes::Compat::stdcells_mem(cell->type))
 			continue;
 
 		handle_clkpol_celltype_swap(cell, "$_SR_N?_", "$_SR_P?_", ID::S, assign_map, invert_map);