diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index adfda7d5f..ead667cbd 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -2475,7 +2475,8 @@ namespace {
 			 *
 			 * Things to do after finalizing the cell interface:
 			 *    - Add support to kernel/satgen.h for the new cell type
-			 *    - Add to docs/source/CHAPTER_CellLib.rst (or just add a fixme to the bottom)
+			 *    - Maybe add v2 cell help fields (title, tags)
+			 *    - Add extra details to relevant docs/source/cell/word_*.rst (or just add a todo to the top)
 			 *    - Maybe add support to the Verilog backend for dumping such cells as expression
 			 *
 			 */