diff --git a/tests/arch/quicklogic/qlf_k6n10f/dsp.ys b/tests/arch/quicklogic/qlf_k6n10f/dsp.ys
index 1e652855b..90306084d 100644
--- a/tests/arch/quicklogic/qlf_k6n10f/dsp.ys
+++ b/tests/arch/quicklogic/qlf_k6n10f/dsp.ys
@@ -114,7 +114,7 @@ always @(posedge clk) begin
 end
 endmodule
 EOF
-read_verilog +/quicklogic/qlf_k6n10f/dsp_sim.v
+techmap -autoproc -map +/quicklogic/qlf_k6n10f/dsp_sim.v
 hierarchy -top testbench
 proc
 async2sync