From 808ec8c04b37e0e6c73b8873d4051c19dc41fa25 Mon Sep 17 00:00:00 2001
From: Maxim Kudinov <max.kudinov@proton.me>
Date: Sun, 25 Jan 2026 22:10:08 +0300
Subject: [PATCH] gowin: synth_gowin: Add MULT inference for GW1N and GW2A

---
 techlibs/gowin/Makefile.inc   |  1 +
 techlibs/gowin/dsp_map.v      | 70 +++++++++++++++++++++++++++++++++++
 techlibs/gowin/synth_gowin.cc | 44 +++++++++++++++++++++-
 3 files changed, 114 insertions(+), 1 deletion(-)
 create mode 100644 techlibs/gowin/dsp_map.v

diff --git a/techlibs/gowin/Makefile.inc b/techlibs/gowin/Makefile.inc
index df1b79317..0744b1389 100644
--- a/techlibs/gowin/Makefile.inc
+++ b/techlibs/gowin/Makefile.inc
@@ -12,3 +12,4 @@ $(eval $(call add_share_file,share/gowin,techlibs/gowin/brams_map_gw5a.v))
 $(eval $(call add_share_file,share/gowin,techlibs/gowin/brams.txt))
 $(eval $(call add_share_file,share/gowin,techlibs/gowin/lutrams_map.v))
 $(eval $(call add_share_file,share/gowin,techlibs/gowin/lutrams.txt))
+$(eval $(call add_share_file,share/gowin,techlibs/gowin/dsp_map.v))
diff --git a/techlibs/gowin/dsp_map.v b/techlibs/gowin/dsp_map.v
new file mode 100644
index 000000000..dfde0b6a1
--- /dev/null
+++ b/techlibs/gowin/dsp_map.v
@@ -0,0 +1,70 @@
+module \$__MUL9X9 (input [8:0] A, input [8:0] B, output [17:0] Y);
+
+    parameter A_WIDTH = 9;
+    parameter B_WIDTH = 9;
+    parameter Y_WIDTH = 18;
+    parameter A_SIGNED = 0;
+    parameter B_SIGNED = 0;
+
+    MULT9X9 __TECHMAP_REPLACE__ (
+	.CLK(1'b0),
+	.CE(1'b0),
+	.RESET(1'b0),
+	.A(A),
+	.SIA({A_WIDTH{1'b0}}),
+	.ASEL(1'b0),
+	.ASIGN(A_SIGNED ? 1'b1 : 1'b0),
+	.B(B),
+	.SIB({B_WIDTH{1'b0}}),
+	.BSEL(1'b0),
+	.BSIGN(B_SIGNED ? 1'b1 : 1'b0),
+	.DOUT(Y)
+    );
+
+endmodule
+
+module \$__MUL18X18 (input [17:0] A, input [17:0] B, output [35:0] Y);
+
+    parameter A_WIDTH = 18;
+    parameter B_WIDTH = 18;
+    parameter Y_WIDTH = 36;
+    parameter A_SIGNED = 0;
+    parameter B_SIGNED = 0;
+
+    MULT18X18 __TECHMAP_REPLACE__ (
+	.CLK(1'b0),
+	.CE(1'b0),
+	.RESET(1'b0),
+	.A(A),
+	.SIA({A_WIDTH{1'b0}}),
+	.ASEL(1'b0),
+	.ASIGN(A_SIGNED ? 1'b1 : 1'b0),
+	.B(B),
+	.SIB({B_WIDTH{1'b0}}),
+	.BSEL(1'b0),
+	.BSIGN(B_SIGNED ? 1'b1 : 1'b0),
+	.DOUT(Y)
+    );
+
+endmodule
+
+module \$__MUL36X36 (input [35:0] A, input [35:0] B, output [71:0] Y);
+
+    parameter A_WIDTH = 36;
+    parameter B_WIDTH = 36;
+    parameter Y_WIDTH = 72;
+    parameter A_SIGNED = 0;
+    parameter B_SIGNED = 0;
+
+    MULT36X36 __TECHMAP_REPLACE__ (
+	.CLK(1'b0),
+	.RESET(1'b0),
+	.CE(1'b0),
+	.A(A),
+	.ASIGN(A_SIGNED ? 1'b1 : 1'b0),
+	.B(B),
+	.BSIGN(B_SIGNED ? 1'b1 : 1'b0),
+	.DOUT(Y)
+    );
+
+endmodule
diff --git a/techlibs/gowin/synth_gowin.cc b/techlibs/gowin/synth_gowin.cc
index b9902659c..9cc213945 100644
--- a/techlibs/gowin/synth_gowin.cc
+++ b/techlibs/gowin/synth_gowin.cc
@@ -29,6 +29,21 @@ struct SynthGowinPass : public ScriptPass
 {
 	SynthGowinPass() : ScriptPass("synth_gowin", "synthesis for Gowin FPGAs") { }
 
+	struct DSPRule {
+		int a_maxwidth;
+		int b_maxwidth;
+		int a_minwidth;
+		int b_minwidth;
+		std::string prim;
+	};
+
+	const std::vector<DSPRule> dsp_rules = {
+		{36, 36, 22, 22, "$__MUL36X36"},
+		{18, 18, 10, 4, "$__MUL18X18"},
+		{18, 18, 4, 10, "$__MUL18X18"},
+		{9, 9, 4, 4, "$__MUL9X9"},
+	};
+
 	void help() override
 	{
 		//   |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
@@ -249,7 +264,34 @@ struct SynthGowinPass : public ScriptPass
 
 		if (check_label("coarse"))
 		{
-			run("synth -run coarse" + no_rw_check_opt);
+			run("proc");
+			run("opt_expr");
+			run("opt_clean");
+			run("check");
+			run("opt -nodffe -nosdff");
+			run("fsm");
+			run("opt");
+			run("wreduce");
+			run("peepopt");
+			run("opt_clean");
+			run("share");
+
+			if (help_mode) {
+				run("techmap -map +/mul2dsp.v [...]", "(if -family gw1n or gw2a)");
+				run("techmap -map +/gowin/dsp_map.v", "(if -family gw1n or gw2a)");
+			} else if (family == "gw1n" || family == "gw2a") {
+				for (const auto &rule : dsp_rules) {
+					run(stringf("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=%d -D DSP_B_MAXWIDTH=%d -D DSP_A_MINWIDTH=%d -D DSP_B_MINWIDTH=%d -D DSP_NAME=%s",
+						rule.a_maxwidth, rule.b_maxwidth, rule.a_minwidth, rule.b_minwidth, rule.prim));
+					run("chtype -set $mul t:$__soft_mul");
+				}
+				run("techmap -map +/gowin/dsp_map.v");
+			}
+
+			run("alumacc");
+			run("opt");
+			run("memory -nomap" + no_rw_check_opt);
+			run("opt_clean");
 		}
 
 		if (check_label("map_ram"))