diff --git a/techlibs/gowin/cells_xtra_gw2a.v b/techlibs/gowin/cells_xtra_gw2a.v
index 404a3e502..4453b9377 100644
--- a/techlibs/gowin/cells_xtra_gw2a.v
+++ b/techlibs/gowin/cells_xtra_gw2a.v
@@ -57,15 +57,15 @@ output  Q0, Q1;
 endmodule
 
 
-module IDES4_MEM(D, ICLK, FCLK, PCLK, WADDR, RADDR, RESET, CALIB, Q0, Q1, Q2, Q3);
-parameter GSREN = "false";
-parameter LSREN = "true";
-input D, ICLK, FCLK, PCLK;
-input [2:0] WADDR;
-input [2:0] RADDR;
-input RESET,CALIB;
-output Q0,Q1,Q2,Q3;
-endmodule
+//module IDES4_MEM(D, ICLK, FCLK, PCLK, WADDR, RADDR, RESET, CALIB, Q0, Q1, Q2, Q3);
+//parameter GSREN = "false";
+//parameter LSREN = "true";
+//input D, ICLK, FCLK, PCLK;
+//input [2:0] WADDR;
+//input [2:0] RADDR;
+//input RESET,CALIB;
+//output Q0,Q1,Q2,Q3;
+//endmodule
 
 
 module IDES8_MEM(D, ICLK, FCLK, PCLK, WADDR, RADDR, RESET, CALIB, Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7);
@@ -79,17 +79,17 @@ output  Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7;
 endmodule
 
 
-module OSER4_MEM(D0, D1, D2, D3, TX0, TX1, PCLK, FCLK, TCLK, RESET, Q0, Q1);
-parameter GSREN = "false";
-parameter LSREN = "true";
-parameter HWL = "false";
-parameter TCLK_SOURCE = "DQSW";
-parameter TXCLK_POL = 1'b0;
-input D0, D1, D2, D3;
-input TX0, TX1;
-input PCLK, FCLK, TCLK, RESET;
-output  Q0,  Q1;
-endmodule
+//module OSER4_MEM(D0, D1, D2, D3, TX0, TX1, PCLK, FCLK, TCLK, RESET, Q0, Q1);
+//parameter GSREN = "false";
+//parameter LSREN = "true";
+//parameter HWL = "false";
+//parameter TCLK_SOURCE = "DQSW";
+//parameter TXCLK_POL = 1'b0;
+//input D0, D1, D2, D3;
+//input TX0, TX1;
+//input PCLK, FCLK, TCLK, RESET;
+//output  Q0,  Q1;
+//endmodule
 
 
 module OSER8_MEM(D0, D1, D2, D3, D4, D5, D6, D7, TX0, TX1, TX2, TX3, PCLK, FCLK, TCLK, RESET, Q0, Q1);
@@ -1072,23 +1072,23 @@ input CLKIN,CE;
 output CLKOUT;
 endmodule
 
-module DQS(DQSIN, PCLK, FCLK, RESET, READ, RCLKSEL, DLLSTEP, WSTEP, RLOADN, RMOVE, RDIR, WLOADN, WMOVE, WDIR, HOLD, DQSR90, DQSW0, DQSW270, RPOINT, WPOINT, RVALID
-, RBURST, RFLAG, WFLAG);
-input DQSIN,PCLK,FCLK,RESET;
-input [3:0] READ;
-input [2:0] RCLKSEL;
-input [7:0] DLLSTEP;
-input [7:0] WSTEP;
-input RLOADN, RMOVE, RDIR, WLOADN, WMOVE, WDIR, HOLD;
-output DQSR90, DQSW0, DQSW270;
-output [2:0] RPOINT, WPOINT;
-output RVALID,RBURST, RFLAG, WFLAG;
-    parameter FIFO_MODE_SEL = 1'b0;
-    parameter RD_PNTR = 3'b000;
-    parameter DQS_MODE = "X1";
-    parameter HWL = "false";
-    parameter GSREN = "false";
-endmodule
+//module DQS(DQSIN, PCLK, FCLK, RESET, READ, RCLKSEL, DLLSTEP, WSTEP, RLOADN, RMOVE, RDIR, WLOADN, WMOVE, WDIR, HOLD, DQSR90, DQSW0, DQSW270, RPOINT, WPOINT, RVALID
+//, RBURST, RFLAG, WFLAG);
+//input DQSIN,PCLK,FCLK,RESET;
+//input [3:0] READ;
+//input [2:0] RCLKSEL;
+//input [7:0] DLLSTEP;
+//input [7:0] WSTEP;
+//input RLOADN, RMOVE, RDIR, WLOADN, WMOVE, WDIR, HOLD;
+//output DQSR90, DQSW0, DQSW270;
+//output [2:0] RPOINT, WPOINT;
+//output RVALID,RBURST, RFLAG, WFLAG;
+//    parameter FIFO_MODE_SEL = 1'b0;
+//    parameter RD_PNTR = 3'b000;
+//    parameter DQS_MODE = "X1";
+//    parameter HWL = "false";
+//    parameter GSREN = "false";
+//endmodule
 
 module DLLDLY(CLKIN, DLLSTEP, DIR, LOADN, MOVE, CLKOUT, FLAG);
 input CLKIN;
diff --git a/techlibs/gowin/cells_xtra_gw5a.v b/techlibs/gowin/cells_xtra_gw5a.v
index a06c4f936..d5fe3d18d 100644
--- a/techlibs/gowin/cells_xtra_gw5a.v
+++ b/techlibs/gowin/cells_xtra_gw5a.v
@@ -1030,12 +1030,12 @@ output  Q0, Q1;
 endmodule
 
 
-module IDES4_MEM(PCLK, D, ICLK, FCLK, RESET, CALIB, WADDR, RADDR, Q0, Q1, Q2, Q3);
-input PCLK, D, ICLK, FCLK, RESET, CALIB;
-input [2:0] WADDR;
-input [2:0] RADDR;
-output Q0,Q1,Q2,Q3;
-endmodule
+//module IDES4_MEM(PCLK, D, ICLK, FCLK, RESET, CALIB, WADDR, RADDR, Q0, Q1, Q2, Q3);
+//input PCLK, D, ICLK, FCLK, RESET, CALIB;
+//input [2:0] WADDR;
+//input [2:0] RADDR;
+//output Q0,Q1,Q2,Q3;
+//endmodule
 
 
 module IDES8_MEM(PCLK, D, ICLK, FCLK, RESET, CALIB, WADDR, RADDR, Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7);
@@ -1059,15 +1059,15 @@ output Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, Q11, Q12, Q13, Q14, Q15, Q16
 endmodule
 
 
-module OSER4_MEM(D0, D1, D2, D3, TX0, TX1, PCLK, FCLK, TCLK, RESET, Q0, Q1);
-parameter HWL = "false";
-parameter TCLK_SOURCE = "DQSW";
-parameter TXCLK_POL = 1'b0;
-input D0, D1, D2, D3;
-input TX0, TX1;
-input PCLK, FCLK, TCLK, RESET;
-output  Q0,  Q1;
-endmodule
+//module OSER4_MEM(D0, D1, D2, D3, TX0, TX1, PCLK, FCLK, TCLK, RESET, Q0, Q1);
+//parameter HWL = "false";
+//parameter TCLK_SOURCE = "DQSW";
+//parameter TXCLK_POL = 1'b0;
+//input D0, D1, D2, D3;
+//input TX0, TX1;
+//input PCLK, FCLK, TCLK, RESET;
+//output  Q0,  Q1;
+//endmodule
 
 
 module OSER8_MEM(D0, D1, D2, D3, D4, D5, D6, D7, TX0, TX1, TX2, TX3, PCLK, FCLK, TCLK, RESET, Q0, Q1);
@@ -2509,22 +2509,22 @@ endmodule
 module GTR12_QUADB();
 endmodule
 
-module DQS(DQSIN, PCLK, FCLK, RESET, READ, RCLKSEL, DLLSTEP, WSTEP, RLOADN, RMOVE, RDIR, WLOADN, WMOVE, WDIR, HOLD, DQSR90, DQSW0, DQSW270, RPOINT, WPOINT, RVALID
-, RBURST, RFLAG, WFLAG);
-input DQSIN,PCLK,FCLK,RESET;
-input [3:0] READ;
-input [2:0] RCLKSEL;
-input [7:0] DLLSTEP;
-input [7:0] WSTEP;
-input RLOADN, RMOVE, RDIR, WLOADN, WMOVE, WDIR, HOLD;
-output DQSR90, DQSW0, DQSW270;
-output [2:0] RPOINT, WPOINT;
-output RVALID,RBURST, RFLAG, WFLAG;
-parameter FIFO_MODE_SEL = 1'b0;
-parameter RD_PNTR = 3'b000;
-parameter DQS_MODE = "X1";
-parameter HWL = "false";
-endmodule
+//module DQS(DQSIN, PCLK, FCLK, RESET, READ, RCLKSEL, DLLSTEP, WSTEP, RLOADN, RMOVE, RDIR, WLOADN, WMOVE, WDIR, HOLD, DQSR90, DQSW0, DQSW270, RPOINT, WPOINT, RVALID
+//, RBURST, RFLAG, WFLAG);
+//input DQSIN,PCLK,FCLK,RESET;
+//input [3:0] READ;
+//input [2:0] RCLKSEL;
+//input [7:0] DLLSTEP;
+//input [7:0] WSTEP;
+//input RLOADN, RMOVE, RDIR, WLOADN, WMOVE, WDIR, HOLD;
+//output DQSR90, DQSW0, DQSW270;
+//output [2:0] RPOINT, WPOINT;
+//output RVALID,RBURST, RFLAG, WFLAG;
+//parameter FIFO_MODE_SEL = 1'b0;
+//parameter RD_PNTR = 3'b000;
+//parameter DQS_MODE = "X1";
+//parameter HWL = "false";
+//endmodule
 
 // Added form adc.v