From 14b0efeced314373b25494e18278d2d6f50fad2b Mon Sep 17 00:00:00 2001
From: "Emil J. Tywoniak" <emil@tywoniak.eu>
Date: Thu, 23 Apr 2026 13:58:20 +0200
Subject: [PATCH] rtlil: simplify extract for performance

---
 kernel/rtlil.cc | 22 +++-------------------
 1 file changed, 3 insertions(+), 19 deletions(-)

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 2badd20c3..c0f6e0d81 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -5272,25 +5272,9 @@ RTLIL::SigSpec RTLIL::SigSpec::extract(int offset, int length) const
 	log_assert(length >= 0);
 	log_assert(offset + length <= size());
 
-	SigSpec extracted;
-	Chunks cs = chunks();
-	auto it = cs.begin();
-	for (; offset; offset -= it->width, ++it) {
-		if (offset < it->width) {
-			int chunk_length = min(it->width - offset, length);
-			extracted.append(it->extract(offset, chunk_length));
-			length -= chunk_length;
-			++it;
-			break;
-		}
-	}
-	for (; length; length -= it->width, ++it) {
-		if (length >= it->width) {
-			extracted.append(*it);
-		} else {
-			extracted.append(it->extract(0, length));
-			break;
-		}
+	std::vector<SigBit> extracted;
+	for (int i = offset; i < offset + length; i++) {
+		extracted.push_back((*this)[i]);
 	}
 	return extracted;
 }