diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 503640f40..2650042ff 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -27,6 +27,7 @@ #include "backends/rtlil/rtlil_backend.h" #include +#include #include #include @@ -2508,6 +2509,21 @@ void RTLIL::Module::swap_names(RTLIL::Wire *w1, RTLIL::Wire *w2) wires_[w2->name] = w2; } +// Returns the RTLIL dump of a module +std::string RTLIL::Module::rtlil_dump() { + // Sorting the module to have a canonical RTLIL + sort(); + // Dumping the RTLIL in an in-memory stringstream + std::stringstream stream; + RTLIL_BACKEND::dump_module(stream, " ", this, design, false, true, false); + return stream.str(); +} + +// Returns a hash of the RTLIL dump +unsigned int RTLIL::Module::rtlil_hash() { + return hash_ops::hash(rtlil_dump()); +} + void RTLIL::Module::swap_names(RTLIL::Cell *c1, RTLIL::Cell *c2) { log_assert(cells_[c1->name] == c1); diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 6a8fab875..350a6afe3 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -1591,6 +1591,9 @@ public: RTLIL::SigSpec OriginalTag (RTLIL::IdString name, const std::string &tag, const RTLIL::SigSpec &sig_a, const std::string &src = ""); RTLIL::SigSpec FutureFF (RTLIL::IdString name, const RTLIL::SigSpec &sig_e, const std::string &src = ""); + std::string rtlil_dump(); + unsigned int rtlil_hash(); + #ifdef WITH_PYTHON static std::map *get_all_modules(void); #endif