#!/usr/bin/awk -f # # File: flatten.awk # # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. # Copyright (C) 1998-2022 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, write to the Free Software # Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA # # CDL netlist flattener, # 19-09-1998 Stefan Schippers # # Rel. history: # # 0.1: 19-09-1998: parameters, global node declarations recognized. # 0.2: 27-09-1998: nodes inside expression are also recognized # {value= V(IN)*3+V(A) ....} # 0.3: 16-11-1998 Bug fixes # 0.4: 28-03-2003 added ccvs vcvs cccs vccs # adapted for xschem netlist # 30-03-2003 do not expand subcircuit if no .subckt present in netlist BEGIN{ # topcell=toupper(ARGV[2]) # ARGC=2 first_subckt = 1 pathsep="_" nodes["M"]=4; nodes["R"]=2; nodes["D"]=2; nodes["V"]=2 nodes["I"]=2; nodes["C"]=2; nodes["L"]=2; nodes["Q"]=3 nodes["E"]=4; nodes["G"]=4; nodes["H"]=2; nodes["F"]=2 } { if( ($0 !~/^\.include/) && ($0 !~/^\.INCLUDE/) ) $0=toupper($0) # allow to specify *.nodes[W]=2 or *.nodes["W"] = 2 in the netlist for additional # custom devices nodes specification. if($0 ~/^[ \t]*\*\.[ \t]*NODES\["?[^]["]"?\][ \t]*=[ \t]*.*/) { n_nodes = $0 sub(/^.*=[ \t]*/, "", n_nodes) n_initial = $0 sub(/"?\].*/, "", n_initial) sub(/^.*\["?/, "", n_initial) nodes[n_initial] = n_nodes } if($0 ~ /^\**\.SUBCKT/ && first_subckt) { topcell=$2 sub(/^\*\*/,"",$0) } if($0 ~ /^\**\.ENDS/ && first_subckt) { first_subckt = 0 sub(/^\*\*/,"",$0) } if($0 ~/^\+/) # join folded lines { a[lines-1]=a[lines-1] " " substr($0,2); next } a[lines++]=$0 } END{ devpattern = "^[" for(j in nodes) { devpattern = devpattern j } devpattern = devpattern "]" for(j=0;j=2;k--) { if(line[k] ~ /=/) { split(line[k],parameter,"=") if(parameter[2] in paramarray2) paramlist= parameter[1] "=" paramarray2[parameter[2]] " " paramlist else paramlist= line[k] " " paramlist } else if(subname=="") {subname=line[k]; subname_pos=k } else if( (subname,ports) in subckt && k<=subckt[subname,"ports"]+1) portlist = getnode(name,pathnode,portarray,line[k]) " " portlist else if(k" subname if( (subname,"first") in subckt) # 30032003 do not expand subcircuit call if undefined subckt expand(subname,pathnode line[1],paramlist,portlist) else { printf "%s %s %s %s\n",line[1] pathname , portlist, subname, paramlist } print "*--------END___" pathnode line[1] "->" subname } else { if(line[1] ~ devpattern) { printf "%s ",line[1] pathname for(k=2;k<=nodes[substr(line[1],1,1)]+1;k++) printf "%s ", getnode(name,pathnode,portarray,line[k]) for(; k<=num;k++) { if(line[1] ~ /[FH]/ && k==4) printf "%s ", line[k] pathname else if(line[k] ~/.*VALUE=.*/) printf "%s ",general_sub(line[k],name,pathnode,portarray) else if(line[k] ~/=/) { split(line[k],parameter,"=") if(parameter[2] in paramarray2) printf "%s ", parameter[1] "=" paramarray2[parameter[2]] else if(name SUBSEP "param" SUBSEP parameter[2] in subckt) printf "%s ",parameter[1] "=" subckt[name,"param",parameter[2]] else printf "%s ",line[k] } else printf "%s ", line[k] } } else printf "%s ", a[j] printf "\n" } } } function getnode(name, path, portarray, node) # return the full path-name of in subckt # in path , called with ports { if(name!=topcell) # if we are in top cell, nothing to do { if(name SUBSEP "port" SUBSEP node in subckt) return portarray[subckt[name,"port",node]] # is a port, #return port mapping if(!(node in global)) return path node # local node } return node # if is a top level or global (not a port) just return } # expand expressions like: VALUE=3*V(IN)+VA) # substituting node names function general_sub(string,name,pathnode,portarray, nod,sss) { while(match(string, /V\([^\(\)]*\)/ )) { nod = substr(string,RSTART+2,RLENGTH-3) sss=sss substr(string,1,RSTART-1) "V(" \ getnode(name,pathnode,portarray,nod) ")" string=substr(string,RSTART+RLENGTH) } sss=sss string return sss }