v {xschem version=3.4.4 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
* simulation.
* Copyright (C) 1998-2024 Stefan Frederik Schippers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
G {}
K {type=primitive
function3="0 1 2 & &"
format="@name @@A @@B @@C @VGND @VNB @VPB @VPWR @@X @prefix\\\\and3_1"
template="name=x1 VGND=VGND VNB=VNB VPB=VPB VPWR=VPWR prefix=sky130_fd_sc_hd__ "
extra="VGND VNB VPB VPWR prefix"
highlight=true
}
V {}
S {}
E {}
L 4 -60 -40 -40 -40 {}
L 4 -60 0 -30 0 {}
L 4 -30 -30 -30 30 {}
L 4 -30 30 5 30 {}
L 4 -30 -30 5 -30 {}
L 4 35 0 60 0 {}
L 4 -60 40 -40 40 {}
L 4 -40 20 -40 40 {}
L 4 -40 20 -30 20 {}
L 4 -40 -40 -40 -20 {}
L 4 -40 -20 -30 -20 {}
B 5 -62.5 -42.5 -57.5 -37.5 {name=A dir=in goto=3 }
B 5 -62.5 -2.5 -57.5 2.5 {name=B dir=in goto=3 }
B 5 -62.5 37.5 -57.5 42.5 {name=C dir=in goto=3 }
B 5 57.5 -2.5 62.5 2.5 {name=X dir=out }
A 4 5 0 30 270 180 {}
T {@name} -28.75 -5 0 0 0.2 0.2 {}
T {@symname} -25 -45 0 0 0.2 0.2 {}
T {A} -55 -54 0 0 0.2 0.2 {}
T {B} -55 -14 0 0 0.2 0.2 {}
T {X} 55 -14 0 1 0.2 0.2 {}
T {C} -55 26 0 0 0.2 0.2 {}