v {xschem version=3.4.4 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
* simulation.
* Copyright (C) 1998-2024 Stefan Frederik Schippers
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
K {type=symbol
template="graphical=1 "
tedax_format="footprint @name @footprint
value @name @value
device @name @device
@comptag"
format="@name @pinlist @value "

}
G {}
V {}
S {}
E {}
T {FILE:} 1580 -40 2 1 0.266667 0.266667 {}
T {REVISION:} 1930 -40 2 1 0.266667 0.266667 {}
T {DRAWN BY: } 1930 -10 2 1 0.266667 0.266667 {}
T {PAGE} 1580 -10 2 1 0.266667 0.266667 {}
T {OF} 1750 -10 2 1 0.266667 0.266667 {}
T {TITLE} 1580 -70 2 1 0.266667 0.266667 {}

L 4 0 0 2330 0 {}
L 4 2330 -1650 2330 0 {}
L 4 0 -1650 2330 -1650 {}
L 4 0 -1650 0 0 {}
L 4 1570 0 2330 0 {}
L 4 2330 -140 2330 0 {}
L 4 1570 -140 2330 -140 {}
L 4 1570 -140 1570 0 {}

L 4 1920 -60 1920 0 {}
L 4 1570 -60 2330 -60 {}