v {xschem version=3.0.0 file_version=1.2}
K {type=4075
template="name=U? numslots=3 slot=1 device=4075 footprint=DIP14 description=\\"3 OR gates with 3 inputs\\" documentation=http://www.semiconductors.philips.com/acrobat/datasheets/HEF4075B_CNV_3.pdf VDD=VDD
VSS=VSS
"
tedax_format="footprint @name @footprint
value @name @value
device @name @device
@comptag"
format="@name @pinlist @value @VDD @VSS"

extra="VDD VSS"
extra_pinnumber="14 7"
}
G {}
V {}
S {}
E {}
T {@name} 40 -90 2 1 0.333333 0.333333 {}
T {4075} 40 0 2 1 0.333333 0.333333 {}


L 4 30 -20 60 -20 {}
L 4 30 -80 60 -80 {}
L 4 30 -20 30 0 {}
L 4 30 -100 30 -80 {}


A 4 3.6 -50 40 312 97 {}
A 4 60 -60 40 270 76 {}
A 4 60 -40 40 14 76 {}




L 3 0 -10 30 -10 {}
B 5 -2.5 -12.5 2.5 -7.5 {
pinseq=1
dir=in
name=A
pinnumber=1:3:11
}
T {@#0:pinnumber} 20 -15 2 0 0.266667 0.266667 {layer=13}
L 3 0 -50 40 -50 {}
B 5 -2.5 -52.5 2.5 -47.5 {
pinseq=2
dir=in
name=B
pinnumber=2:4:12
}
T {@#1:pinnumber} 20 -55 2 0 0.266667 0.266667 {layer=13}
L 3 0 -90 30 -90 {}
B 5 -2.5 -92.5 2.5 -87.5 {
pinseq=3
dir=in
name=C
pinnumber=8:5:13
}
T {@#2:pinnumber} 20 -95 2 0 0.266667 0.266667 {layer=13}
L 3 100.6 -50 130 -50 {}
B 5 127.5 -52.5 132.5 -47.5 {
pinseq=4
dir=out
name=Y
pinnumber=9:6:10
}
T {@#3:pinnumber} 110 -55 2 1 0.266667 0.266667 {layer=13}