v {xschem version=3.4.5 file_version=1.2 * * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA } G {} K {type=logo template="name=l1 author=\\"Stefan Schippers\\"" verilog_ignore=true vhdl_ignore=true spice_ignore=true tedax_ignore=true} V {} S {} E {} L 6 225 0 1020 0 {} L 6 -160 0 -95 0 {} P 5 38 -10 -15 -15 -10 -25 0 -15 10 -2.5 22.5 5 30 -2.5 30 -10 30 -15 30 -20 25 -25 20 -35 10 -45 20 -50 25 -55 30 -60 30 -67.5 30 -75 30 -67.5 22.5 -55 10 -45 0 -55 -10 -67.5 -22.5 -75 -30 -67.5 -30 -60 -30 -55 -30 -50 -25 -45 -20 -35 -10 -25 -20 -20 -25 -15 -30 -10 -30 -2.5 -30 5 -30 -2.5 -22.5 -10 -15 {fill=true bezier=1} T {@path @schname_ext} 235 5 0 0 0.4 0.4 {} T {@author} 235 -25 0 0 0.4 0.4 {} T {@time_last_modified} 1020 -25 0 1 0.4 0.3 {} T {SCHEM} 5 -25 0 0 1 1 {}