diff --git a/doc/xschem_man/developer_info.html b/doc/xschem_man/developer_info.html
index 1ee432d2..2c0cfea8 100644
--- a/doc/xschem_man/developer_info.html
+++ b/doc/xschem_man/developer_info.html
@@ -969,9 +969,10 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
    Example: xschem replace_symbol R3 capa.sym </pre>
    <li><kbd>       reset_flags</kbd></li><pre>
    Reset cached instance and symbol cached flags (inst-&gt;flags, sym-&gt;flags) </pre>
-   <li><kbd>       resolved_net</kbd></li><pre>
-   returns the topmost full hierarchy name of selected net/pin/label
-   nets connected to I/O ports are mapped to upper level recursively </pre>
+   <li><kbd>       resolved_net [net]</kbd></li><pre>
+   if 'net' is given  return its topmost full hierarchy name
+   else returns the topmost full hierarchy name of selected net/pin/label.
+   Nets connected to I/O ports are mapped to upper level recursively</pre>
    <li><kbd>       rotate</kbd></li><pre>
    Rotate selected objects around their centers </pre>
    <li><kbd>       save</kbd></li><pre>
diff --git a/src/netlist.c b/src/netlist.c
index cb580c70..d51ea277 100644
--- a/src/netlist.c
+++ b/src/netlist.c
@@ -874,7 +874,8 @@ static int instcheck(int n, int p)
     const char *tap;
     dbg(1, "instcheck: bus tap node: %s\n", inst[n].node[0]);
     if(!inst[n].node[1]) { /* still unnamed */
-      tap = get_tok_value(inst[n].prop_ptr, "lab", 0);
+      /* tap = get_tok_value(inst[n].prop_ptr, "lab", 0); */
+      tap = inst[n].lab;
       /* Check if this is a bus slice and must be appended to bus base name */
       if(tap[0] == '[' || isonlydigit(tap)) {
         /* find bus basename, from beginning or first character after ',' and ' ' */
diff --git a/src/scheduler.c b/src/scheduler.c
index a1cf16a0..ec068652 100644
--- a/src/scheduler.c
+++ b/src/scheduler.c
@@ -2928,15 +2928,19 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
       Tcl_ResetResult(interp);
     }
 
-    /* resolved_net
-     *   returns the topmost full hierarchy name of selected net/pin/label
-     *   nets connected to I/O ports are mapped to upper level recursively */
+    /* resolved_net [net]
+     *   if 'net' is given  return its topmost full hierarchy name
+     *   else returns the topmost full hierarchy name of selected net/pin/label.
+     *   Nets connected to I/O ports are mapped to upper level recursively */
     else if(!strcmp(argv[1], "resolved_net"))
     {
-      char *net = NULL, *rn = NULL;
+      const char *net = NULL;
+      char  *rn = NULL;
       Tcl_ResetResult(interp);
       prepare_netlist_structs(0);
-      if(xctx->lastsel == 1) {
+      if(argc > 2) {
+        net = argv[2];
+      } else if(xctx->lastsel == 1) {
         if(xctx->sel_array[0].type == ELEMENT) {
           int n=xctx->sel_array[0].n;
           if(xctx->inst[n].ptr >= 0) { 
diff --git a/src/token.c b/src/token.c
index 594941e2..4bad44f9 100644
--- a/src/token.c
+++ b/src/token.c
@@ -3418,7 +3418,9 @@ const char *translate(int inst, const char* s)
              ++path;
            }
            prepare_netlist_structs(0);
-           if(pin_prop_ptr) net = get_tok_value(pin_prop_ptr, "lab", 0);
+           if(pin_prop_ptr) {
+             net = get_tok_value(pin_prop_ptr, "lab", 0);
+           }
            if(net == NULL || net[0] == '\0') net = net_name(inst,0, &multip, 0, 0);
            len = strlen(path) + strlen(net) + 1;
            dbg(1, "translate() @spice_get_voltage: inst=%s\n", xctx->inst[inst].instname);
diff --git a/xschem_library/examples/LCC_instances.sch b/xschem_library/examples/LCC_instances.sch
index 922b66eb..aa1a455c 100644
--- a/xschem_library/examples/LCC_instances.sch
+++ b/xschem_library/examples/LCC_instances.sch
@@ -1,4 +1,4 @@
-v {xschem version=3.1.0 file_version=1.2
+v {xschem version=3.4.0 file_version=1.2
 }
 G {}
 K {type=subcircuit
@@ -51,7 +51,8 @@ dataset=-1}
 P 4 5 560 -700 560 -510 1350 -510 1350 -700 560 -700 {dash=3}
 P 4 5 820 -920 820 -730 1350 -730 1350 -920 820 -920 {dash=3}
 P 4 5 0 -1160 1840 -1160 1840 0 -0 0 0 -1160 {dash=4}
-T {These 2 instances are equivalent} 260 -310 0 0 0.4 0.4 {}
+T {These 2 instances
+are equivalent} 260 -310 0 0 0.4 0.4 {}
 T {Example of using a schematic as a component instance
 instead of the usual symbol. LCC: Local Custom Cell.
 
@@ -84,7 +85,7 @@ lab=ZZ}
 C {vsource.sym} 50 -140 0 0 {name=V1 value="pwl 0 0 1u 0 5u 3"}
 C {lab_pin.sym} 50 -170 0 0 {name=p4 lab=A}
 C {lab_pin.sym} 50 -110 0 0 {name=p5 lab=0}
-C {code_shown.sym} 510 -250 0 0 {name=STIMULI
+C {code_shown.sym} 480 -280 0 0 {name=STIMULI
 only_toplevel=true
 tclcommand="xschem edit_vi_prop"
 value=".control