diff --git a/src/callback.c b/src/callback.c index 3cec0cd6..0b514e45 100644 --- a/src/callback.c +++ b/src/callback.c @@ -1383,7 +1383,6 @@ int callback(int event, int mx, int my, KeySym key, break; } if(0 && key=='~' && (state & ControlMask)) { /* testmode */ - break; } if(0 && key=='|' && !(state & ControlMask)) { /* testmode */ diff --git a/src/netlist.c b/src/netlist.c index e6a7145e..ca0bbc4e 100644 --- a/src/netlist.c +++ b/src/netlist.c @@ -675,10 +675,17 @@ void prepare_netlist_structs(int for_netlist) my_strdup(248, &type,(xctx.inst[i].ptr+ xctx.sym)->type); if(print_erc && (!xctx.inst[i].instname || !xctx.inst[i].instname[0]) ) { char str[2048]; - my_snprintf(str, S(str), "instance: %d (%s): no name attribute set", i, xctx.inst[i].name); - statusmsg(str,2); - xctx.inst[i].flags |=4; - hilight_nets=1; + if( strcmp(type, "package") && + strcmp(type, "port_attributes") && + strcmp(type, "architecture") && + strcmp(type, "arch_declarations") && + strcmp(type, "attributes") && + strcmp(type, "use")) { + my_snprintf(str, S(str), "instance: %d (%s): no name attribute set", i, xctx.inst[i].name); + statusmsg(str,2); + xctx.inst[i].flags |=4; + hilight_nets=1; + } } if(print_erc && (!type || !type[0]) ) { char str[2048]; diff --git a/src/spice.awk b/src/spice.awk index 8d965324..e4e40290 100755 --- a/src/spice.awk +++ b/src/spice.awk @@ -168,8 +168,8 @@ function process( i, iprefix) sub(/#.*/,"",iprefix) sub("#" iprefix "#", iprefix,$i) gsub(/,/, "," iprefix,$i) - ## 20160301 add '@1' if missing in format string - if(i>1 && ( $(i-1) !~/^@/) ) { + ## 20160301 add '?1' if missing in format string + if(i>1 && ( $(i-1) !~/^?/) ) { $i = "@1 " $i } $0 = $0 # reparse input line @@ -211,8 +211,8 @@ function process( i, iprefix) - # .probe tran v( @1 DL[3],DL[2],DL[1],DL[0] , @1 WL[3],WL{2],WL[1],WL[0] ) - if($1 ==".probe" && $4 ~/^@/ && $7 ~/^@/ && NF==9) { + # .probe tran v( ?1 DL[3],DL[2],DL[1],DL[0] , ?1 WL[3],WL{2],WL[1],WL[0] ) + if($1 ==".probe" && $4 ~/^?/ && $7 ~/^?/ && NF==9) { num1=split($5,name,",") num2=split($8,name2,",") @@ -221,8 +221,8 @@ function process( i, iprefix) print $1 " " $2 " " $3 " " name[(i-1)%num1+1] " , " name2[(i-1)%num2+1] " " $9 } - # .save v( @1 DL[3],DL[2],DL[1],DL[0] , @1 WL[3],WL{2],WL[1],WL[0] ) - } else if($1 ==".save" && $3 ~/^@/ && $6 ~/^@/ && NF==8) { + # .save v( ?1 DL[3],DL[2],DL[1],DL[0] , ?1 WL[3],WL{2],WL[1],WL[0] ) + } else if($1 ==".save" && $3 ~/^?/ && $6 ~/^?/ && NF==8) { num1=split($4,name,",") num2=split($7,name2,",") @@ -232,14 +232,14 @@ function process( i, iprefix) } - # .probe tran v( @1 LDY1_B[1],LDY1_B[0] ) - } else if($1 ==".probe" && $4 ~/^@/ && NF==6) { + # .probe tran v( ?1 LDY1_B[1],LDY1_B[0] ) + } else if($1 ==".probe" && $4 ~/^?/ && NF==6) { num=split($5,name,",") for(i=1;i<=num;i++) { print $1 " " $2 " " $3 " " name[i] " " $6 } - # .save v( @1 LDY1_B[1],LDY1_B[0] ) - } else if($1 ==".save" && $3 ~/^@/ && NF==5) { + # .save v( ?1 LDY1_B[1],LDY1_B[0] ) + } else if($1 ==".save" && $3 ~/^?/ && NF==5) { num=split($4,name,",") for(i=1;i<=num;i++) { print $1 " " $2 " " name[i] " " $5 @@ -277,7 +277,7 @@ function process( i, iprefix) for(j=2;j<=NF;j+=1) # start from 2 not from 3 20070221 { - if($j ~/^@/) continue # handle the case that $2 not pinlist 20070221 + if($j ~/^?/) continue # handle the case that $2 not pinlist 20070221 arg_num[j]=split($j,tmp,",") for(k=1;k<=arg_num[j]; k++) { arg_name[j,k]=tmp[k] @@ -289,14 +289,14 @@ function process( i, iprefix) for(j=2;j<=NF;j++) { - if($j !~ /^@/) + if($j !~ /^?/) { printf "%s ", $j # if not a node just print it } else { nmult=$(j++) - sub(/@/,"",nmult) + sub(/?/,"",nmult) if(nmult+0==-1) nmult=arg_num[j] for(l=0;l %s\n", name, str_ptr); */ - fprintf(fd, "@%d %s ", mult, str_ptr); + fprintf(fd, "?%d %s ", mult, str_ptr); } } else if(token[0]=='@' && token[1]=='@') { /* recognize single pins 15112003 */ @@ -2050,7 +2052,7 @@ void print_verilog_element(FILE *fd, int inst) if( (str_ptr = net_name(inst,i, &mult, 0)) ) { if(tmp) fprintf(fd,"\n"); - fprintf(fd, " @%d %s %s ", mult, + fprintf(fd, " ?%d %s %s ", mult, get_tok_value(ptr->rect[PINLAYER][i].prop_ptr,"name",0), str_ptr); tmp=1; diff --git a/src/verilog.awk b/src/verilog.awk index 9c7ec34a..44463e38 100755 --- a/src/verilog.awk +++ b/src/verilog.awk @@ -225,7 +225,7 @@ begin_module && $1 ~/^\);$/ { /^---- instance / { on_single_line() -## ---- instance xsl[0],xsl[1],xsl[2],xsl[3],xsl[4],xsl[5],xsl[6],xsl[7] ( @32 I[0:31] DEL[0],DEL[1] ... +## ---- instance xsl[0],xsl[1],xsl[2],xsl[3],xsl[4],xsl[5],xsl[6],xsl[7] ( ?32 I[0:31] DEL[0],DEL[1] ... num=split($3,name,",") for(j=7;j<=NF-1;j+=3) { @@ -245,7 +245,7 @@ begin_module && $1 ~/^\);$/ { { pin="" if(j>7) {printf ","} - if($j !~ /^@/) + if($j !~ /^?/) { pin=pin $j # if not a node just print it } @@ -253,7 +253,7 @@ begin_module && $1 ~/^\);$/ { { nmult=$(j++);j++ - sub(/@/,"",nmult) + sub(/?/,"",nmult) nmult=nmult+0 if(nmult==-1) nmult=arg_num[j] for(l=0;l 6 } { set ret 1} ;# Heuristic decision :-) if { $ret } { - if { $instances} { + if { $instances>2} { set ret SCHEMATIC } else { set ret SYMBOL diff --git a/xschem_library/devices/architecture.sym b/xschem_library/devices/architecture.sym index 8b0d1144..cadb5a6e 100644 --- a/xschem_library/devices/architecture.sym +++ b/xschem_library/devices/architecture.sym @@ -1,5 +1,6 @@ -v {xschem version=2.9.7 file_version=1.2} -G {type=architecture +v {xschem version=2.9.8 file_version=1.2} +G {} +K {type=architecture spice_ignore=true verilog_ignore=true tedax_ignore=true @@ -10,14 +11,4 @@ S {} E {} L 4 0 -10 355 -10 {} T {ARCHITECTURE} 5 -30 0 0 0.3 0.3 {} -T {SPICE -===================== -@schprop - -VERILOG -===================== -@schverilogprop - -VHDL -===================== -@schvhdlprop} 45 5 0 0 0.3 0.3 {} +T {@schprop@schverilogprop@schvhdlprop@schsymbolprop} 45 5 0 0 0.3 0.3 {font=monospace layer=8}