From e16e54d851843145b69d70164f2dda8d59edb089 Mon Sep 17 00:00:00 2001 From: Stefan Frederik Date: Tue, 15 Jun 2021 01:15:32 +0200 Subject: [PATCH] new list variable "noprint_libs" to specify patterns of cells NOT to print in hierarchical export. "xschem_libs" does the same thing for netlisting. --- src/netlist.c | 13 +++-- src/spice_netlist.c | 125 ++++++++++++++++++++---------------------- src/tedax_netlist.c | 2 +- src/verilog_netlist.c | 2 +- src/vhdl_netlist.c | 6 +- src/xschem.h | 2 +- src/xschem.tcl | 1 + 7 files changed, 75 insertions(+), 76 deletions(-) diff --git a/src/netlist.c b/src/netlist.c index a0760b48..395370db 100644 --- a/src/netlist.c +++ b/src/netlist.c @@ -354,20 +354,23 @@ void hash_wires(void) } /* return 0 if library path of s matches any lib name in tcl variable $xschem_libs */ -int check_lib(const char *s) +/* what: 1: netlist exclude lib, 2: hierarchical print exclude lib */ +int check_lib(int what, const char *s) { int range,i, found; - char str[200]; /* overflow safe 20161122 */ + char str[PATH_MAX + 512]; /* overflow safe 20161122 */ found=0; - tcleval("llength $xschem_libs"); + if(what & 1) tcleval("llength $xschem_libs"); + if(what & 2) tcleval("llength $noprint_libs"); range = atoi(tclresult()); dbg(1, "check_lib(): s=%s, range=%d\n", s, range); for(i=0;i %s\n", str, tclresult()); my_snprintf(str, S(str), "regexp {%s} %s", tclresult(), s); dbg(0, "check_lib(): str=%s\n", str); tcleval(str); diff --git a/src/spice_netlist.c b/src/spice_netlist.c index c3118e29..21fddfeb 100644 --- a/src/spice_netlist.c +++ b/src/spice_netlist.c @@ -31,71 +31,66 @@ static struct hashentry *subckt_table[HASHSIZE]; void hier_psprint(void) /* netlister driver */ { - int i, save_ok; - char *subckt_name; - int spice_stop; - char filename[PATH_MAX]; - char *abs_path = NULL; - const char *str_tmp; - - if(!ps_draw(1)) return; /* prolog */ - if(xctx->modified) { - save_ok = save_schematic(xctx->sch[xctx->currsch]); - if(save_ok == -1) return; - } - - - free_hash(subckt_table); - zoom_full(0, 0, 1, 0.97); - ps_draw(2); /* page */ - dbg(1,"--> %s\n", skip_dir( xctx->sch[xctx->currsch]) ); - unselect_all(); - remove_symbols(); /* 20161205 ensure all unused symbols purged before descending hierarchy */ - load_schematic(1, xctx->sch[xctx->currsch], 0); - - my_strdup(1224, &xctx->sch_path[xctx->currsch+1], xctx->sch_path[xctx->currsch]); - my_strcat(1227, &xctx->sch_path[xctx->currsch+1], "->netlisting"); - xctx->sch_path_hash[xctx->currsch+1] = 0; - xctx->currsch++; - subckt_name=NULL; - for(i=0;isymbols;i++) - { - if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue; - if(!xctx->sym[i].type) continue; - my_strdup(1230, &abs_path, abs_sym_path(xctx->sym[i].name, "")); - if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path)) - { - /* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */ - my_strdup(1228, &subckt_name, get_cell(xctx->sym[i].name, 0)); - if (str_hash_lookup(subckt_table, subckt_name, "", XLOOKUP)==NULL) - { - str_hash_lookup(subckt_table, subckt_name, "", XINSERT); - - if(!strcmp( get_tok_value(xctx->sym[i].prop_ptr,"spice_stop",0),"true") ) - spice_stop=1; - else - spice_stop=0; - if((str_tmp = get_tok_value(xctx->sym[i].prop_ptr, "schematic",0 ))[0]) { - my_strncpy(filename, abs_sym_path(str_tmp, ""), S(filename)); - } else { - my_strncpy(filename, add_ext(abs_sym_path(xctx->sym[i].name, ""), ".sch"), S(filename)); - } - spice_stop ? load_schematic(0,filename, 0) : load_schematic(1,filename, 0); - - zoom_full(0, 0, 1, 0.97); - ps_draw(2); /* page */ - dbg(1,"--> %s\n", skip_dir( xctx->sch[xctx->currsch]) ); - } + int i, save_ok; + char *subckt_name; + int spice_stop; + char filename[PATH_MAX]; + char *abs_path = NULL; + const char *str_tmp; + + if(!ps_draw(1)) return; /* prolog */ + if(xctx->modified) { + save_ok = save_schematic(xctx->sch[xctx->currsch]); + if(save_ok == -1) return; } - my_free(1231, &abs_path); - } - free_hash(subckt_table); - my_free(1229, &subckt_name); - my_strncpy(xctx->sch[xctx->currsch] , "", S(xctx->sch[xctx->currsch])); - xctx->currsch--; - unselect_all(); - load_schematic(1, xctx->sch[xctx->currsch], 0); - ps_draw(4); /* trailer */ + free_hash(subckt_table); + zoom_full(0, 0, 1, 0.97); + ps_draw(2); /* page */ + dbg(1,"--> %s\n", skip_dir( xctx->sch[xctx->currsch]) ); + unselect_all(); + remove_symbols(); /* 20161205 ensure all unused symbols purged before descending hierarchy */ + load_schematic(1, xctx->sch[xctx->currsch], 0); + my_strdup(1224, &xctx->sch_path[xctx->currsch+1], xctx->sch_path[xctx->currsch]); + my_strcat(1227, &xctx->sch_path[xctx->currsch+1], "->netlisting"); + xctx->sch_path_hash[xctx->currsch+1] = 0; + xctx->currsch++; + subckt_name=NULL; + for(i=0;isymbols;i++) + { + if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue; + if(!xctx->sym[i].type) continue; + my_strdup(1230, &abs_path, abs_sym_path(xctx->sym[i].name, "")); + if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(2, abs_path)) + { + /* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */ + my_strdup(1228, &subckt_name, get_cell(xctx->sym[i].name, 0)); + if (str_hash_lookup(subckt_table, subckt_name, "", XLOOKUP)==NULL) + { + str_hash_lookup(subckt_table, subckt_name, "", XINSERT); + if(!strcmp( get_tok_value(xctx->sym[i].prop_ptr,"spice_stop",0),"true") ) + spice_stop=1; + else + spice_stop=0; + if((str_tmp = get_tok_value(xctx->sym[i].prop_ptr, "schematic",0 ))[0]) { + my_strncpy(filename, abs_sym_path(str_tmp, ""), S(filename)); + } else { + my_strncpy(filename, add_ext(abs_sym_path(xctx->sym[i].name, ""), ".sch"), S(filename)); + } + spice_stop ? load_schematic(0,filename, 0) : load_schematic(1,filename, 0); + zoom_full(0, 0, 1, 0.97); + ps_draw(2); /* page */ + dbg(1,"--> %s\n", skip_dir( xctx->sch[xctx->currsch]) ); + } + } + my_free(1231, &abs_path); + } + free_hash(subckt_table); + my_free(1229, &subckt_name); + my_strncpy(xctx->sch[xctx->currsch] , "", S(xctx->sch[xctx->currsch])); + xctx->currsch--; + unselect_all(); + load_schematic(1, xctx->sch[xctx->currsch], 0); + ps_draw(4); /* trailer */ } @@ -254,7 +249,7 @@ void global_spice_netlist(int global) /* netlister driver */ if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"spice_ignore",0),"true")==0 ) continue; if(!xctx->sym[i].type) continue; my_strdup(1232, &abs_path, abs_sym_path(xctx->sym[i].name, "")); - if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path)) + if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(1, abs_path)) { /* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */ my_strdup(391, &subckt_name, get_cell(xctx->sym[i].name, 0)); diff --git a/src/tedax_netlist.c b/src/tedax_netlist.c index 06226cf4..90e846f6 100644 --- a/src/tedax_netlist.c +++ b/src/tedax_netlist.c @@ -104,7 +104,7 @@ void global_tedax_netlist(int global) /* netlister driver */ if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"tedax_ignore",0),"true")==0 ) continue; if(!xctx->sym[i].type) continue; my_strdup(1236, &abs_path, abs_sym_path(xctx->sym[i].name, "")); - if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path)) + if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(1, abs_path)) { tedax_block_netlist(fd, i); } diff --git a/src/verilog_netlist.c b/src/verilog_netlist.c index 418748ad..3fa5920b 100644 --- a/src/verilog_netlist.c +++ b/src/verilog_netlist.c @@ -295,7 +295,7 @@ void global_verilog_netlist(int global) /* netlister driver */ if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"verilog_ignore",0),"true")==0 ) continue; if(!xctx->sym[i].type) continue; my_strdup(1234, &abs_path, abs_sym_path(xctx->sym[i].name, "")); - if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path)) { + if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(1, abs_path)) { /* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */ my_strdup(328, &subckt_name, get_cell(xctx->sym[i].name, 0)); if (str_hash_lookup(subckt_table, subckt_name, "", XLOOKUP)==NULL) diff --git a/src/vhdl_netlist.c b/src/vhdl_netlist.c index 149c3f02..fd68a000 100644 --- a/src/vhdl_netlist.c +++ b/src/vhdl_netlist.c @@ -254,7 +254,7 @@ void global_vhdl_netlist(int global) /* netlister driver */ if(( strcmp(xctx->sym[j].type,"subcircuit")==0 || strcmp(xctx->sym[j].type,"primitive")==0 - ) && check_lib(abs_path) + ) && check_lib(1, abs_path) ) { /* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */ @@ -349,7 +349,7 @@ void global_vhdl_netlist(int global) /* netlister driver */ if( strcmp(get_tok_value(xctx->sym[i].prop_ptr,"vhdl_ignore",0),"true")==0 ) continue; if(!xctx->sym[i].type) continue; my_strdup(1242, &abs_path, abs_sym_path(xctx->sym[j].name, "")); - if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(abs_path)) + if(strcmp(xctx->sym[i].type,"subcircuit")==0 && check_lib(1, abs_path)) { /* xctx->sym can be SCH or SYM, use hash to avoid writing duplicate subckt */ my_strdup(327, &subckt_name, get_cell(xctx->sym[i].name, 0)); @@ -533,7 +533,7 @@ void vhdl_block_netlist(FILE *fd, int i) continue; my_strdup(1238, &abs_path, abs_sym_path(xctx->sym[i].name, "")); if(( strcmp(xctx->sym[j].type,"subcircuit")==0 || strcmp(xctx->sym[j].type,"primitive")==0) && - check_lib(abs_path) + check_lib(1, abs_path) ) { /* only print component declaration if used in current subcircuit */ diff --git a/src/xschem.h b/src/xschem.h index fe7775ee..2b06e6fc 100644 --- a/src/xschem.h +++ b/src/xschem.h @@ -843,7 +843,7 @@ extern void here(int i); extern void print_version(void); extern int set_netlist_dir(int force, char *dir); extern void netlist_options(int i); -extern int check_lib(const char * s); +extern int check_lib(int what, const char * s); extern void select_all(void); extern void change_linewidth(double w); extern void schematic_in_new_window(void); diff --git a/src/xschem.tcl b/src/xschem.tcl index 6db98deb..caff5265 100644 --- a/src/xschem.tcl +++ b/src/xschem.tcl @@ -3525,6 +3525,7 @@ if {$::OS == "Windows"} { # used in C code set_ne xschem_libs {} +set_ne noprint_libs {} set_ne tcl_debug 0 # used to activate debug from menu set_ne menu_tcl_debug 0