diff --git a/doc/xschem_man/xschem_footer.html b/doc/xschem_man/xschem_footer.html index 32cd01fc..5582c4fd 100644 --- a/doc/xschem_man/xschem_footer.html +++ b/doc/xschem_man/xschem_footer.html @@ -20,7 +20,7 @@ top: 12px; right: 30px; float: right;"> - Copyright(C) 1998 - 2024 Stefan Schippers + Copyright(C) 1998 - 2026 Stefan Schippers

diff --git a/src/actions.c b/src/actions.c index 8a1a58ca..960cba46 100644 --- a/src/actions.c +++ b/src/actions.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -225,7 +225,7 @@ int set_modify(int mod) void print_version() { printf("XSCHEM V%s\n", XSCHEM_VERSION); - printf("Copyright (C) 1998-2024 Stefan Schippers\n"); + printf("Copyright (C) 1998-2026 Stefan Schippers\n"); printf("\n"); printf("This is free software; see the source for copying conditions. There is NO\n"); printf("warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\n"); diff --git a/src/break.awk b/src/break.awk index 79532316..ec6b05f9 100755 --- a/src/break.awk +++ b/src/break.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/callback.c b/src/callback.c index 809df75e..fa27f385 100644 --- a/src/callback.c +++ b/src/callback.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/change_ref.awk b/src/change_ref.awk index ea8cfba2..11a296d0 100755 --- a/src/change_ref.awk +++ b/src/change_ref.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/check.c b/src/check.c index 24ebb856..e0e4d1e1 100644 --- a/src/check.c +++ b/src/check.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/clip.c b/src/clip.c index 87973a9d..d774da11 100644 --- a/src/clip.c +++ b/src/clip.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/convert_to_verilog2001.awk b/src/convert_to_verilog2001.awk index 4f6748cf..11a1a6ca 100755 --- a/src/convert_to_verilog2001.awk +++ b/src/convert_to_verilog2001.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/create_alloc_ids.awk b/src/create_alloc_ids.awk index 636770e1..b3767839 100755 --- a/src/create_alloc_ids.awk +++ b/src/create_alloc_ids.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/create_alloc_ids_windows.awk b/src/create_alloc_ids_windows.awk index 981d0793..a3129063 100644 --- a/src/create_alloc_ids_windows.awk +++ b/src/create_alloc_ids_windows.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/create_graph.tcl b/src/create_graph.tcl index 2dd3e10a..0d7b12f8 100644 --- a/src/create_graph.tcl +++ b/src/create_graph.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/draw.c b/src/draw.c index c2c6b913..a87b1166 100644 --- a/src/draw.c +++ b/src/draw.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/editprop.c b/src/editprop.c index ab3dfedd..80d427b7 100644 --- a/src/editprop.c +++ b/src/editprop.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/expandlabel.y b/src/expandlabel.y index 9c15e48e..e79af2a1 100644 --- a/src/expandlabel.y +++ b/src/expandlabel.y @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/findnet.c b/src/findnet.c index 247a5165..f71d5e0d 100644 --- a/src/findnet.c +++ b/src/findnet.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/flatten.awk b/src/flatten.awk index 04a04c53..a0dde7b5 100755 --- a/src/flatten.awk +++ b/src/flatten.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/flatten_savenodes.awk b/src/flatten_savenodes.awk index 635570f9..86f99ea0 100755 --- a/src/flatten_savenodes.awk +++ b/src/flatten_savenodes.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/flatten_tedax.awk b/src/flatten_tedax.awk index 0c54c0c1..3e78c6f6 100755 --- a/src/flatten_tedax.awk +++ b/src/flatten_tedax.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/font.c b/src/font.c index 299bbda2..663c449e 100644 --- a/src/font.c +++ b/src/font.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/globals.c b/src/globals.c index afbaf0f4..60ae9278 100644 --- a/src/globals.c +++ b/src/globals.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/gschemtoxschem.awk b/src/gschemtoxschem.awk index bbbdcfe3..23becd71 100755 --- a/src/gschemtoxschem.awk +++ b/src/gschemtoxschem.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/hash_iterator.c b/src/hash_iterator.c index b5c643da..fe0b3556 100644 --- a/src/hash_iterator.c +++ b/src/hash_iterator.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/hilight.c b/src/hilight.c index 966675c6..421bfb05 100644 --- a/src/hilight.c +++ b/src/hilight.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/hspice_backannotate.tcl b/src/hspice_backannotate.tcl index cc933d6c..faa92c6d 100644 --- a/src/hspice_backannotate.tcl +++ b/src/hspice_backannotate.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/icon.c b/src/icon.c index 9c599e9c..a1c1921b 100644 --- a/src/icon.c +++ b/src/icon.c @@ -4,7 +4,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/in_memory_undo.c b/src/in_memory_undo.c index 4f63a282..f1eae594 100644 --- a/src/in_memory_undo.c +++ b/src/in_memory_undo.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/main.c b/src/main.c index b533b4f7..f5644a5d 100644 --- a/src/main.c +++ b/src/main.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/make_sch_from_spice.awk b/src/make_sch_from_spice.awk index 542757ef..4092fcef 100755 --- a/src/make_sch_from_spice.awk +++ b/src/make_sch_from_spice.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/make_sym.awk b/src/make_sym.awk index de8358f7..0bf08b7a 100755 --- a/src/make_sym.awk +++ b/src/make_sym.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/make_sym_from_spice.awk b/src/make_sym_from_spice.awk index e6b0008c..9bcaeeea 100755 --- a/src/make_sym_from_spice.awk +++ b/src/make_sym_from_spice.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/make_sym_lcc.awk b/src/make_sym_lcc.awk index 39b76876..d995a258 100644 --- a/src/make_sym_lcc.awk +++ b/src/make_sym_lcc.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/move.c b/src/move.c index c51c95f0..660273cf 100644 --- a/src/move.c +++ b/src/move.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/netlist.c b/src/netlist.c index e4111057..3262ca9f 100644 --- a/src/netlist.c +++ b/src/netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/ngspice_backannotate.tcl b/src/ngspice_backannotate.tcl index 34708cc9..cb358658 100644 --- a/src/ngspice_backannotate.tcl +++ b/src/ngspice_backannotate.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/node_hash.c b/src/node_hash.c index ee4bce28..7bcf3f2f 100644 --- a/src/node_hash.c +++ b/src/node_hash.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/options.c b/src/options.c index fe701b51..b2c3a92a 100644 --- a/src/options.c +++ b/src/options.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/order_labels.awk b/src/order_labels.awk index 948e0b3e..eb414bdd 100755 --- a/src/order_labels.awk +++ b/src/order_labels.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/parselabel.l b/src/parselabel.l index 8c82ee98..8ef05a4a 100644 --- a/src/parselabel.l +++ b/src/parselabel.l @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/paste.c b/src/paste.c index 885d15c2..b9baf9b6 100644 --- a/src/paste.c +++ b/src/paste.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/psprint.c b/src/psprint.c index 289052a0..af067222 100644 --- a/src/psprint.c +++ b/src/psprint.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/rawtovcd.c b/src/rawtovcd.c index 75112d09..2716a5a6 100644 --- a/src/rawtovcd.c +++ b/src/rawtovcd.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/resources.tcl b/src/resources.tcl index 1f360320..0ce6768d 100644 --- a/src/resources.tcl +++ b/src/resources.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/save.c b/src/save.c index 8a613619..007853a1 100644 --- a/src/save.c +++ b/src/save.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/scheduler.c b/src/scheduler.c index 62fbdbe6..e0f947c8 100644 --- a/src/scheduler.c +++ b/src/scheduler.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/select.c b/src/select.c index 3e54b142..a45ee5dd 100644 --- a/src/select.c +++ b/src/select.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/sort_labels.awk b/src/sort_labels.awk index 4ae0cc0f..57368db6 100755 --- a/src/sort_labels.awk +++ b/src/sort_labels.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/spectre.awk b/src/spectre.awk index 8272ae10..75f15037 100755 --- a/src/spectre.awk +++ b/src/spectre.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/spectre_netlist.c b/src/spectre_netlist.c index 5ffa496f..c6509305 100644 --- a/src/spectre_netlist.c +++ b/src/spectre_netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/spice.awk b/src/spice.awk index 2e55ac10..9b41eff1 100755 --- a/src/spice.awk +++ b/src/spice.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/spice_netlist.c b/src/spice_netlist.c index 4e7cdf07..027ead3b 100644 --- a/src/spice_netlist.c +++ b/src/spice_netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/store.c b/src/store.c index 87917fa7..be360187 100644 --- a/src/store.c +++ b/src/store.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/svgdraw.c b/src/svgdraw.c index 5bca011b..b44936c5 100644 --- a/src/svgdraw.c +++ b/src/svgdraw.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/symgen.awk b/src/symgen.awk index 6385092c..87aa18c2 100755 --- a/src/symgen.awk +++ b/src/symgen.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/tedax.awk b/src/tedax.awk index 813ba711..375617ec 100755 --- a/src/tedax.awk +++ b/src/tedax.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/tedax_netlist.c b/src/tedax_netlist.c index 7ed0fc99..aa71df02 100644 --- a/src/tedax_netlist.c +++ b/src/tedax_netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/token.c b/src/token.c index d8702513..555c688f 100644 --- a/src/token.c +++ b/src/token.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/utile/clock.awk b/src/utile/clock.awk index 00f44e2f..b8cc7259 100755 --- a/src/utile/clock.awk +++ b/src/utile/clock.awk @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/utile/expand_alias.awk b/src/utile/expand_alias.awk index 7a390209..d1f72eb0 100755 --- a/src/utile/expand_alias.awk +++ b/src/utile/expand_alias.awk @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/utile/param.awk b/src/utile/param.awk index e8832735..d42e7acd 100755 --- a/src/utile/param.awk +++ b/src/utile/param.awk @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/utile/preprocess.awk b/src/utile/preprocess.awk index ebeee1ad..f0471c57 100755 --- a/src/utile/preprocess.awk +++ b/src/utile/preprocess.awk @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/utile/stimuli.awk b/src/utile/stimuli.awk index 44eb88a0..4b267af4 100755 --- a/src/utile/stimuli.awk +++ b/src/utile/stimuli.awk @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/utile/utile.tcl b/src/utile/utile.tcl index e99fafdc..1ec3c61e 100755 --- a/src/utile/utile.tcl +++ b/src/utile/utile.tcl @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/verilog.awk b/src/verilog.awk index e7a06c15..d28a10d1 100755 --- a/src/verilog.awk +++ b/src/verilog.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/verilog_netlist.c b/src/verilog_netlist.c index e775710f..47eeb20d 100644 --- a/src/verilog_netlist.c +++ b/src/verilog_netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/vhdl.awk b/src/vhdl.awk index 2b23367d..79747640 100755 --- a/src/vhdl.awk +++ b/src/vhdl.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/vhdl_netlist.c b/src/vhdl_netlist.c index 497973ad..3d3c1d06 100644 --- a/src/vhdl_netlist.c +++ b/src/vhdl_netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/xinit.c b/src/xinit.c index 735edea8..94722cb5 100644 --- a/src/xinit.c +++ b/src/xinit.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/xschem.h b/src/xschem.h index 019981e1..3d7a2b9f 100644 --- a/src/xschem.h +++ b/src/xschem.h @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2024 Stefan Frederik Schippers + * Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/xschem.tcl b/src/xschem.tcl index 1cbf6e1c..8338d692 100644 --- a/src/xschem.tcl +++ b/src/xschem.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2024 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -6791,7 +6791,7 @@ proc about {} { button .about.link2 -text {https://github.com/StefanSchippers/xschem} -font Underline-Font -fg blue -relief flat button .about.link3 -text {Online XSCHEM Manual} -font Underline-Font -fg blue -relief flat button .about.link4 -text {Local XSCHEM Manual} -font Underline-Font -fg blue -relief flat - label .about.copyright -text "\n Copyright (C) 1998-2024 Stefan Schippers (stefan.schippers@gmail.com) \n + label .about.copyright -text "\n Copyright (C) 1998-2026 Stefan Schippers (stefan.schippers@gmail.com) \n This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE\n" button .about.close -text Close -command {destroy .about} -font {Sans 18} diff --git a/tests/create_save.tcl b/tests/create_save.tcl index 621dccf1..6f9e183e 100644 --- a/tests/create_save.tcl +++ b/tests/create_save.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2022 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/tests/netlisting.tcl b/tests/netlisting.tcl index 745c89a0..aadde1fd 100644 --- a/tests/netlisting.tcl +++ b/tests/netlisting.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2022 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/tests/open_close.tcl b/tests/open_close.tcl index 9b176f8d..32987530 100644 --- a/tests/open_close.tcl +++ b/tests/open_close.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2022 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/tests/run_regression.tcl b/tests/run_regression.tcl index bd96f67b..0e6ee284 100644 --- a/tests/run_regression.tcl +++ b/tests/run_regression.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/tests/test_utility.tcl b/tests/test_utility.tcl index 99939e6e..6f119af4 100644 --- a/tests/test_utility.tcl +++ b/tests/test_utility.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2022 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/bcd.sch b/xschem_library/binto7seg/bcd.sch index f6f73d74..10f699c2 100644 --- a/xschem_library/binto7seg/bcd.sch +++ b/xschem_library/binto7seg/bcd.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/bcd.sym b/xschem_library/binto7seg/bcd.sym index fc6ee1c5..d84f6250 100644 --- a/xschem_library/binto7seg/bcd.sym +++ b/xschem_library/binto7seg/bcd.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/sevenseg.sch b/xschem_library/binto7seg/sevenseg.sch index e9387c8d..bec51d8e 100644 --- a/xschem_library/binto7seg/sevenseg.sch +++ b/xschem_library/binto7seg/sevenseg.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/sevenseg.sym b/xschem_library/binto7seg/sevenseg.sym index 7d2cdbb9..75f244c6 100644 --- a/xschem_library/binto7seg/sevenseg.sym +++ b/xschem_library/binto7seg/sevenseg.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/sevenseg012.sch b/xschem_library/binto7seg/sevenseg012.sch index 9b915097..ede3c7bf 100644 --- a/xschem_library/binto7seg/sevenseg012.sch +++ b/xschem_library/binto7seg/sevenseg012.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/sevenseg012.sym b/xschem_library/binto7seg/sevenseg012.sym index 677eef38..3cdb35fa 100644 --- a/xschem_library/binto7seg/sevenseg012.sym +++ b/xschem_library/binto7seg/sevenseg012.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/top.sch b/xschem_library/binto7seg/top.sch index bafa0348..185b1f85 100644 --- a/xschem_library/binto7seg/top.sch +++ b/xschem_library/binto7seg/top.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/adc_bridge.sym b/xschem_library/devices/adc_bridge.sym index 6898624b..1792cb4e 100644 --- a/xschem_library/devices/adc_bridge.sym +++ b/xschem_library/devices/adc_bridge.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ammeter.sym b/xschem_library/devices/ammeter.sym index 29a96879..5d9752d6 100644 --- a/xschem_library/devices/ammeter.sym +++ b/xschem_library/devices/ammeter.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/arch_declarations.sym b/xschem_library/devices/arch_declarations.sym index f8349a52..1b33bdeb 100644 --- a/xschem_library/devices/arch_declarations.sym +++ b/xschem_library/devices/arch_declarations.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/architecture.sym b/xschem_library/devices/architecture.sym index 8ff1d5e2..7a12c4a2 100644 --- a/xschem_library/devices/architecture.sym +++ b/xschem_library/devices/architecture.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/asrc.sym b/xschem_library/devices/asrc.sym index 3295525f..cef09b88 100644 --- a/xschem_library/devices/asrc.sym +++ b/xschem_library/devices/asrc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/assign.sym b/xschem_library/devices/assign.sym index e4fede84..1efb4203 100644 --- a/xschem_library/devices/assign.sym +++ b/xschem_library/devices/assign.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/attributes.sym b/xschem_library/devices/attributes.sym index 807aa9a3..bd2df1a5 100644 --- a/xschem_library/devices/attributes.sym +++ b/xschem_library/devices/attributes.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/bsource.sym b/xschem_library/devices/bsource.sym index 7e642017..10646f6f 100644 --- a/xschem_library/devices/bsource.sym +++ b/xschem_library/devices/bsource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/bus_connect.sym b/xschem_library/devices/bus_connect.sym index 00ebd55b..126efb15 100644 --- a/xschem_library/devices/bus_connect.sym +++ b/xschem_library/devices/bus_connect.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/bus_connect_nolab.sym b/xschem_library/devices/bus_connect_nolab.sym index 2f6922b4..e3328283 100644 --- a/xschem_library/devices/bus_connect_nolab.sym +++ b/xschem_library/devices/bus_connect_nolab.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/bus_tap.sym b/xschem_library/devices/bus_tap.sym index f62d9282..ab195fad 100644 --- a/xschem_library/devices/bus_tap.sym +++ b/xschem_library/devices/bus_tap.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/capa-2.sym b/xschem_library/devices/capa-2.sym index 4a059733..5db6a741 100644 --- a/xschem_library/devices/capa-2.sym +++ b/xschem_library/devices/capa-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/capa.sym b/xschem_library/devices/capa.sym index 74124b43..b44b4dd5 100644 --- a/xschem_library/devices/capa.sym +++ b/xschem_library/devices/capa.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/cccs.sym b/xschem_library/devices/cccs.sym index 9aa06d0f..bcead72a 100644 --- a/xschem_library/devices/cccs.sym +++ b/xschem_library/devices/cccs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ccvs.sym b/xschem_library/devices/ccvs.sym index f5ced717..5d5585cd 100644 --- a/xschem_library/devices/ccvs.sym +++ b/xschem_library/devices/ccvs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/code.sym b/xschem_library/devices/code.sym index 4f17e379..841e556e 100644 --- a/xschem_library/devices/code.sym +++ b/xschem_library/devices/code.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/code_shown.sym b/xschem_library/devices/code_shown.sym index cb70fa8f..9b211930 100644 --- a/xschem_library/devices/code_shown.sym +++ b/xschem_library/devices/code_shown.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_10x2.sym b/xschem_library/devices/conn_10x2.sym index 296c36c0..2543fdb4 100644 --- a/xschem_library/devices/conn_10x2.sym +++ b/xschem_library/devices/conn_10x2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_14x1.sym b/xschem_library/devices/conn_14x1.sym index de865e6b..fdeadbdb 100644 --- a/xschem_library/devices/conn_14x1.sym +++ b/xschem_library/devices/conn_14x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_3x1.sym b/xschem_library/devices/conn_3x1.sym index f0ba3a39..fdbf61fc 100644 --- a/xschem_library/devices/conn_3x1.sym +++ b/xschem_library/devices/conn_3x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_4x1.sym b/xschem_library/devices/conn_4x1.sym index 7a54100c..5f0f0f65 100644 --- a/xschem_library/devices/conn_4x1.sym +++ b/xschem_library/devices/conn_4x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_6x1.sym b/xschem_library/devices/conn_6x1.sym index cbc0052e..250c7f6a 100644 --- a/xschem_library/devices/conn_6x1.sym +++ b/xschem_library/devices/conn_6x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_8x1.sym b/xschem_library/devices/conn_8x1.sym index 4205719d..14d6a313 100644 --- a/xschem_library/devices/conn_8x1.sym +++ b/xschem_library/devices/conn_8x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/connect.sym b/xschem_library/devices/connect.sym index 9fac7171..524a0797 100644 --- a/xschem_library/devices/connect.sym +++ b/xschem_library/devices/connect.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/connector.sym b/xschem_library/devices/connector.sym index 6b4a4353..05d3b241 100644 --- a/xschem_library/devices/connector.sym +++ b/xschem_library/devices/connector.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/crystal-2.sym b/xschem_library/devices/crystal-2.sym index 6e83795f..4328f493 100644 --- a/xschem_library/devices/crystal-2.sym +++ b/xschem_library/devices/crystal-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/crystal.sym b/xschem_library/devices/crystal.sym index 4016729a..f3ec1424 100644 --- a/xschem_library/devices/crystal.sym +++ b/xschem_library/devices/crystal.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/dac_bridge.sym b/xschem_library/devices/dac_bridge.sym index da7bef1c..40585e0c 100644 --- a/xschem_library/devices/dac_bridge.sym +++ b/xschem_library/devices/dac_bridge.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/delay.sym b/xschem_library/devices/delay.sym index ba906ba4..fcda2f7f 100644 --- a/xschem_library/devices/delay.sym +++ b/xschem_library/devices/delay.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/delay_line.sym b/xschem_library/devices/delay_line.sym index 8532d779..47a56a51 100644 --- a/xschem_library/devices/delay_line.sym +++ b/xschem_library/devices/delay_line.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/device_param_probe.sym b/xschem_library/devices/device_param_probe.sym index f2b7aef8..932078d1 100644 --- a/xschem_library/devices/device_param_probe.sym +++ b/xschem_library/devices/device_param_probe.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/diode.sym b/xschem_library/devices/diode.sym index c86ab8b1..0cfb71a3 100644 --- a/xschem_library/devices/diode.sym +++ b/xschem_library/devices/diode.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/filesource.sym b/xschem_library/devices/filesource.sym index d87f2f12..0a06cb9f 100644 --- a/xschem_library/devices/filesource.sym +++ b/xschem_library/devices/filesource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/flash_cell.sym b/xschem_library/devices/flash_cell.sym index c8185e49..4d8d1ad0 100644 --- a/xschem_library/devices/flash_cell.sym +++ b/xschem_library/devices/flash_cell.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/generic_pin.sym b/xschem_library/devices/generic_pin.sym index dad70030..1afa58de 100644 --- a/xschem_library/devices/generic_pin.sym +++ b/xschem_library/devices/generic_pin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/gnd.sym b/xschem_library/devices/gnd.sym index 4801680b..35209523 100644 --- a/xschem_library/devices/gnd.sym +++ b/xschem_library/devices/gnd.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ic.sym b/xschem_library/devices/ic.sym index 1a93e6c0..c7111b7c 100644 --- a/xschem_library/devices/ic.sym +++ b/xschem_library/devices/ic.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ind.sym b/xschem_library/devices/ind.sym index 3f8909b7..7c67a646 100644 --- a/xschem_library/devices/ind.sym +++ b/xschem_library/devices/ind.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/intuitive_interface_cheatsheet.sch b/xschem_library/devices/intuitive_interface_cheatsheet.sch index a25f0258..4d9afd46 100644 --- a/xschem_library/devices/intuitive_interface_cheatsheet.sch +++ b/xschem_library/devices/intuitive_interface_cheatsheet.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/intuitive_interface_cheatsheet.sym b/xschem_library/devices/intuitive_interface_cheatsheet.sym index b8a5b301..20442f59 100644 --- a/xschem_library/devices/intuitive_interface_cheatsheet.sym +++ b/xschem_library/devices/intuitive_interface_cheatsheet.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/iopin.sym b/xschem_library/devices/iopin.sym index ad34a70d..bf61e589 100644 --- a/xschem_library/devices/iopin.sym +++ b/xschem_library/devices/iopin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ipin.sym b/xschem_library/devices/ipin.sym index a9b80d5f..c100f010 100644 --- a/xschem_library/devices/ipin.sym +++ b/xschem_library/devices/ipin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/isource.sym b/xschem_library/devices/isource.sym index a0dec4dd..d253fe70 100644 --- a/xschem_library/devices/isource.sym +++ b/xschem_library/devices/isource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/isource_arith.sym b/xschem_library/devices/isource_arith.sym index 01ea4a99..4c479b8b 100644 --- a/xschem_library/devices/isource_arith.sym +++ b/xschem_library/devices/isource_arith.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/isource_pwl.sym b/xschem_library/devices/isource_pwl.sym index 2c9a47a5..2885bc4b 100644 --- a/xschem_library/devices/isource_pwl.sym +++ b/xschem_library/devices/isource_pwl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/isource_table.sym b/xschem_library/devices/isource_table.sym index 4ce95cf7..f1e95543 100644 --- a/xschem_library/devices/isource_table.sym +++ b/xschem_library/devices/isource_table.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/jumper.sym b/xschem_library/devices/jumper.sym index 68b1c87d..3e984142 100644 --- a/xschem_library/devices/jumper.sym +++ b/xschem_library/devices/jumper.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/k.sym b/xschem_library/devices/k.sym index 37b3f1ab..3e9d736c 100644 --- a/xschem_library/devices/k.sym +++ b/xschem_library/devices/k.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/lab_generic.sym b/xschem_library/devices/lab_generic.sym index dae6e28b..faef600b 100644 --- a/xschem_library/devices/lab_generic.sym +++ b/xschem_library/devices/lab_generic.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/lab_pin.sym b/xschem_library/devices/lab_pin.sym index 0f7182f3..59cdf130 100644 --- a/xschem_library/devices/lab_pin.sym +++ b/xschem_library/devices/lab_pin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/lab_show.sym b/xschem_library/devices/lab_show.sym index 794f348f..f8328ef2 100644 --- a/xschem_library/devices/lab_show.sym +++ b/xschem_library/devices/lab_show.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/lab_wire.sym b/xschem_library/devices/lab_wire.sym index b779491c..d964b0d4 100644 --- a/xschem_library/devices/lab_wire.sym +++ b/xschem_library/devices/lab_wire.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/launcher.sym b/xschem_library/devices/launcher.sym index 5a730289..2e29a6bd 100644 --- a/xschem_library/devices/launcher.sym +++ b/xschem_library/devices/launcher.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/led.sym b/xschem_library/devices/led.sym index c200b14a..f84ecb44 100644 --- a/xschem_library/devices/led.sym +++ b/xschem_library/devices/led.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist.sym b/xschem_library/devices/netlist.sym index 56050627..129c7d98 100644 --- a/xschem_library/devices/netlist.sym +++ b/xschem_library/devices/netlist.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist_at_end.sym b/xschem_library/devices/netlist_at_end.sym index ad447aeb..5a04235c 100644 --- a/xschem_library/devices/netlist_at_end.sym +++ b/xschem_library/devices/netlist_at_end.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist_not_shown.sym b/xschem_library/devices/netlist_not_shown.sym index 5c22a3e2..69797289 100644 --- a/xschem_library/devices/netlist_not_shown.sym +++ b/xschem_library/devices/netlist_not_shown.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist_not_shown_at_end.sym b/xschem_library/devices/netlist_not_shown_at_end.sym index 0f5ae728..58e68562 100644 --- a/xschem_library/devices/netlist_not_shown_at_end.sym +++ b/xschem_library/devices/netlist_not_shown_at_end.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist_options.sym b/xschem_library/devices/netlist_options.sym index 0777793c..49bcbc30 100644 --- a/xschem_library/devices/netlist_options.sym +++ b/xschem_library/devices/netlist_options.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ngspice_analog_delay.sym b/xschem_library/devices/ngspice_analog_delay.sym index 1c950342..762d21e9 100644 --- a/xschem_library/devices/ngspice_analog_delay.sym +++ b/xschem_library/devices/ngspice_analog_delay.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ngspice_get_expr.sym b/xschem_library/devices/ngspice_get_expr.sym index 3fe01250..46ed71b5 100644 --- a/xschem_library/devices/ngspice_get_expr.sym +++ b/xschem_library/devices/ngspice_get_expr.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ngspice_get_value.sym b/xschem_library/devices/ngspice_get_value.sym index 9c923d2f..386e6384 100644 --- a/xschem_library/devices/ngspice_get_value.sym +++ b/xschem_library/devices/ngspice_get_value.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ngspice_probe.sym b/xschem_library/devices/ngspice_probe.sym index 12d23cc1..2d6cfe6d 100644 --- a/xschem_library/devices/ngspice_probe.sym +++ b/xschem_library/devices/ngspice_probe.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/njfet.sym b/xschem_library/devices/njfet.sym index 9716f37d..37e3fb51 100644 --- a/xschem_library/devices/njfet.sym +++ b/xschem_library/devices/njfet.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos-sub.sym b/xschem_library/devices/nmos-sub.sym index 1e9d1a2f..946c912a 100644 --- a/xschem_library/devices/nmos-sub.sym +++ b/xschem_library/devices/nmos-sub.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos.sym b/xschem_library/devices/nmos.sym index f1c0fb0e..4fb98b62 100644 --- a/xschem_library/devices/nmos.sym +++ b/xschem_library/devices/nmos.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos3.sym b/xschem_library/devices/nmos3.sym index e0b78e6a..204bbf82 100644 --- a/xschem_library/devices/nmos3.sym +++ b/xschem_library/devices/nmos3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos4.sym b/xschem_library/devices/nmos4.sym index 23de3346..f99203ef 100644 --- a/xschem_library/devices/nmos4.sym +++ b/xschem_library/devices/nmos4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos4_depl.sym b/xschem_library/devices/nmos4_depl.sym index 5604b097..f988551f 100644 --- a/xschem_library/devices/nmos4_depl.sym +++ b/xschem_library/devices/nmos4_depl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/noconn.sym b/xschem_library/devices/noconn.sym index 1fe4a887..ed225bca 100644 --- a/xschem_library/devices/noconn.sym +++ b/xschem_library/devices/noconn.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/npn.sym b/xschem_library/devices/npn.sym index 915fdcc0..84769f0a 100644 --- a/xschem_library/devices/npn.sym +++ b/xschem_library/devices/npn.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/opin.sym b/xschem_library/devices/opin.sym index 75c248a8..8482e9e7 100644 --- a/xschem_library/devices/opin.sym +++ b/xschem_library/devices/opin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/package.sym b/xschem_library/devices/package.sym index fb060db9..787f7053 100644 --- a/xschem_library/devices/package.sym +++ b/xschem_library/devices/package.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/package_not_shown.sym b/xschem_library/devices/package_not_shown.sym index d0a35aaf..afe25356 100644 --- a/xschem_library/devices/package_not_shown.sym +++ b/xschem_library/devices/package_not_shown.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/param.sym b/xschem_library/devices/param.sym index 99c5e65a..a29caf28 100644 --- a/xschem_library/devices/param.sym +++ b/xschem_library/devices/param.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/param_agauss.sym b/xschem_library/devices/param_agauss.sym index f739d1c7..450b6ee3 100644 --- a/xschem_library/devices/param_agauss.sym +++ b/xschem_library/devices/param_agauss.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/parax_cap.sym b/xschem_library/devices/parax_cap.sym index 23f59cdb..dd5c2b51 100644 --- a/xschem_library/devices/parax_cap.sym +++ b/xschem_library/devices/parax_cap.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pjfet.sym b/xschem_library/devices/pjfet.sym index f30115a6..b8464bfc 100644 --- a/xschem_library/devices/pjfet.sym +++ b/xschem_library/devices/pjfet.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmos-sub.sym b/xschem_library/devices/pmos-sub.sym index a2e7e10e..cc89309e 100644 --- a/xschem_library/devices/pmos-sub.sym +++ b/xschem_library/devices/pmos-sub.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmos.sym b/xschem_library/devices/pmos.sym index 4b5692b9..57e693a2 100644 --- a/xschem_library/devices/pmos.sym +++ b/xschem_library/devices/pmos.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmos3.sym b/xschem_library/devices/pmos3.sym index 4c5ce25d..189c2e4e 100644 --- a/xschem_library/devices/pmos3.sym +++ b/xschem_library/devices/pmos3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.7RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmos4.sym b/xschem_library/devices/pmos4.sym index b02e25a8..a9a7d748 100644 --- a/xschem_library/devices/pmos4.sym +++ b/xschem_library/devices/pmos4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmoshv4.sym b/xschem_library/devices/pmoshv4.sym index 2b67f664..640bb504 100644 --- a/xschem_library/devices/pmoshv4.sym +++ b/xschem_library/devices/pmoshv4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmosnat.sym b/xschem_library/devices/pmosnat.sym index 80ab30b6..7106bdbf 100644 --- a/xschem_library/devices/pmosnat.sym +++ b/xschem_library/devices/pmosnat.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pnp.sym b/xschem_library/devices/pnp.sym index 788a30ef..742905d6 100644 --- a/xschem_library/devices/pnp.sym +++ b/xschem_library/devices/pnp.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/port_attributes.sym b/xschem_library/devices/port_attributes.sym index 707433f0..9f79a07d 100644 --- a/xschem_library/devices/port_attributes.sym +++ b/xschem_library/devices/port_attributes.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/res.sym b/xschem_library/devices/res.sym index b2498820..28b15a04 100644 --- a/xschem_library/devices/res.sym +++ b/xschem_library/devices/res.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/res3.sym b/xschem_library/devices/res3.sym index 262a16eb..53ba0a3e 100644 --- a/xschem_library/devices/res3.sym +++ b/xschem_library/devices/res3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/res_ac.sym b/xschem_library/devices/res_ac.sym index d8253016..7a861906 100644 --- a/xschem_library/devices/res_ac.sym +++ b/xschem_library/devices/res_ac.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/res_noisy.sym b/xschem_library/devices/res_noisy.sym index e3379219..e7a6a1da 100644 --- a/xschem_library/devices/res_noisy.sym +++ b/xschem_library/devices/res_noisy.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/rgb_led.sym b/xschem_library/devices/rgb_led.sym index be06d160..04b9eeee 100644 --- a/xschem_library/devices/rgb_led.sym +++ b/xschem_library/devices/rgb_led.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/rnmos4.sym b/xschem_library/devices/rnmos4.sym index 71d7346e..d2ec278b 100644 --- a/xschem_library/devices/rnmos4.sym +++ b/xschem_library/devices/rnmos4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/scope.sym b/xschem_library/devices/scope.sym index 7e36383f..20f264c3 100644 --- a/xschem_library/devices/scope.sym +++ b/xschem_library/devices/scope.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/scope2.sym b/xschem_library/devices/scope2.sym index ec7ec36f..b773d5e0 100644 --- a/xschem_library/devices/scope2.sym +++ b/xschem_library/devices/scope2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/scope_ammeter.sym b/xschem_library/devices/scope_ammeter.sym index 804b5366..c88b1ee0 100644 --- a/xschem_library/devices/scope_ammeter.sym +++ b/xschem_library/devices/scope_ammeter.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/short.sym b/xschem_library/devices/short.sym index 0a582a19..e44bac31 100644 --- a/xschem_library/devices/short.sym +++ b/xschem_library/devices/short.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/simulator_commands.sym b/xschem_library/devices/simulator_commands.sym index 6acf6e91..d4b0d00e 100644 --- a/xschem_library/devices/simulator_commands.sym +++ b/xschem_library/devices/simulator_commands.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/simulator_commands_shown.sym b/xschem_library/devices/simulator_commands_shown.sym index 074c382b..7ce47f51 100644 --- a/xschem_library/devices/simulator_commands_shown.sym +++ b/xschem_library/devices/simulator_commands_shown.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/spice_probe.sym b/xschem_library/devices/spice_probe.sym index 8d73a419..1aad4bfd 100644 --- a/xschem_library/devices/spice_probe.sym +++ b/xschem_library/devices/spice_probe.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/spice_probe_vdiff.sym b/xschem_library/devices/spice_probe_vdiff.sym index 243d235c..20c5f944 100644 --- a/xschem_library/devices/spice_probe_vdiff.sym +++ b/xschem_library/devices/spice_probe_vdiff.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/sqwsource.sym b/xschem_library/devices/sqwsource.sym index a84e9db2..16a331d5 100644 --- a/xschem_library/devices/sqwsource.sym +++ b/xschem_library/devices/sqwsource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/switch.sym b/xschem_library/devices/switch.sym index 11515746..62c8b858 100644 --- a/xschem_library/devices/switch.sym +++ b/xschem_library/devices/switch.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/switch_ngspice.sym b/xschem_library/devices/switch_ngspice.sym index b208ceab..836c13d6 100644 --- a/xschem_library/devices/switch_ngspice.sym +++ b/xschem_library/devices/switch_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.7RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/switch_v_xyce.sym b/xschem_library/devices/switch_v_xyce.sym index c1f662dc..944bcbc9 100644 --- a/xschem_library/devices/switch_v_xyce.sym +++ b/xschem_library/devices/switch_v_xyce.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/title-2.sym b/xschem_library/devices/title-2.sym index 44647c9b..29fcc9f9 100644 --- a/xschem_library/devices/title-2.sym +++ b/xschem_library/devices/title-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/title-3.sym b/xschem_library/devices/title-3.sym index ac4fc6cc..14f922d1 100644 --- a/xschem_library/devices/title-3.sym +++ b/xschem_library/devices/title-3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/title.sym b/xschem_library/devices/title.sym index 744f468c..e22ad3f8 100644 --- a/xschem_library/devices/title.sym +++ b/xschem_library/devices/title.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/use.sym b/xschem_library/devices/use.sym index f6969cfa..894238e5 100644 --- a/xschem_library/devices/use.sym +++ b/xschem_library/devices/use.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/var_res.sym b/xschem_library/devices/var_res.sym index a4c25ae9..2d3081b0 100644 --- a/xschem_library/devices/var_res.sym +++ b/xschem_library/devices/var_res.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vccs.sym b/xschem_library/devices/vccs.sym index ad1af064..b1f816b4 100644 --- a/xschem_library/devices/vccs.sym +++ b/xschem_library/devices/vccs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vcr.sym b/xschem_library/devices/vcr.sym index 5b9631ba..d8889044 100644 --- a/xschem_library/devices/vcr.sym +++ b/xschem_library/devices/vcr.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vcvs.sym b/xschem_library/devices/vcvs.sym index 5be8c288..9ceac99b 100644 --- a/xschem_library/devices/vcvs.sym +++ b/xschem_library/devices/vcvs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vdd.sym b/xschem_library/devices/vdd.sym index f81db1d1..9271cc95 100644 --- a/xschem_library/devices/vdd.sym +++ b/xschem_library/devices/vdd.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/verilog_delay.sch b/xschem_library/devices/verilog_delay.sch index 2d6189a8..bd14552f 100644 --- a/xschem_library/devices/verilog_delay.sch +++ b/xschem_library/devices/verilog_delay.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/verilog_delay.sym b/xschem_library/devices/verilog_delay.sym index e1713ea2..d4d9de72 100644 --- a/xschem_library/devices/verilog_delay.sym +++ b/xschem_library/devices/verilog_delay.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/verilog_preprocessor.sym b/xschem_library/devices/verilog_preprocessor.sym index f047a600..4d99cb7d 100644 --- a/xschem_library/devices/verilog_preprocessor.sym +++ b/xschem_library/devices/verilog_preprocessor.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/verilog_timescale.sym b/xschem_library/devices/verilog_timescale.sym index d9811bc7..b72ec401 100644 --- a/xschem_library/devices/verilog_timescale.sym +++ b/xschem_library/devices/verilog_timescale.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vsource.sym b/xschem_library/devices/vsource.sym index bf1501c4..01b3db9a 100644 --- a/xschem_library/devices/vsource.sym +++ b/xschem_library/devices/vsource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vsource_arith.sym b/xschem_library/devices/vsource_arith.sym index 83b86a27..d91027c9 100644 --- a/xschem_library/devices/vsource_arith.sym +++ b/xschem_library/devices/vsource_arith.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vsource_pwl.sym b/xschem_library/devices/vsource_pwl.sym index 71b9a65b..fe9487e5 100644 --- a/xschem_library/devices/vsource_pwl.sym +++ b/xschem_library/devices/vsource_pwl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/zener.sym b/xschem_library/devices/zener.sym index c87ea235..6689e88f 100644 --- a/xschem_library/devices/zener.sym +++ b/xschem_library/devices/zener.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/0_examples_top.sch b/xschem_library/examples/0_examples_top.sch index 1be1824e..5504fff9 100644 --- a/xschem_library/examples/0_examples_top.sch +++ b/xschem_library/examples/0_examples_top.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/LCC_instances.sch b/xschem_library/examples/LCC_instances.sch index 1d4b21d0..d189f916 100644 --- a/xschem_library/examples/LCC_instances.sch +++ b/xschem_library/examples/LCC_instances.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/LCC_instances.sym b/xschem_library/examples/LCC_instances.sym index e4d06368..1d73ca2c 100644 --- a/xschem_library/examples/LCC_instances.sym +++ b/xschem_library/examples/LCC_instances.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/LM5134A.sch b/xschem_library/examples/LM5134A.sch index 7fb466e6..f007dbe2 100644 --- a/xschem_library/examples/LM5134A.sch +++ b/xschem_library/examples/LM5134A.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/LM5134A.sym b/xschem_library/examples/LM5134A.sym index 51bbd3ea..2cc2c8ae 100644 --- a/xschem_library/examples/LM5134A.sym +++ b/xschem_library/examples/LM5134A.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/MSA-2643.sch b/xschem_library/examples/MSA-2643.sch index af4aac3b..0ccf624d 100644 --- a/xschem_library/examples/MSA-2643.sch +++ b/xschem_library/examples/MSA-2643.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/Q1.sch b/xschem_library/examples/Q1.sch index 67843d86..8d87d856 100644 --- a/xschem_library/examples/Q1.sch +++ b/xschem_library/examples/Q1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/Q1.sym b/xschem_library/examples/Q1.sym index 68289177..6a252d80 100644 --- a/xschem_library/examples/Q1.sym +++ b/xschem_library/examples/Q1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/Q2.sch b/xschem_library/examples/Q2.sch index bb1c2686..628dd4c2 100644 --- a/xschem_library/examples/Q2.sch +++ b/xschem_library/examples/Q2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/Q2.sym b/xschem_library/examples/Q2.sym index 68289177..6a252d80 100644 --- a/xschem_library/examples/Q2.sym +++ b/xschem_library/examples/Q2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/SYMBOL_include.sch b/xschem_library/examples/SYMBOL_include.sch index 5d9c82c0..e7a4380f 100644 --- a/xschem_library/examples/SYMBOL_include.sch +++ b/xschem_library/examples/SYMBOL_include.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/SYMBOL_include.sym b/xschem_library/examples/SYMBOL_include.sym index c0914f09..321b487b 100644 --- a/xschem_library/examples/SYMBOL_include.sym +++ b/xschem_library/examples/SYMBOL_include.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/TwoStageAmp.sch b/xschem_library/examples/TwoStageAmp.sch index f3886de1..10aa1dee 100644 --- a/xschem_library/examples/TwoStageAmp.sch +++ b/xschem_library/examples/TwoStageAmp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/an2.sym b/xschem_library/examples/an2.sym index 1a8d9fbf..fef1bee8 100644 --- a/xschem_library/examples/an2.sym +++ b/xschem_library/examples/an2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/and.sym b/xschem_library/examples/and.sym index c6bb5f53..261d0553 100644 --- a/xschem_library/examples/and.sym +++ b/xschem_library/examples/and.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/ao21.sym b/xschem_library/examples/ao21.sym index 760ffbaf..a6772396 100644 --- a/xschem_library/examples/ao21.sym +++ b/xschem_library/examples/ao21.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/buf.sym b/xschem_library/examples/buf.sym index 39e7237f..cc47449d 100644 --- a/xschem_library/examples/buf.sym +++ b/xschem_library/examples/buf.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/bus_keeper.sch b/xschem_library/examples/bus_keeper.sch index d6ff798d..04557020 100644 --- a/xschem_library/examples/bus_keeper.sch +++ b/xschem_library/examples/bus_keeper.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/classD_amp.sch b/xschem_library/examples/classD_amp.sch index 68ec1591..cbd45068 100644 --- a/xschem_library/examples/classD_amp.sch +++ b/xschem_library/examples/classD_amp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/classD_amp.sym b/xschem_library/examples/classD_amp.sym index 17adad8c..2e17217a 100644 --- a/xschem_library/examples/classD_amp.sym +++ b/xschem_library/examples/classD_amp.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/cmos_example.sch b/xschem_library/examples/cmos_example.sch index d90a783a..cef211a9 100644 --- a/xschem_library/examples/cmos_example.sch +++ b/xschem_library/examples/cmos_example.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/cmos_example.sym b/xschem_library/examples/cmos_example.sym index 4f8da95f..ff1ec9a8 100644 --- a/xschem_library/examples/cmos_example.sym +++ b/xschem_library/examples/cmos_example.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/cmos_inv.sch b/xschem_library/examples/cmos_inv.sch index 556573eb..e969d464 100644 --- a/xschem_library/examples/cmos_inv.sch +++ b/xschem_library/examples/cmos_inv.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/cmos_inv.sym b/xschem_library/examples/cmos_inv.sym index 0f72cfaf..fa420653 100644 --- a/xschem_library/examples/cmos_inv.sym +++ b/xschem_library/examples/cmos_inv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/diode_1.sch b/xschem_library/examples/diode_1.sch index 816c46f0..d08f3777 100644 --- a/xschem_library/examples/diode_1.sch +++ b/xschem_library/examples/diode_1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/diode_1.sym b/xschem_library/examples/diode_1.sym index 258b9add..ae9fc1ec 100644 --- a/xschem_library/examples/diode_1.sym +++ b/xschem_library/examples/diode_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/dlatch.sch b/xschem_library/examples/dlatch.sch index 0548ce49..aa48c409 100644 --- a/xschem_library/examples/dlatch.sch +++ b/xschem_library/examples/dlatch.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/dlatch.sym b/xschem_library/examples/dlatch.sym index f6ca4498..d6e221da 100644 --- a/xschem_library/examples/dlatch.sym +++ b/xschem_library/examples/dlatch.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/doublepin.sch b/xschem_library/examples/doublepin.sch index cb6172a7..cf56a8d2 100644 --- a/xschem_library/examples/doublepin.sch +++ b/xschem_library/examples/doublepin.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/doublepin.sym b/xschem_library/examples/doublepin.sym index 182a07a6..6540aff7 100644 --- a/xschem_library/examples/doublepin.sym +++ b/xschem_library/examples/doublepin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/flop.sch b/xschem_library/examples/flop.sch index 6815ff6e..b7ba7862 100644 --- a/xschem_library/examples/flop.sch +++ b/xschem_library/examples/flop.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/flop.sym b/xschem_library/examples/flop.sym index a23f7ba0..5a5380df 100644 --- a/xschem_library/examples/flop.sym +++ b/xschem_library/examples/flop.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/greycnt.sch b/xschem_library/examples/greycnt.sch index ced4a3f5..9254fbca 100644 --- a/xschem_library/examples/greycnt.sch +++ b/xschem_library/examples/greycnt.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/greycnt.sym b/xschem_library/examples/greycnt.sym index d1f9554c..14b37d12 100644 --- a/xschem_library/examples/greycnt.sym +++ b/xschem_library/examples/greycnt.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/inv_bsource.sym b/xschem_library/examples/inv_bsource.sym index 26859f2d..e7c0be31 100644 --- a/xschem_library/examples/inv_bsource.sym +++ b/xschem_library/examples/inv_bsource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lightning.sch b/xschem_library/examples/lightning.sch index 889b56c0..d9dfaf8b 100644 --- a/xschem_library/examples/lightning.sch +++ b/xschem_library/examples/lightning.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm317.sch b/xschem_library/examples/lm317.sch index 150810c6..fefbd776 100644 --- a/xschem_library/examples/lm317.sch +++ b/xschem_library/examples/lm317.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm317.sym b/xschem_library/examples/lm317.sym index c061994a..892d5778 100644 --- a/xschem_library/examples/lm317.sym +++ b/xschem_library/examples/lm317.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm324.sym b/xschem_library/examples/lm324.sym index 386d5389..0556d837 100644 --- a/xschem_library/examples/lm324.sym +++ b/xschem_library/examples/lm324.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm337.sch b/xschem_library/examples/lm337.sch index 150810c6..fefbd776 100644 --- a/xschem_library/examples/lm337.sch +++ b/xschem_library/examples/lm337.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm337.sym b/xschem_library/examples/lm337.sym index 9c4ad025..285c1a77 100644 --- a/xschem_library/examples/lm337.sym +++ b/xschem_library/examples/lm337.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/loading.sch b/xschem_library/examples/loading.sch index ccb6013a..a7a68633 100644 --- a/xschem_library/examples/loading.sch +++ b/xschem_library/examples/loading.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/loading.sym b/xschem_library/examples/loading.sym index 2667f8bd..47412eac 100644 --- a/xschem_library/examples/loading.sym +++ b/xschem_library/examples/loading.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/mos_power_ampli.sch b/xschem_library/examples/mos_power_ampli.sch index e6c178dc..db1cc72a 100644 --- a/xschem_library/examples/mos_power_ampli.sch +++ b/xschem_library/examples/mos_power_ampli.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/mos_power_ampli.sym b/xschem_library/examples/mos_power_ampli.sym index 7f5cb699..2ee5c744 100644 --- a/xschem_library/examples/mos_power_ampli.sym +++ b/xschem_library/examples/mos_power_ampli.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/mos_power_ampli_extracted.sch b/xschem_library/examples/mos_power_ampli_extracted.sch index 9801f838..225d4e12 100644 --- a/xschem_library/examples/mos_power_ampli_extracted.sch +++ b/xschem_library/examples/mos_power_ampli_extracted.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/mos_power_ampli_extracted.sym b/xschem_library/examples/mos_power_ampli_extracted.sym index 21afbd49..a6461a1c 100644 --- a/xschem_library/examples/mos_power_ampli_extracted.sym +++ b/xschem_library/examples/mos_power_ampli_extracted.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nand.sym b/xschem_library/examples/nand.sym index 2aef350d..816b0d58 100644 --- a/xschem_library/examples/nand.sym +++ b/xschem_library/examples/nand.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nand2.sch b/xschem_library/examples/nand2.sch index c94b2d58..3f966751 100644 --- a/xschem_library/examples/nand2.sch +++ b/xschem_library/examples/nand2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nand2.sym b/xschem_library/examples/nand2.sym index 7cb549de..3b4586e1 100644 --- a/xschem_library/examples/nand2.sym +++ b/xschem_library/examples/nand2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nand3.sym b/xschem_library/examples/nand3.sym index 05586bea..1003684c 100644 --- a/xschem_library/examples/nand3.sym +++ b/xschem_library/examples/nand3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nd2-1.sym b/xschem_library/examples/nd2-1.sym index 044b3ed6..52da2f8d 100644 --- a/xschem_library/examples/nd2-1.sym +++ b/xschem_library/examples/nd2-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/ne555.sym b/xschem_library/examples/ne555.sym index 825775e7..7df9f89f 100644 --- a/xschem_library/examples/ne555.sym +++ b/xschem_library/examples/ne555.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/not.sym b/xschem_library/examples/not.sym index 375ceb76..5fcbe8b6 100644 --- a/xschem_library/examples/not.sym +++ b/xschem_library/examples/not.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nr2-1.sym b/xschem_library/examples/nr2-1.sym index 1dc5f4f7..3a8dd4c2 100644 --- a/xschem_library/examples/nr2-1.sym +++ b/xschem_library/examples/nr2-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/or2.sym b/xschem_library/examples/or2.sym index c13d864e..1180e050 100644 --- a/xschem_library/examples/or2.sym +++ b/xschem_library/examples/or2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/osc.sch b/xschem_library/examples/osc.sch index 754dc31f..26e86693 100644 --- a/xschem_library/examples/osc.sch +++ b/xschem_library/examples/osc.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/osc.sym b/xschem_library/examples/osc.sym index 4f8da95f..ff1ec9a8 100644 --- a/xschem_library/examples/osc.sym +++ b/xschem_library/examples/osc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/plot_manipulation.sch b/xschem_library/examples/plot_manipulation.sch index b0422a46..79259893 100644 --- a/xschem_library/examples/plot_manipulation.sch +++ b/xschem_library/examples/plot_manipulation.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/plot_manipulation.sym b/xschem_library/examples/plot_manipulation.sym index a2b4d53c..4f4be05c 100644 --- a/xschem_library/examples/plot_manipulation.sym +++ b/xschem_library/examples/plot_manipulation.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp.sch b/xschem_library/examples/poweramp.sch index 65591d7a..9f53f79b 100644 --- a/xschem_library/examples/poweramp.sch +++ b/xschem_library/examples/poweramp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp.sym b/xschem_library/examples/poweramp.sym index 5aef3d49..d1632432 100644 --- a/xschem_library/examples/poweramp.sym +++ b/xschem_library/examples/poweramp.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp_lcc.sch b/xschem_library/examples/poweramp_lcc.sch index c0ceff68..5bcdf90e 100644 --- a/xschem_library/examples/poweramp_lcc.sch +++ b/xschem_library/examples/poweramp_lcc.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp_lcc.sym b/xschem_library/examples/poweramp_lcc.sym index 5aef3d49..d1632432 100644 --- a/xschem_library/examples/poweramp_lcc.sym +++ b/xschem_library/examples/poweramp_lcc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp_xyce.sch b/xschem_library/examples/poweramp_xyce.sch index a744dd6e..95ae6f1e 100644 --- a/xschem_library/examples/poweramp_xyce.sch +++ b/xschem_library/examples/poweramp_xyce.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp_xyce.sym b/xschem_library/examples/poweramp_xyce.sym index d681d23d..1caa712b 100644 --- a/xschem_library/examples/poweramp_xyce.sym +++ b/xschem_library/examples/poweramp_xyce.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/pump.sch b/xschem_library/examples/pump.sch index f521fc07..a7e84857 100644 --- a/xschem_library/examples/pump.sch +++ b/xschem_library/examples/pump.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/pump.sym b/xschem_library/examples/pump.sym index 0886fe6e..aeb4a1b6 100644 --- a/xschem_library/examples/pump.sym +++ b/xschem_library/examples/pump.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/rcline.sch b/xschem_library/examples/rcline.sch index b231e1e6..707a4153 100644 --- a/xschem_library/examples/rcline.sch +++ b/xschem_library/examples/rcline.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/rcline.sym b/xschem_library/examples/rcline.sym index d0e057e6..56fe4940 100644 --- a/xschem_library/examples/rcline.sym +++ b/xschem_library/examples/rcline.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/real_capa.sch b/xschem_library/examples/real_capa.sch index bbdcfcec..50e440d8 100644 --- a/xschem_library/examples/real_capa.sch +++ b/xschem_library/examples/real_capa.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/real_capa.sym b/xschem_library/examples/real_capa.sym index 44fa6ab7..30c19cec 100644 --- a/xschem_library/examples/real_capa.sym +++ b/xschem_library/examples/real_capa.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/rlc.sch b/xschem_library/examples/rlc.sch index f754ccf0..be87ffca 100644 --- a/xschem_library/examples/rlc.sch +++ b/xschem_library/examples/rlc.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/rlc.sym b/xschem_library/examples/rlc.sym index a3a0cdef..8e01ba9b 100644 --- a/xschem_library/examples/rlc.sym +++ b/xschem_library/examples/rlc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/sr_flop.sch b/xschem_library/examples/sr_flop.sch index 2e59bca5..bb5af00f 100644 --- a/xschem_library/examples/sr_flop.sch +++ b/xschem_library/examples/sr_flop.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/sr_flop.sym b/xschem_library/examples/sr_flop.sym index bf4fb409..0b14f7f2 100644 --- a/xschem_library/examples/sr_flop.sym +++ b/xschem_library/examples/sr_flop.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/switch_rreal.sch b/xschem_library/examples/switch_rreal.sch index d7b2d9e2..e43a228a 100644 --- a/xschem_library/examples/switch_rreal.sch +++ b/xschem_library/examples/switch_rreal.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/switch_rreal.sym b/xschem_library/examples/switch_rreal.sym index 4d3c8fe1..f29b9149 100644 --- a/xschem_library/examples/switch_rreal.sym +++ b/xschem_library/examples/switch_rreal.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/symbol_include2.sch b/xschem_library/examples/symbol_include2.sch index 3e7352f4..56ce0cd5 100644 --- a/xschem_library/examples/symbol_include2.sch +++ b/xschem_library/examples/symbol_include2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/tb_symbol_include.sch b/xschem_library/examples/tb_symbol_include.sch index 1a0d2f02..efbed727 100644 --- a/xschem_library/examples/tb_symbol_include.sch +++ b/xschem_library/examples/tb_symbol_include.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/tb_symbol_include.sym b/xschem_library/examples/tb_symbol_include.sym index eeae0928..e993e838 100644 --- a/xschem_library/examples/tb_symbol_include.sym +++ b/xschem_library/examples/tb_symbol_include.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/tesla.sch b/xschem_library/examples/tesla.sch index 27724077..364959fc 100644 --- a/xschem_library/examples/tesla.sch +++ b/xschem_library/examples/tesla.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/tesla.sym b/xschem_library/examples/tesla.sym index 4f8da95f..ff1ec9a8 100644 --- a/xschem_library/examples/tesla.sym +++ b/xschem_library/examples/tesla.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test.sch b/xschem_library/examples/test.sch index 87d22b9c..361ebed6 100644 --- a/xschem_library/examples/test.sch +++ b/xschem_library/examples/test.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test2.sch b/xschem_library/examples/test2.sch index 7eb2689a..bb1d9a24 100644 --- a/xschem_library/examples/test2.sch +++ b/xschem_library/examples/test2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ac.sch b/xschem_library/examples/test_ac.sch index 925eec9a..27e43679 100644 --- a/xschem_library/examples/test_ac.sch +++ b/xschem_library/examples/test_ac.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ac.sym b/xschem_library/examples/test_ac.sym index b63e958a..392ed440 100644 --- a/xschem_library/examples/test_ac.sym +++ b/xschem_library/examples/test_ac.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ac_xyce.sch b/xschem_library/examples/test_ac_xyce.sch index ca281d8c..9d369264 100644 --- a/xschem_library/examples/test_ac_xyce.sch +++ b/xschem_library/examples/test_ac_xyce.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ac_xyce.sym b/xschem_library/examples/test_ac_xyce.sym index e53fcaab..2a953f1a 100644 --- a/xschem_library/examples/test_ac_xyce.sym +++ b/xschem_library/examples/test_ac_xyce.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_backannotated_subckt.sch b/xschem_library/examples/test_backannotated_subckt.sch index 5e92aa0b..319dc821 100644 --- a/xschem_library/examples/test_backannotated_subckt.sch +++ b/xschem_library/examples/test_backannotated_subckt.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_backannotated_subckt.sym b/xschem_library/examples/test_backannotated_subckt.sym index bc4feb27..7a0d9286 100644 --- a/xschem_library/examples/test_backannotated_subckt.sym +++ b/xschem_library/examples/test_backannotated_subckt.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_bus_tap.sch b/xschem_library/examples/test_bus_tap.sch index b80f9020..4c0c4447 100644 --- a/xschem_library/examples/test_bus_tap.sch +++ b/xschem_library/examples/test_bus_tap.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_bus_tap.sym b/xschem_library/examples/test_bus_tap.sym index e53fcaab..2a953f1a 100644 --- a/xschem_library/examples/test_bus_tap.sym +++ b/xschem_library/examples/test_bus_tap.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_doublepin.sch b/xschem_library/examples/test_doublepin.sch index d94d19ff..fdeb801f 100644 --- a/xschem_library/examples/test_doublepin.sch +++ b/xschem_library/examples/test_doublepin.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_doublepin.sym b/xschem_library/examples/test_doublepin.sym index b88691e6..f0463d4f 100644 --- a/xschem_library/examples/test_doublepin.sym +++ b/xschem_library/examples/test_doublepin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_extracted_netlist.sch b/xschem_library/examples/test_extracted_netlist.sch index 9325e70f..e543d57a 100644 --- a/xschem_library/examples/test_extracted_netlist.sch +++ b/xschem_library/examples/test_extracted_netlist.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_extracted_netlist.sym b/xschem_library/examples/test_extracted_netlist.sym index 5aef3d49..d1632432 100644 --- a/xschem_library/examples/test_extracted_netlist.sym +++ b/xschem_library/examples/test_extracted_netlist.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_jfet.sch b/xschem_library/examples/test_jfet.sch index 258fd117..69875330 100644 --- a/xschem_library/examples/test_jfet.sch +++ b/xschem_library/examples/test_jfet.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_jfet.sym b/xschem_library/examples/test_jfet.sym index e53fcaab..2a953f1a 100644 --- a/xschem_library/examples/test_jfet.sym +++ b/xschem_library/examples/test_jfet.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_lm324.sch b/xschem_library/examples/test_lm324.sch index 03ea93a6..af2b337a 100644 --- a/xschem_library/examples/test_lm324.sch +++ b/xschem_library/examples/test_lm324.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_lm324.sym b/xschem_library/examples/test_lm324.sym index 4f8da95f..ff1ec9a8 100644 --- a/xschem_library/examples/test_lm324.sym +++ b/xschem_library/examples/test_lm324.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_lvs_ignore.sch b/xschem_library/examples/test_lvs_ignore.sch index 9d4b2de4..50713ad8 100644 --- a/xschem_library/examples/test_lvs_ignore.sch +++ b/xschem_library/examples/test_lvs_ignore.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_lvs_ignore.sym b/xschem_library/examples/test_lvs_ignore.sym index a2b4d53c..4f4be05c 100644 --- a/xschem_library/examples/test_lvs_ignore.sym +++ b/xschem_library/examples/test_lvs_ignore.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ne555.sch b/xschem_library/examples/test_ne555.sch index 2f5cafbf..713514fa 100644 --- a/xschem_library/examples/test_ne555.sch +++ b/xschem_library/examples/test_ne555.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ne555.sym b/xschem_library/examples/test_ne555.sym index 44b6fed2..765d24cf 100644 --- a/xschem_library/examples/test_ne555.sym +++ b/xschem_library/examples/test_ne555.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_nyquist.sch b/xschem_library/examples/test_nyquist.sch index 6f004ad0..8e32b02c 100644 --- a/xschem_library/examples/test_nyquist.sch +++ b/xschem_library/examples/test_nyquist.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_nyquist.sym b/xschem_library/examples/test_nyquist.sym index 84125835..3343379b 100644 --- a/xschem_library/examples/test_nyquist.sym +++ b/xschem_library/examples/test_nyquist.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_short_option.sch b/xschem_library/examples/test_short_option.sch index d19eb3d7..b654161c 100644 --- a/xschem_library/examples/test_short_option.sch +++ b/xschem_library/examples/test_short_option.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_short_option.sym b/xschem_library/examples/test_short_option.sym index a2b4d53c..4f4be05c 100644 --- a/xschem_library/examples/test_short_option.sym +++ b/xschem_library/examples/test_short_option.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/xcross.sch b/xschem_library/examples/xcross.sch index f1b14eae..4a7eedaa 100644 --- a/xschem_library/examples/xcross.sch +++ b/xschem_library/examples/xcross.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/xcross.sym b/xschem_library/examples/xcross.sym index 29522b19..1a25fbcd 100644 --- a/xschem_library/examples/xcross.sym +++ b/xschem_library/examples/xcross.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/xnor.sch b/xschem_library/examples/xnor.sch index eba100ee..c01edb3d 100644 --- a/xschem_library/examples/xnor.sch +++ b/xschem_library/examples/xnor.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/xnor.sym b/xschem_library/examples/xnor.sym index e11e9cd7..c0ebbdfb 100644 --- a/xschem_library/examples/xnor.sym +++ b/xschem_library/examples/xnor.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/my_inv.sch b/xschem_library/generators/my_inv.sch index 500a7b54..cde34a2a 100644 --- a/xschem_library/generators/my_inv.sch +++ b/xschem_library/generators/my_inv.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/my_inv.sym b/xschem_library/generators/my_inv.sym index 3cec65f8..089a8fe5 100644 --- a/xschem_library/generators/my_inv.sym +++ b/xschem_library/generators/my_inv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_generators.sch b/xschem_library/generators/test_generators.sch index 4cafb4bb..608fe099 100644 --- a/xschem_library/generators/test_generators.sch +++ b/xschem_library/generators/test_generators.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_generators.sym b/xschem_library/generators/test_generators.sym index d5aac9be..7691015c 100644 --- a/xschem_library/generators/test_generators.sym +++ b/xschem_library/generators/test_generators.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_mosgen.sch b/xschem_library/generators/test_mosgen.sch index 6d0d54d0..327f5c29 100644 --- a/xschem_library/generators/test_mosgen.sch +++ b/xschem_library/generators/test_mosgen.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_symbolgen.sch b/xschem_library/generators/test_symbolgen.sch index 8155747f..37b47b6e 100644 --- a/xschem_library/generators/test_symbolgen.sch +++ b/xschem_library/generators/test_symbolgen.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_symbolgen.sym b/xschem_library/generators/test_symbolgen.sym index b88691e6..f0463d4f 100644 --- a/xschem_library/generators/test_symbolgen.sym +++ b/xschem_library/generators/test_symbolgen.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/24Cxx-1.sym b/xschem_library/gschem_import/24Cxx-1.sym index a020362e..e8d342f6 100644 --- a/xschem_library/gschem_import/24Cxx-1.sym +++ b/xschem_library/gschem_import/24Cxx-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/2N4401.sym b/xschem_library/gschem_import/2N4401.sym index 08d3a822..546fb9b3 100644 --- a/xschem_library/gschem_import/2N4401.sym +++ b/xschem_library/gschem_import/2N4401.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/2N4403.sym b/xschem_library/gschem_import/2N4403.sym index cacd9f6c..000266bb 100644 --- a/xschem_library/gschem_import/2N4403.sym +++ b/xschem_library/gschem_import/2N4403.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/3.3V-plus-1.sym b/xschem_library/gschem_import/3.3V-plus-1.sym index 7a4a10f3..fc2d5821 100644 --- a/xschem_library/gschem_import/3.3V-plus-1.sym +++ b/xschem_library/gschem_import/3.3V-plus-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/5V-plus-1.sym b/xschem_library/gschem_import/5V-plus-1.sym index 1c6ea15b..77993764 100644 --- a/xschem_library/gschem_import/5V-plus-1.sym +++ b/xschem_library/gschem_import/5V-plus-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/7414-1.sym b/xschem_library/gschem_import/7414-1.sym index d4ddfdbb..c723b9e1 100644 --- a/xschem_library/gschem_import/7414-1.sym +++ b/xschem_library/gschem_import/7414-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/BJT_Model.sym b/xschem_library/gschem_import/BJT_Model.sym index df7bd128..5ad32625 100644 --- a/xschem_library/gschem_import/BJT_Model.sym +++ b/xschem_library/gschem_import/BJT_Model.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/MSA-2643.sch b/xschem_library/gschem_import/MSA-2643.sch index 91ccb40e..2766fe95 100644 --- a/xschem_library/gschem_import/MSA-2643.sch +++ b/xschem_library/gschem_import/MSA-2643.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/Q1.sch b/xschem_library/gschem_import/Q1.sch index 3a25646e..d8b843d1 100644 --- a/xschem_library/gschem_import/Q1.sch +++ b/xschem_library/gschem_import/Q1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/Q2.sch b/xschem_library/gschem_import/Q2.sch index 8aea3d57..e7977388 100644 --- a/xschem_library/gschem_import/Q2.sch +++ b/xschem_library/gschem_import/Q2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/Q_Model.sym b/xschem_library/gschem_import/Q_Model.sym index ee23c7e3..bc9c8e7a 100644 --- a/xschem_library/gschem_import/Q_Model.sym +++ b/xschem_library/gschem_import/Q_Model.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/TwoStageAmp.sch b/xschem_library/gschem_import/TwoStageAmp.sch index 6661fac1..3c110851 100644 --- a/xschem_library/gschem_import/TwoStageAmp.sch +++ b/xschem_library/gschem_import/TwoStageAmp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/capacitor-1.sym b/xschem_library/gschem_import/capacitor-1.sym index 4c435276..02d315b2 100644 --- a/xschem_library/gschem_import/capacitor-1.sym +++ b/xschem_library/gschem_import/capacitor-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/capacitor-2.sym b/xschem_library/gschem_import/capacitor-2.sym index 2c67bf72..72382487 100644 --- a/xschem_library/gschem_import/capacitor-2.sym +++ b/xschem_library/gschem_import/capacitor-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/connector4-1.sym b/xschem_library/gschem_import/connector4-1.sym index 7e1c3a85..dce1624b 100644 --- a/xschem_library/gschem_import/connector4-1.sym +++ b/xschem_library/gschem_import/connector4-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/connector8-1.sym b/xschem_library/gschem_import/connector8-1.sym index 11db9d4a..d9cfe2de 100644 --- a/xschem_library/gschem_import/connector8-1.sym +++ b/xschem_library/gschem_import/connector8-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/copyleft.sym b/xschem_library/gschem_import/copyleft.sym index ec210da0..84a4734f 100644 --- a/xschem_library/gschem_import/copyleft.sym +++ b/xschem_library/gschem_import/copyleft.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/crystal-1.sym b/xschem_library/gschem_import/crystal-1.sym index c2f0e2bd..150dac27 100644 --- a/xschem_library/gschem_import/crystal-1.sym +++ b/xschem_library/gschem_import/crystal-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/cy7c64603-52nc.sym b/xschem_library/gschem_import/cy7c64603-52nc.sym index fcd617c8..fc56d60e 100644 --- a/xschem_library/gschem_import/cy7c64603-52nc.sym +++ b/xschem_library/gschem_import/cy7c64603-52nc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/diode-1.sym b/xschem_library/gschem_import/diode-1.sym index 536fe0ed..dfa13108 100644 --- a/xschem_library/gschem_import/diode-1.sym +++ b/xschem_library/gschem_import/diode-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-consio.sch b/xschem_library/gschem_import/gTAG-consio.sch index b8c4737f..08d44ec2 100644 --- a/xschem_library/gschem_import/gTAG-consio.sch +++ b/xschem_library/gschem_import/gTAG-consio.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-consio.sym b/xschem_library/gschem_import/gTAG-consio.sym index 9dbf8b54..2dc806f1 100644 --- a/xschem_library/gschem_import/gTAG-consio.sym +++ b/xschem_library/gschem_import/gTAG-consio.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-jtagio.sch b/xschem_library/gschem_import/gTAG-jtagio.sch index a4d2e466..521e16b0 100644 --- a/xschem_library/gschem_import/gTAG-jtagio.sch +++ b/xschem_library/gschem_import/gTAG-jtagio.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-jtagio.sym b/xschem_library/gschem_import/gTAG-jtagio.sym index bf046101..c608d5a0 100644 --- a/xschem_library/gschem_import/gTAG-jtagio.sym +++ b/xschem_library/gschem_import/gTAG-jtagio.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-psu.sch b/xschem_library/gschem_import/gTAG-psu.sch index 139b8c00..558f9229 100644 --- a/xschem_library/gschem_import/gTAG-psu.sch +++ b/xschem_library/gschem_import/gTAG-psu.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-psu.sym b/xschem_library/gschem_import/gTAG-psu.sym index aba134f9..1b89c2f1 100644 --- a/xschem_library/gschem_import/gTAG-psu.sym +++ b/xschem_library/gschem_import/gTAG-psu.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-ucont.sch b/xschem_library/gschem_import/gTAG-ucont.sch index e47ed90d..66d6b378 100644 --- a/xschem_library/gschem_import/gTAG-ucont.sch +++ b/xschem_library/gschem_import/gTAG-ucont.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-ucont.sym b/xschem_library/gschem_import/gTAG-ucont.sym index 5ba8f65c..5603f7bc 100644 --- a/xschem_library/gschem_import/gTAG-ucont.sym +++ b/xschem_library/gschem_import/gTAG-ucont.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG.sch b/xschem_library/gschem_import/gTAG.sch index 6415706d..2cad6306 100644 --- a/xschem_library/gschem_import/gTAG.sch +++ b/xschem_library/gschem_import/gTAG.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gnd-1.sym b/xschem_library/gschem_import/gnd-1.sym index 65afe63c..4f44e4ea 100644 --- a/xschem_library/gschem_import/gnd-1.sym +++ b/xschem_library/gschem_import/gnd-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/header20-1.sym b/xschem_library/gschem_import/header20-1.sym index 7e9d4ad8..9689d0f1 100644 --- a/xschem_library/gschem_import/header20-1.sym +++ b/xschem_library/gschem_import/header20-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/in-1.sym b/xschem_library/gschem_import/in-1.sym index 39fef854..be0767d3 100644 --- a/xschem_library/gschem_import/in-1.sym +++ b/xschem_library/gschem_import/in-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/inductor-1.sym b/xschem_library/gschem_import/inductor-1.sym index 12200444..8e83e0d7 100644 --- a/xschem_library/gschem_import/inductor-1.sym +++ b/xschem_library/gschem_import/inductor-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/jumper-1.sym b/xschem_library/gschem_import/jumper-1.sym index cb39908d..2ef618b3 100644 --- a/xschem_library/gschem_import/jumper-1.sym +++ b/xschem_library/gschem_import/jumper-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/lightning.sch b/xschem_library/gschem_import/lightning.sch index bc81aac2..0aa5482c 100644 --- a/xschem_library/gschem_import/lightning.sch +++ b/xschem_library/gschem_import/lightning.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/max882.sym b/xschem_library/gschem_import/max882.sym index 466c9110..505a07c3 100644 --- a/xschem_library/gschem_import/max882.sym +++ b/xschem_library/gschem_import/max882.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/out-1.sym b/xschem_library/gschem_import/out-1.sym index 539f797c..6eaf44eb 100644 --- a/xschem_library/gschem_import/out-1.sym +++ b/xschem_library/gschem_import/out-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/resistor-1.sym b/xschem_library/gschem_import/resistor-1.sym index bcc766e8..34ad3c8d 100644 --- a/xschem_library/gschem_import/resistor-1.sym +++ b/xschem_library/gschem_import/resistor-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/resistor-2.sym b/xschem_library/gschem_import/resistor-2.sym index d73e682b..3513d1db 100644 --- a/xschem_library/gschem_import/resistor-2.sym +++ b/xschem_library/gschem_import/resistor-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/resistor-variable-1.sym b/xschem_library/gschem_import/resistor-variable-1.sym index f4836928..50c8a8c9 100644 --- a/xschem_library/gschem_import/resistor-variable-1.sym +++ b/xschem_library/gschem_import/resistor-variable-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/show_all_syms.sch b/xschem_library/gschem_import/show_all_syms.sch index 76aa26ed..c2c20141 100644 --- a/xschem_library/gschem_import/show_all_syms.sch +++ b/xschem_library/gschem_import/show_all_syms.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/sn75240pw.sym b/xschem_library/gschem_import/sn75240pw.sym index f5ab5ef9..d46c04e9 100644 --- a/xschem_library/gschem_import/sn75240pw.sym +++ b/xschem_library/gschem_import/sn75240pw.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-directive-1.sym b/xschem_library/gschem_import/spice-directive-1.sym index c222256d..9d0a988a 100644 --- a/xschem_library/gschem_import/spice-directive-1.sym +++ b/xschem_library/gschem_import/spice-directive-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-include-1.sym b/xschem_library/gschem_import/spice-include-1.sym index 2456385b..22facc25 100644 --- a/xschem_library/gschem_import/spice-include-1.sym +++ b/xschem_library/gschem_import/spice-include-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-model-1.sym b/xschem_library/gschem_import/spice-model-1.sym index 993a5b41..a42d96a4 100644 --- a/xschem_library/gschem_import/spice-model-1.sym +++ b/xschem_library/gschem_import/spice-model-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-subcircuit-IO-1.sym b/xschem_library/gschem_import/spice-subcircuit-IO-1.sym index 9d2540bf..451607cb 100644 --- a/xschem_library/gschem_import/spice-subcircuit-IO-1.sym +++ b/xschem_library/gschem_import/spice-subcircuit-IO-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-subcircuit-LL-1.sym b/xschem_library/gschem_import/spice-subcircuit-LL-1.sym index b643461b..6e211d5b 100644 --- a/xschem_library/gschem_import/spice-subcircuit-LL-1.sym +++ b/xschem_library/gschem_import/spice-subcircuit-LL-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/title-A2.sym b/xschem_library/gschem_import/title-A2.sym index 8d999b6d..974d9feb 100644 --- a/xschem_library/gschem_import/title-A2.sym +++ b/xschem_library/gschem_import/title-A2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/title-A4.sym b/xschem_library/gschem_import/title-A4.sym index a5588efc..c9918deb 100644 --- a/xschem_library/gschem_import/title-A4.sym +++ b/xschem_library/gschem_import/title-A4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/title-B.sym b/xschem_library/gschem_import/title-B.sym index 55a0c8dd..4b5c439e 100644 --- a/xschem_library/gschem_import/title-B.sym +++ b/xschem_library/gschem_import/title-B.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/transistor.sym b/xschem_library/gschem_import/transistor.sym index 70e58c94..dd03b101 100644 --- a/xschem_library/gschem_import/transistor.sym +++ b/xschem_library/gschem_import/transistor.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/vac-1.sym b/xschem_library/gschem_import/vac-1.sym index 6f4f4eb1..bb1f52da 100644 --- a/xschem_library/gschem_import/vac-1.sym +++ b/xschem_library/gschem_import/vac-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/vcc-1.sym b/xschem_library/gschem_import/vcc-1.sym index df97fc3e..9a12678a 100644 --- a/xschem_library/gschem_import/vcc-1.sym +++ b/xschem_library/gschem_import/vcc-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/vdc-1.sym b/xschem_library/gschem_import/vdc-1.sym index b8918b11..0f8ac57a 100644 --- a/xschem_library/gschem_import/vdc-1.sym +++ b/xschem_library/gschem_import/vdc-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/vsin-1.sym b/xschem_library/gschem_import/vsin-1.sym index 648752db..5c831622 100644 --- a/xschem_library/gschem_import/vsin-1.sym +++ b/xschem_library/gschem_import/vsin-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3.sch b/xschem_library/inst_sch_select/comp3.sch index 4a1c831e..28c36a5b 100644 --- a/xschem_library/inst_sch_select/comp3.sch +++ b/xschem_library/inst_sch_select/comp3.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3.sym b/xschem_library/inst_sch_select/comp3.sym index d3ffdeed..07b73a99 100644 --- a/xschem_library/inst_sch_select/comp3.sym +++ b/xschem_library/inst_sch_select/comp3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3_empty.sch b/xschem_library/inst_sch_select/comp3_empty.sch index e952e5b9..b9c8d1dc 100644 --- a/xschem_library/inst_sch_select/comp3_empty.sch +++ b/xschem_library/inst_sch_select/comp3_empty.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3_parax.sch b/xschem_library/inst_sch_select/comp3_parax.sch index f799f942..e57d0626 100644 --- a/xschem_library/inst_sch_select/comp3_parax.sch +++ b/xschem_library/inst_sch_select/comp3_parax.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3_read.sym b/xschem_library/inst_sch_select/comp3_read.sym index e7ada354..53aeb46b 100644 --- a/xschem_library/inst_sch_select/comp3_read.sym +++ b/xschem_library/inst_sch_select/comp3_read.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/inst_sch_select.sch b/xschem_library/inst_sch_select/inst_sch_select.sch index 0cadbc1f..2815af61 100644 --- a/xschem_library/inst_sch_select/inst_sch_select.sch +++ b/xschem_library/inst_sch_select/inst_sch_select.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/inst_sch_select.sym b/xschem_library/inst_sch_select/inst_sch_select.sym index d5aac9be..7691015c 100644 --- a/xschem_library/inst_sch_select/inst_sch_select.sym +++ b/xschem_library/inst_sch_select/inst_sch_select.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/bf.sch b/xschem_library/logic/bf.sch index 88831270..719aadae 100644 --- a/xschem_library/logic/bf.sch +++ b/xschem_library/logic/bf.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/bf.sym b/xschem_library/logic/bf.sym index 257a91ea..fffbb0d7 100644 --- a/xschem_library/logic/bf.sym +++ b/xschem_library/logic/bf.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/eo.sch b/xschem_library/logic/eo.sch index f1742701..b8c9cd66 100644 --- a/xschem_library/logic/eo.sch +++ b/xschem_library/logic/eo.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/eo.sym b/xschem_library/logic/eo.sym index 95dba6cc..32901d4a 100644 --- a/xschem_library/logic/eo.sym +++ b/xschem_library/logic/eo.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ff.sch b/xschem_library/logic/ff.sch index cf2c786b..341e03e6 100644 --- a/xschem_library/logic/ff.sch +++ b/xschem_library/logic/ff.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ff.sym b/xschem_library/logic/ff.sym index 5dddd1e9..287a0754 100644 --- a/xschem_library/logic/ff.sym +++ b/xschem_library/logic/ff.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/iv.sch b/xschem_library/logic/iv.sch index fc831c02..aa28206a 100644 --- a/xschem_library/logic/iv.sch +++ b/xschem_library/logic/iv.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/iv.sym b/xschem_library/logic/iv.sym index f2824da4..5cfd6a18 100644 --- a/xschem_library/logic/iv.sym +++ b/xschem_library/logic/iv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/latch.sch b/xschem_library/logic/latch.sch index ae7bd6b8..49664b4c 100644 --- a/xschem_library/logic/latch.sch +++ b/xschem_library/logic/latch.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/latch.sym b/xschem_library/logic/latch.sym index 141528b1..b28f4c88 100644 --- a/xschem_library/logic/latch.sym +++ b/xschem_library/logic/latch.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/mux21.sch b/xschem_library/logic/mux21.sch index a5137bea..ce3e2bd7 100644 --- a/xschem_library/logic/mux21.sch +++ b/xschem_library/logic/mux21.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/mux21.sym b/xschem_library/logic/mux21.sym index f8fce24f..3294b010 100644 --- a/xschem_library/logic/mux21.sym +++ b/xschem_library/logic/mux21.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/nd2.sym b/xschem_library/logic/nd2.sym index 2d201990..0489c2cb 100644 --- a/xschem_library/logic/nd2.sym +++ b/xschem_library/logic/nd2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/nr2.sym b/xschem_library/logic/nr2.sym index 6b80e5b4..0ffa9acb 100644 --- a/xschem_library/logic/nr2.sym +++ b/xschem_library/logic/nr2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ram.sch b/xschem_library/logic/ram.sch index 4d8acd48..66939572 100644 --- a/xschem_library/logic/ram.sch +++ b/xschem_library/logic/ram.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ram.sym b/xschem_library/logic/ram.sym index ce3165ae..ba5927de 100644 --- a/xschem_library/logic/ram.sym +++ b/xschem_library/logic/ram.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ram_tb.sch b/xschem_library/logic/ram_tb.sch index ca456d99..44af72cc 100644 --- a/xschem_library/logic/ram_tb.sch +++ b/xschem_library/logic/ram_tb.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/sync_reg.sch b/xschem_library/logic/sync_reg.sch index a0798140..02491629 100644 --- a/xschem_library/logic/sync_reg.sch +++ b/xschem_library/logic/sync_reg.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/sync_reg.sym b/xschem_library/logic/sync_reg.sym index cb9384f7..b3880cd6 100644 --- a/xschem_library/logic/sync_reg.sym +++ b/xschem_library/logic/sync_reg.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/test_mos_verilog.sch b/xschem_library/logic/test_mos_verilog.sch index f1fa694e..49e98e14 100644 --- a/xschem_library/logic/test_mos_verilog.sch +++ b/xschem_library/logic/test_mos_verilog.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/test_mos_verilog.sym b/xschem_library/logic/test_mos_verilog.sym index 06e18060..2ec0b448 100644 --- a/xschem_library/logic/test_mos_verilog.sym +++ b/xschem_library/logic/test_mos_verilog.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/test_ngspice.sch b/xschem_library/logic/test_ngspice.sch index 96b41d63..a248349a 100644 --- a/xschem_library/logic/test_ngspice.sch +++ b/xschem_library/logic/test_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/test_ngspice.sym b/xschem_library/logic/test_ngspice.sym index 6e7624b0..e73df418 100644 --- a/xschem_library/logic/test_ngspice.sym +++ b/xschem_library/logic/test_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/testbench.sch b/xschem_library/logic/testbench.sch index b9a0819e..3b7d7982 100644 --- a/xschem_library/logic/testbench.sch +++ b/xschem_library/logic/testbench.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/testbench.sym b/xschem_library/logic/testbench.sym index 6e7624b0..e73df418 100644 --- a/xschem_library/logic/testbench.sym +++ b/xschem_library/logic/testbench.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/adc.sch b/xschem_library/ngspice/adc.sch index 029ac5e1..e03be50f 100644 --- a/xschem_library/ngspice/adc.sch +++ b/xschem_library/ngspice/adc.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/adc.sym b/xschem_library/ngspice/adc.sym index 5d538907..581e78fb 100644 --- a/xschem_library/ngspice/adc.sym +++ b/xschem_library/ngspice/adc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/amp_xschem.sch b/xschem_library/ngspice/amp_xschem.sch index ea82722e..b12a8e17 100644 --- a/xschem_library/ngspice/amp_xschem.sch +++ b/xschem_library/ngspice/amp_xschem.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/and3_ngspice.sch b/xschem_library/ngspice/and3_ngspice.sch index d0c29c54..bd35f1c0 100644 --- a/xschem_library/ngspice/and3_ngspice.sch +++ b/xschem_library/ngspice/and3_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/and3_ngspice.sym b/xschem_library/ngspice/and3_ngspice.sym index 9c2e3590..fd45d165 100644 --- a/xschem_library/ngspice/and3_ngspice.sym +++ b/xschem_library/ngspice/and3_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/and_ngspice.sch b/xschem_library/ngspice/and_ngspice.sch index 5078b996..1fa7fcd8 100644 --- a/xschem_library/ngspice/and_ngspice.sch +++ b/xschem_library/ngspice/and_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/and_ngspice.sym b/xschem_library/ngspice/and_ngspice.sym index 0a1a0481..b47533c7 100644 --- a/xschem_library/ngspice/and_ngspice.sym +++ b/xschem_library/ngspice/and_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/autozero_comp.sch b/xschem_library/ngspice/autozero_comp.sch index 564f7340..685fcc33 100644 --- a/xschem_library/ngspice/autozero_comp.sch +++ b/xschem_library/ngspice/autozero_comp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/autozero_comp.sym b/xschem_library/ngspice/autozero_comp.sym index 5d01ae14..43117395 100644 --- a/xschem_library/ngspice/autozero_comp.sym +++ b/xschem_library/ngspice/autozero_comp.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/autozero_comp_xyce.sch b/xschem_library/ngspice/autozero_comp_xyce.sch index bd6ca4d2..21ec0f9e 100644 --- a/xschem_library/ngspice/autozero_comp_xyce.sch +++ b/xschem_library/ngspice/autozero_comp_xyce.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/buck.sch b/xschem_library/ngspice/buck.sch index 2d996bb0..d3a1b4e6 100644 --- a/xschem_library/ngspice/buck.sch +++ b/xschem_library/ngspice/buck.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.7RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/buf_ngspice.sch b/xschem_library/ngspice/buf_ngspice.sch index 290062ce..54db37bd 100644 --- a/xschem_library/ngspice/buf_ngspice.sch +++ b/xschem_library/ngspice/buf_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/buf_ngspice.sym b/xschem_library/ngspice/buf_ngspice.sym index 77dcd24d..1d0cca10 100644 --- a/xschem_library/ngspice/buf_ngspice.sym +++ b/xschem_library/ngspice/buf_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.7RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/colpitts_xschem.sch b/xschem_library/ngspice/colpitts_xschem.sch index bca6c74a..a128c548 100644 --- a/xschem_library/ngspice/colpitts_xschem.sch +++ b/xschem_library/ngspice/colpitts_xschem.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/comp_65nm.sch b/xschem_library/ngspice/comp_65nm.sch index 97c80be4..0863b67c 100644 --- a/xschem_library/ngspice/comp_65nm.sch +++ b/xschem_library/ngspice/comp_65nm.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/comp_65nm.sym b/xschem_library/ngspice/comp_65nm.sym index 0914a82c..e36e36fd 100644 --- a/xschem_library/ngspice/comp_65nm.sym +++ b/xschem_library/ngspice/comp_65nm.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/comp_ngspice.sch b/xschem_library/ngspice/comp_ngspice.sch index c0c08778..734a91fd 100644 --- a/xschem_library/ngspice/comp_ngspice.sch +++ b/xschem_library/ngspice/comp_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/comp_ngspice.sym b/xschem_library/ngspice/comp_ngspice.sym index ca66a0ec..836cb0f3 100644 --- a/xschem_library/ngspice/comp_ngspice.sym +++ b/xschem_library/ngspice/comp_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/counter_6bit_ngspice.sch b/xschem_library/ngspice/counter_6bit_ngspice.sch index 7f4d8931..7f0502c1 100644 --- a/xschem_library/ngspice/counter_6bit_ngspice.sch +++ b/xschem_library/ngspice/counter_6bit_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/counter_6bit_ngspice.sym b/xschem_library/ngspice/counter_6bit_ngspice.sym index 0fadc3bd..458bda82 100644 --- a/xschem_library/ngspice/counter_6bit_ngspice.sym +++ b/xschem_library/ngspice/counter_6bit_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/delta_sigma.sch b/xschem_library/ngspice/delta_sigma.sch index febd3190..5b46d12f 100644 --- a/xschem_library/ngspice/delta_sigma.sch +++ b/xschem_library/ngspice/delta_sigma.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/delta_sigma.sym b/xschem_library/ngspice/delta_sigma.sym index 3dbd3824..d80ab5a3 100644 --- a/xschem_library/ngspice/delta_sigma.sym +++ b/xschem_library/ngspice/delta_sigma.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/diff_amp.sym b/xschem_library/ngspice/diff_amp.sym index ffa02cd9..ce1f54a3 100644 --- a/xschem_library/ngspice/diff_amp.sym +++ b/xschem_library/ngspice/diff_amp.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/diode_ngspice.sch b/xschem_library/ngspice/diode_ngspice.sch index 66415bb0..3f44cb59 100644 --- a/xschem_library/ngspice/diode_ngspice.sch +++ b/xschem_library/ngspice/diode_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/diode_ngspice.sym b/xschem_library/ngspice/diode_ngspice.sym index 76f5bd95..99f03893 100644 --- a/xschem_library/ngspice/diode_ngspice.sym +++ b/xschem_library/ngspice/diode_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/flip_flop_ngspice.sch b/xschem_library/ngspice/flip_flop_ngspice.sch index caa300f8..f80941d0 100644 --- a/xschem_library/ngspice/flip_flop_ngspice.sch +++ b/xschem_library/ngspice/flip_flop_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/flip_flop_ngspice.sym b/xschem_library/ngspice/flip_flop_ngspice.sym index 5e042d8a..fb7d7ce8 100644 --- a/xschem_library/ngspice/flip_flop_ngspice.sym +++ b/xschem_library/ngspice/flip_flop_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/full_adder_ngspice.sch b/xschem_library/ngspice/full_adder_ngspice.sch index f4eabb26..9bef97bd 100644 --- a/xschem_library/ngspice/full_adder_ngspice.sch +++ b/xschem_library/ngspice/full_adder_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/full_adder_ngspice.sym b/xschem_library/ngspice/full_adder_ngspice.sym index 49c935f9..5d2c39fd 100644 --- a/xschem_library/ngspice/full_adder_ngspice.sym +++ b/xschem_library/ngspice/full_adder_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/half_adder_ngspice.sch b/xschem_library/ngspice/half_adder_ngspice.sch index 67056c09..4fae5503 100644 --- a/xschem_library/ngspice/half_adder_ngspice.sch +++ b/xschem_library/ngspice/half_adder_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/half_adder_ngspice.sym b/xschem_library/ngspice/half_adder_ngspice.sym index baa1dc9a..c0164cb3 100644 --- a/xschem_library/ngspice/half_adder_ngspice.sym +++ b/xschem_library/ngspice/half_adder_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/hpf_xschem.sch b/xschem_library/ngspice/hpf_xschem.sch index c96e01d1..b863f7bf 100644 --- a/xschem_library/ngspice/hpf_xschem.sch +++ b/xschem_library/ngspice/hpf_xschem.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/inv-2.sym b/xschem_library/ngspice/inv-2.sym index bf81046d..9eb659e6 100644 --- a/xschem_library/ngspice/inv-2.sym +++ b/xschem_library/ngspice/inv-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/inv_ngspice.sch b/xschem_library/ngspice/inv_ngspice.sch index 0d0afeaa..a0cc532b 100644 --- a/xschem_library/ngspice/inv_ngspice.sch +++ b/xschem_library/ngspice/inv_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/inv_ngspice.sym b/xschem_library/ngspice/inv_ngspice.sym index c65dc641..0c049147 100644 --- a/xschem_library/ngspice/inv_ngspice.sym +++ b/xschem_library/ngspice/inv_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/keeper_ngspice.sch b/xschem_library/ngspice/keeper_ngspice.sch index cc20b6c2..ba908dbe 100644 --- a/xschem_library/ngspice/keeper_ngspice.sch +++ b/xschem_library/ngspice/keeper_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/keeper_ngspice.sym b/xschem_library/ngspice/keeper_ngspice.sym index e4977f1c..76cf617c 100644 --- a/xschem_library/ngspice/keeper_ngspice.sym +++ b/xschem_library/ngspice/keeper_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/led_driver.sch b/xschem_library/ngspice/led_driver.sch index 95c70d02..24d772b1 100644 --- a/xschem_library/ngspice/led_driver.sch +++ b/xschem_library/ngspice/led_driver.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/lm741.sym b/xschem_library/ngspice/lm741.sym index fcf2dc2a..7693b64e 100644 --- a/xschem_library/ngspice/lm741.sym +++ b/xschem_library/ngspice/lm741.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nand_ngspice.sch b/xschem_library/ngspice/nand_ngspice.sch index caa68194..df2d7f63 100644 --- a/xschem_library/ngspice/nand_ngspice.sch +++ b/xschem_library/ngspice/nand_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nand_ngspice.sym b/xschem_library/ngspice/nand_ngspice.sym index fea37e5d..94f9b7ca 100644 --- a/xschem_library/ngspice/nand_ngspice.sym +++ b/xschem_library/ngspice/nand_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nmos4-v.sym b/xschem_library/ngspice/nmos4-v.sym index f53bad1e..e2c9d7fd 100644 --- a/xschem_library/ngspice/nmos4-v.sym +++ b/xschem_library/ngspice/nmos4-v.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nor_ngspice.sch b/xschem_library/ngspice/nor_ngspice.sch index 3915f274..4b5e07de 100644 --- a/xschem_library/ngspice/nor_ngspice.sch +++ b/xschem_library/ngspice/nor_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nor_ngspice.sym b/xschem_library/ngspice/nor_ngspice.sym index 2fa0e4cc..7acb3111 100644 --- a/xschem_library/ngspice/nor_ngspice.sym +++ b/xschem_library/ngspice/nor_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/opamp_65nm.sch b/xschem_library/ngspice/opamp_65nm.sch index 6bbd6d58..03f05027 100644 --- a/xschem_library/ngspice/opamp_65nm.sch +++ b/xschem_library/ngspice/opamp_65nm.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/opamp_65nm.sym b/xschem_library/ngspice/opamp_65nm.sym index 0914a82c..e36e36fd 100644 --- a/xschem_library/ngspice/opamp_65nm.sym +++ b/xschem_library/ngspice/opamp_65nm.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/or_ngspice.sch b/xschem_library/ngspice/or_ngspice.sch index 715fddd7..13ec04c3 100644 --- a/xschem_library/ngspice/or_ngspice.sch +++ b/xschem_library/ngspice/or_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/or_ngspice.sym b/xschem_library/ngspice/or_ngspice.sym index e241457e..99d233e7 100644 --- a/xschem_library/ngspice/or_ngspice.sym +++ b/xschem_library/ngspice/or_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/passgate.sym b/xschem_library/ngspice/passgate.sym index 0fbd9dcf..45df34e4 100644 --- a/xschem_library/ngspice/passgate.sym +++ b/xschem_library/ngspice/passgate.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/pmos4-v.sym b/xschem_library/ngspice/pmos4-v.sym index d21398d4..73f0f4b8 100644 --- a/xschem_library/ngspice/pmos4-v.sym +++ b/xschem_library/ngspice/pmos4-v.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/pv_ngspice.sch b/xschem_library/ngspice/pv_ngspice.sch index cab6b854..db2568e6 100644 --- a/xschem_library/ngspice/pv_ngspice.sch +++ b/xschem_library/ngspice/pv_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/pv_ngspice.sym b/xschem_library/ngspice/pv_ngspice.sym index fc42d843..dad40c38 100644 --- a/xschem_library/ngspice/pv_ngspice.sym +++ b/xschem_library/ngspice/pv_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/solar_panel.sch b/xschem_library/ngspice/solar_panel.sch index 14acd1fb..37e94994 100644 --- a/xschem_library/ngspice/solar_panel.sch +++ b/xschem_library/ngspice/solar_panel.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/solar_panel.sym b/xschem_library/ngspice/solar_panel.sym index b25ae6f6..20f4f339 100644 --- a/xschem_library/ngspice/solar_panel.sym +++ b/xschem_library/ngspice/solar_panel.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/solar_panel_xyce.sch b/xschem_library/ngspice/solar_panel_xyce.sch index 485047c7..ed527d0b 100644 --- a/xschem_library/ngspice/solar_panel_xyce.sch +++ b/xschem_library/ngspice/solar_panel_xyce.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/tb_diff_amp.sch b/xschem_library/ngspice/tb_diff_amp.sch index 0390d6c1..cae10bcf 100644 --- a/xschem_library/ngspice/tb_diff_amp.sch +++ b/xschem_library/ngspice/tb_diff_amp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/tb_diff_amp.sym b/xschem_library/ngspice/tb_diff_amp.sym index 3dd49617..b5595328 100644 --- a/xschem_library/ngspice/tb_diff_amp.sym +++ b/xschem_library/ngspice/tb_diff_amp.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/xnor_ngspice.sch b/xschem_library/ngspice/xnor_ngspice.sch index 29592cdb..e356d9a8 100644 --- a/xschem_library/ngspice/xnor_ngspice.sch +++ b/xschem_library/ngspice/xnor_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/xnor_ngspice.sym b/xschem_library/ngspice/xnor_ngspice.sym index 7da1d77d..aaeffb01 100644 --- a/xschem_library/ngspice/xnor_ngspice.sym +++ b/xschem_library/ngspice/xnor_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/xor_ngspice.sch b/xschem_library/ngspice/xor_ngspice.sch index df3e4850..0f027874 100644 --- a/xschem_library/ngspice/xor_ngspice.sch +++ b/xschem_library/ngspice/xor_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/xor_ngspice.sym b/xschem_library/ngspice/xor_ngspice.sym index a5fa8265..3cdcabae 100644 --- a/xschem_library/ngspice/xor_ngspice.sym +++ b/xschem_library/ngspice/xor_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/0_pcb_top.sch b/xschem_library/pcb/0_pcb_top.sch index 54842676..9d79dee9 100644 --- a/xschem_library/pcb/0_pcb_top.sch +++ b/xschem_library/pcb/0_pcb_top.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/74ls00-2.sym b/xschem_library/pcb/74ls00-2.sym index b4607a91..17108095 100644 --- a/xschem_library/pcb/74ls00-2.sym +++ b/xschem_library/pcb/74ls00-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/74ls00.sym b/xschem_library/pcb/74ls00.sym index c4e0e995..df4efbf8 100644 --- a/xschem_library/pcb/74ls00.sym +++ b/xschem_library/pcb/74ls00.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/7805.sym b/xschem_library/pcb/7805.sym index 791168df..37dedd46 100644 --- a/xschem_library/pcb/7805.sym +++ b/xschem_library/pcb/7805.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/bc817.sym b/xschem_library/pcb/bc817.sym index 61d1ca51..1e87af25 100644 --- a/xschem_library/pcb/bc817.sym +++ b/xschem_library/pcb/bc817.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/hierarchical_tedax.sch b/xschem_library/pcb/hierarchical_tedax.sch index 511d820a..2c852c92 100644 --- a/xschem_library/pcb/hierarchical_tedax.sch +++ b/xschem_library/pcb/hierarchical_tedax.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/hierarchical_tedax.sym b/xschem_library/pcb/hierarchical_tedax.sym index fb9e32d2..3aa2bd44 100644 --- a/xschem_library/pcb/hierarchical_tedax.sym +++ b/xschem_library/pcb/hierarchical_tedax.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/lm358.sym b/xschem_library/pcb/lm358.sym index 9f04a034..5149015e 100644 --- a/xschem_library/pcb/lm358.sym +++ b/xschem_library/pcb/lm358.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_current_protection.sch b/xschem_library/pcb/pcb_current_protection.sch index a3b15574..77618bff 100644 --- a/xschem_library/pcb/pcb_current_protection.sch +++ b/xschem_library/pcb/pcb_current_protection.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_current_protection.sym b/xschem_library/pcb/pcb_current_protection.sym index 266bef09..e88e082e 100644 --- a/xschem_library/pcb/pcb_current_protection.sym +++ b/xschem_library/pcb/pcb_current_protection.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_current_protection_embed.sch b/xschem_library/pcb/pcb_current_protection_embed.sch index 73e520d3..4e298ff6 100644 --- a/xschem_library/pcb/pcb_current_protection_embed.sch +++ b/xschem_library/pcb/pcb_current_protection_embed.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_test1.sch b/xschem_library/pcb/pcb_test1.sch index 15d4ace6..3abc3cb0 100644 --- a/xschem_library/pcb/pcb_test1.sch +++ b/xschem_library/pcb/pcb_test1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_test1.sym b/xschem_library/pcb/pcb_test1.sym index 79c1cd6e..e448c95d 100644 --- a/xschem_library/pcb/pcb_test1.sym +++ b/xschem_library/pcb/pcb_test1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_test1_embed.sch b/xschem_library/pcb/pcb_test1_embed.sch index ee347733..40f4fb9c 100644 --- a/xschem_library/pcb/pcb_test1_embed.sch +++ b/xschem_library/pcb/pcb_test1_embed.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_test2.sch b/xschem_library/pcb/pcb_test2.sch index 3860c7b9..ac3d9915 100644 --- a/xschem_library/pcb/pcb_test2.sch +++ b/xschem_library/pcb/pcb_test2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_voltage_protection.sch b/xschem_library/pcb/pcb_voltage_protection.sch index 5c871b95..43a690dd 100644 --- a/xschem_library/pcb/pcb_voltage_protection.sch +++ b/xschem_library/pcb/pcb_voltage_protection.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_voltage_protection.sym b/xschem_library/pcb/pcb_voltage_protection.sym index a02091c1..59b2003e 100644 --- a/xschem_library/pcb/pcb_voltage_protection.sym +++ b/xschem_library/pcb/pcb_voltage_protection.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_voltage_protection_embed.sch b/xschem_library/pcb/pcb_voltage_protection_embed.sch index f41735e3..b077ac65 100644 --- a/xschem_library/pcb/pcb_voltage_protection_embed.sch +++ b/xschem_library/pcb/pcb_voltage_protection_embed.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/reg.sch b/xschem_library/pcb/reg.sch index c75dfd14..11b62323 100644 --- a/xschem_library/pcb/reg.sch +++ b/xschem_library/pcb/reg.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/si2306.sym b/xschem_library/pcb/si2306.sym index 67be9b08..4416eedf 100644 --- a/xschem_library/pcb/si2306.sym +++ b/xschem_library/pcb/si2306.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/voltage_protection.sch b/xschem_library/pcb/voltage_protection.sch index a0dc2dfb..7cdab6e8 100644 --- a/xschem_library/pcb/voltage_protection.sch +++ b/xschem_library/pcb/voltage_protection.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/voltage_protection.sym b/xschem_library/pcb/voltage_protection.sym index a78401e2..4ca110f6 100644 --- a/xschem_library/pcb/voltage_protection.sym +++ b/xschem_library/pcb/voltage_protection.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/LD2QHDX4stef.sch b/xschem_library/rom8k/LD2QHDX4stef.sch index 1e14c05a..720bac88 100644 --- a/xschem_library/rom8k/LD2QHDX4stef.sch +++ b/xschem_library/rom8k/LD2QHDX4stef.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/LD2QHDX4stef.sym b/xschem_library/rom8k/LD2QHDX4stef.sym index 5e802f70..ffad2153 100644 --- a/xschem_library/rom8k/LD2QHDX4stef.sym +++ b/xschem_library/rom8k/LD2QHDX4stef.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/bts.sch b/xschem_library/rom8k/bts.sch index 02f5ac1b..a9b7db05 100644 --- a/xschem_library/rom8k/bts.sch +++ b/xschem_library/rom8k/bts.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/bts.sym b/xschem_library/rom8k/bts.sym index 51dd2017..66add39d 100644 --- a/xschem_library/rom8k/bts.sym +++ b/xschem_library/rom8k/bts.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnand2.sch b/xschem_library/rom8k/lvnand2.sch index bac4e2e5..d04b6ea8 100644 --- a/xschem_library/rom8k/lvnand2.sch +++ b/xschem_library/rom8k/lvnand2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnand2.sym b/xschem_library/rom8k/lvnand2.sym index 805f94a1..7472062b 100644 --- a/xschem_library/rom8k/lvnand2.sym +++ b/xschem_library/rom8k/lvnand2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnand3.sch b/xschem_library/rom8k/lvnand3.sch index b0d5ab3e..65d51c0b 100644 --- a/xschem_library/rom8k/lvnand3.sch +++ b/xschem_library/rom8k/lvnand3.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnand3.sym b/xschem_library/rom8k/lvnand3.sym index 1ff74d34..e8496bb6 100644 --- a/xschem_library/rom8k/lvnand3.sym +++ b/xschem_library/rom8k/lvnand3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnor2.sch b/xschem_library/rom8k/lvnor2.sch index 44e64821..92f7b02f 100644 --- a/xschem_library/rom8k/lvnor2.sch +++ b/xschem_library/rom8k/lvnor2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnor2.sym b/xschem_library/rom8k/lvnor2.sym index 95672ee9..c0d43a36 100644 --- a/xschem_library/rom8k/lvnor2.sym +++ b/xschem_library/rom8k/lvnor2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnot.sch b/xschem_library/rom8k/lvnot.sch index 4f96d2df..be4fd6b2 100644 --- a/xschem_library/rom8k/lvnot.sch +++ b/xschem_library/rom8k/lvnot.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnot.sym b/xschem_library/rom8k/lvnot.sym index 2f4980f0..38acf67e 100644 --- a/xschem_library/rom8k/lvnot.sym +++ b/xschem_library/rom8k/lvnot.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/n.sym b/xschem_library/rom8k/n.sym index 8cf3e1c8..07660095 100644 --- a/xschem_library/rom8k/n.sym +++ b/xschem_library/rom8k/n.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/nlv.sym b/xschem_library/rom8k/nlv.sym index a417fc5b..1924f171 100644 --- a/xschem_library/rom8k/nlv.sym +++ b/xschem_library/rom8k/nlv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/nlv4t.sym b/xschem_library/rom8k/nlv4t.sym index a1ac1787..1af7c3b6 100644 --- a/xschem_library/rom8k/nlv4t.sym +++ b/xschem_library/rom8k/nlv4t.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/p.sym b/xschem_library/rom8k/p.sym index 5b2b8c6c..bc00a1cb 100644 --- a/xschem_library/rom8k/p.sym +++ b/xschem_library/rom8k/p.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/passhs.sch b/xschem_library/rom8k/passhs.sch index 9b384bff..3899302a 100644 --- a/xschem_library/rom8k/passhs.sch +++ b/xschem_library/rom8k/passhs.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/passhs.sym b/xschem_library/rom8k/passhs.sym index 7f631836..4efe41a7 100644 --- a/xschem_library/rom8k/passhs.sym +++ b/xschem_library/rom8k/passhs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/plv.sym b/xschem_library/rom8k/plv.sym index a18ce0c5..7dd4818a 100644 --- a/xschem_library/rom8k/plv.sym +++ b/xschem_library/rom8k/plv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/plv4t.sym b/xschem_library/rom8k/plv4t.sym index 1aa19a4f..4f23542b 100644 --- a/xschem_library/rom8k/plv4t.sym +++ b/xschem_library/rom8k/plv4t.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_addlatch.sch b/xschem_library/rom8k/rom2_addlatch.sch index bf57d4e4..5882c7da 100644 --- a/xschem_library/rom8k/rom2_addlatch.sch +++ b/xschem_library/rom8k/rom2_addlatch.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_addlatch.sym b/xschem_library/rom8k/rom2_addlatch.sym index d39cee58..85bc6309 100644 --- a/xschem_library/rom8k/rom2_addlatch.sym +++ b/xschem_library/rom8k/rom2_addlatch.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_col_prech.sch b/xschem_library/rom8k/rom2_col_prech.sch index 5b4c2b6d..e3d5fa5e 100644 --- a/xschem_library/rom8k/rom2_col_prech.sch +++ b/xschem_library/rom8k/rom2_col_prech.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_col_prech.sym b/xschem_library/rom8k/rom2_col_prech.sym index 7243d8df..92ac08e0 100644 --- a/xschem_library/rom8k/rom2_col_prech.sym +++ b/xschem_library/rom8k/rom2_col_prech.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_coldec.sch b/xschem_library/rom8k/rom2_coldec.sch index ac6f57a3..c2feda14 100644 --- a/xschem_library/rom8k/rom2_coldec.sch +++ b/xschem_library/rom8k/rom2_coldec.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_coldec.sym b/xschem_library/rom8k/rom2_coldec.sym index e986e38b..1d355f51 100644 --- a/xschem_library/rom8k/rom2_coldec.sym +++ b/xschem_library/rom8k/rom2_coldec.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_coldec_ref.sch b/xschem_library/rom8k/rom2_coldec_ref.sch index de0eb961..047a5c95 100644 --- a/xschem_library/rom8k/rom2_coldec_ref.sch +++ b/xschem_library/rom8k/rom2_coldec_ref.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_coldec_ref.sym b/xschem_library/rom8k/rom2_coldec_ref.sym index d1ffc791..70d3c63b 100644 --- a/xschem_library/rom8k/rom2_coldec_ref.sym +++ b/xschem_library/rom8k/rom2_coldec_ref.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_ctrl.sch b/xschem_library/rom8k/rom2_ctrl.sch index b45041e9..4141df0d 100644 --- a/xschem_library/rom8k/rom2_ctrl.sch +++ b/xschem_library/rom8k/rom2_ctrl.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_ctrl.sym b/xschem_library/rom8k/rom2_ctrl.sym index d9475a5c..8b0e7b8a 100644 --- a/xschem_library/rom8k/rom2_ctrl.sym +++ b/xschem_library/rom8k/rom2_ctrl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec1.sch b/xschem_library/rom8k/rom2_predec1.sch index 48a071d9..98e54134 100644 --- a/xschem_library/rom8k/rom2_predec1.sch +++ b/xschem_library/rom8k/rom2_predec1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec1.sym b/xschem_library/rom8k/rom2_predec1.sym index 524d5cc4..c2f90549 100644 --- a/xschem_library/rom8k/rom2_predec1.sym +++ b/xschem_library/rom8k/rom2_predec1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec3.sch b/xschem_library/rom8k/rom2_predec3.sch index 71e71279..356702e1 100644 --- a/xschem_library/rom8k/rom2_predec3.sch +++ b/xschem_library/rom8k/rom2_predec3.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec3.sym b/xschem_library/rom8k/rom2_predec3.sym index 630760ce..5c44ec93 100644 --- a/xschem_library/rom8k/rom2_predec3.sym +++ b/xschem_library/rom8k/rom2_predec3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec4.sch b/xschem_library/rom8k/rom2_predec4.sch index 048d6a8a..832e6b73 100644 --- a/xschem_library/rom8k/rom2_predec4.sch +++ b/xschem_library/rom8k/rom2_predec4.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec4.sym b/xschem_library/rom8k/rom2_predec4.sym index 9c6d165c..32e9045e 100644 --- a/xschem_library/rom8k/rom2_predec4.sym +++ b/xschem_library/rom8k/rom2_predec4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_sa.sch b/xschem_library/rom8k/rom2_sa.sch index d6f5573a..b336bf88 100644 --- a/xschem_library/rom8k/rom2_sa.sch +++ b/xschem_library/rom8k/rom2_sa.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_sa.sym b/xschem_library/rom8k/rom2_sa.sym index a7ab71b3..61fba653 100644 --- a/xschem_library/rom8k/rom2_sa.sym +++ b/xschem_library/rom8k/rom2_sa.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_sacell.sch b/xschem_library/rom8k/rom2_sacell.sch index ad02ced7..834fb06a 100644 --- a/xschem_library/rom8k/rom2_sacell.sch +++ b/xschem_library/rom8k/rom2_sacell.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_sacell.sym b/xschem_library/rom8k/rom2_sacell.sym index 775768dc..4ffd66b1 100644 --- a/xschem_library/rom8k/rom2_sacell.sym +++ b/xschem_library/rom8k/rom2_sacell.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_array.sch b/xschem_library/rom8k/rom3_array.sch index 9e55bed5..cd2818ba 100644 --- a/xschem_library/rom8k/rom3_array.sch +++ b/xschem_library/rom8k/rom3_array.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_array.sym b/xschem_library/rom8k/rom3_array.sym index 8a9178d4..02f03209 100644 --- a/xschem_library/rom8k/rom3_array.sym +++ b/xschem_library/rom8k/rom3_array.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_array_ref.sch b/xschem_library/rom8k/rom3_array_ref.sch index 0292129d..b44b2c9c 100644 --- a/xschem_library/rom8k/rom3_array_ref.sch +++ b/xschem_library/rom8k/rom3_array_ref.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_array_ref.sym b/xschem_library/rom8k/rom3_array_ref.sym index ad679dad..33b7127a 100644 --- a/xschem_library/rom8k/rom3_array_ref.sym +++ b/xschem_library/rom8k/rom3_array_ref.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_rowdec.sch b/xschem_library/rom8k/rom3_rowdec.sch index aa4f1501..31c4fe9e 100644 --- a/xschem_library/rom8k/rom3_rowdec.sch +++ b/xschem_library/rom8k/rom3_rowdec.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_rowdec.sym b/xschem_library/rom8k/rom3_rowdec.sym index 0eb33ce1..799b2666 100644 --- a/xschem_library/rom8k/rom3_rowdec.sym +++ b/xschem_library/rom8k/rom3_rowdec.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom8k.sch b/xschem_library/rom8k/rom8k.sch index 4c8d6082..28375789 100644 --- a/xschem_library/rom8k/rom8k.sch +++ b/xschem_library/rom8k/rom8k.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom8k.sym b/xschem_library/rom8k/rom8k.sym index 8e8119b9..04287dfa 100644 --- a/xschem_library/rom8k/rom8k.sym +++ b/xschem_library/rom8k/rom8k.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rulz-r8c33/ft232rl.sym b/xschem_library/rulz-r8c33/ft232rl.sym index a33a5f27..bc2a0958 100644 --- a/xschem_library/rulz-r8c33/ft232rl.sym +++ b/xschem_library/rulz-r8c33/ft232rl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rulz-r8c33/r8c-33c.sym b/xschem_library/rulz-r8c33/r8c-33c.sym index 8854bd25..aa5c6d4e 100644 --- a/xschem_library/rulz-r8c33/r8c-33c.sym +++ b/xschem_library/rulz-r8c33/r8c-33c.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rulz-r8c33/rulz-r8c33.sch b/xschem_library/rulz-r8c33/rulz-r8c33.sch index e5b3e81c..0eb63e82 100644 --- a/xschem_library/rulz-r8c33/rulz-r8c33.sch +++ b/xschem_library/rulz-r8c33/rulz-r8c33.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rulz-r8c33/usb-minib.sym b/xschem_library/rulz-r8c33/usb-minib.sym index 2d586768..b8724803 100644 --- a/xschem_library/rulz-r8c33/usb-minib.sym +++ b/xschem_library/rulz-r8c33/usb-minib.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/viewdraw_import/viewdraw_import.awk b/xschem_library/viewdraw_import/viewdraw_import.awk index dc3634dd..dfd82459 100755 --- a/xschem_library/viewdraw_import/viewdraw_import.awk +++ b/xschem_library/viewdraw_import/viewdraw_import.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2021 Stefan Frederik Schippers +# Copyright (C) 1998-2026 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/24cxx.sym b/xschem_library/xTAG/24cxx.sym index 87e3aec1..f870cf81 100644 --- a/xschem_library/xTAG/24cxx.sym +++ b/xschem_library/xTAG/24cxx.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/7414.sym b/xschem_library/xTAG/7414.sym index 927d3ffe..523ca915 100644 --- a/xschem_library/xTAG/7414.sym +++ b/xschem_library/xTAG/7414.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/cy7c64603-52nc.sym b/xschem_library/xTAG/cy7c64603-52nc.sym index fd8e4315..a69fedac 100644 --- a/xschem_library/xTAG/cy7c64603-52nc.sym +++ b/xschem_library/xTAG/cy7c64603-52nc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/max882.sym b/xschem_library/xTAG/max882.sym index ce6bbc9e..f9158362 100644 --- a/xschem_library/xTAG/max882.sym +++ b/xschem_library/xTAG/max882.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/sn75240pw.sym b/xschem_library/xTAG/sn75240pw.sym index f71f87ae..87788294 100644 --- a/xschem_library/xTAG/sn75240pw.sym +++ b/xschem_library/xTAG/sn75240pw.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-consio.sch b/xschem_library/xTAG/xTAG-consio.sch index e966498f..09d3e588 100644 --- a/xschem_library/xTAG/xTAG-consio.sch +++ b/xschem_library/xTAG/xTAG-consio.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-consio.sym b/xschem_library/xTAG/xTAG-consio.sym index c15bbeb8..1812efc8 100644 --- a/xschem_library/xTAG/xTAG-consio.sym +++ b/xschem_library/xTAG/xTAG-consio.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-jtagio.sch b/xschem_library/xTAG/xTAG-jtagio.sch index 968d1df3..d0f27871 100644 --- a/xschem_library/xTAG/xTAG-jtagio.sch +++ b/xschem_library/xTAG/xTAG-jtagio.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-jtagio.sym b/xschem_library/xTAG/xTAG-jtagio.sym index 36902ea4..02fc98cd 100644 --- a/xschem_library/xTAG/xTAG-jtagio.sym +++ b/xschem_library/xTAG/xTAG-jtagio.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-psu.sch b/xschem_library/xTAG/xTAG-psu.sch index ca664ec5..132974c0 100644 --- a/xschem_library/xTAG/xTAG-psu.sch +++ b/xschem_library/xTAG/xTAG-psu.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-psu.sym b/xschem_library/xTAG/xTAG-psu.sym index 5cd31f94..ff7ffda7 100644 --- a/xschem_library/xTAG/xTAG-psu.sym +++ b/xschem_library/xTAG/xTAG-psu.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-ucont.sch b/xschem_library/xTAG/xTAG-ucont.sch index 5f61e9f3..fd27a57e 100644 --- a/xschem_library/xTAG/xTAG-ucont.sch +++ b/xschem_library/xTAG/xTAG-ucont.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-ucont.sym b/xschem_library/xTAG/xTAG-ucont.sym index a18be548..cfb9535f 100644 --- a/xschem_library/xTAG/xTAG-ucont.sym +++ b/xschem_library/xTAG/xTAG-ucont.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG.sch b/xschem_library/xTAG/xTAG.sch index 78e8b05e..c1621956 100644 --- a/xschem_library/xTAG/xTAG.sch +++ b/xschem_library/xTAG/xTAG.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/and2_1.sym b/xschem_library/xschem_simulator/and2_1.sym index 0301da0e..2c55efe0 100644 --- a/xschem_library/xschem_simulator/and2_1.sym +++ b/xschem_library/xschem_simulator/and2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/and3_1.sym b/xschem_library/xschem_simulator/and3_1.sym index d9311418..1c3340c7 100644 --- a/xschem_library/xschem_simulator/and3_1.sym +++ b/xschem_library/xschem_simulator/and3_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/and4_1.sym b/xschem_library/xschem_simulator/and4_1.sym index 8b304c09..86aa4f7b 100644 --- a/xschem_library/xschem_simulator/and4_1.sym +++ b/xschem_library/xschem_simulator/and4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dev-1.sym b/xschem_library/xschem_simulator/dev-1.sym index 5499f731..361af420 100644 --- a/xschem_library/xschem_simulator/dev-1.sym +++ b/xschem_library/xschem_simulator/dev-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.8RC file_version=1.3 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dev-2.sym b/xschem_library/xschem_simulator/dev-2.sym index d46bc288..80b645e7 100644 --- a/xschem_library/xschem_simulator/dev-2.sym +++ b/xschem_library/xschem_simulator/dev-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dfrbp_1.sym b/xschem_library/xschem_simulator/dfrbp_1.sym index c2732e85..1fb6773d 100644 --- a/xschem_library/xschem_simulator/dfrbp_1.sym +++ b/xschem_library/xschem_simulator/dfrbp_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dfrtp_1.sym b/xschem_library/xschem_simulator/dfrtp_1.sym index 1d9f9bc7..ff53a740 100644 --- a/xschem_library/xschem_simulator/dfrtp_1.sym +++ b/xschem_library/xschem_simulator/dfrtp_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/diode_3.sym b/xschem_library/xschem_simulator/diode_3.sym index 7d133693..12a80a78 100644 --- a/xschem_library/xschem_simulator/diode_3.sym +++ b/xschem_library/xschem_simulator/diode_3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dlrtn_1.sym b/xschem_library/xschem_simulator/dlrtn_1.sym index 56bd0ef1..25ce953d 100644 --- a/xschem_library/xschem_simulator/dlrtn_1.sym +++ b/xschem_library/xschem_simulator/dlrtn_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dlrtp_1.sym b/xschem_library/xschem_simulator/dlrtp_1.sym index 4ffbfbe2..b50b2a3b 100644 --- a/xschem_library/xschem_simulator/dlrtp_1.sym +++ b/xschem_library/xschem_simulator/dlrtp_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/einvp_1.sym b/xschem_library/xschem_simulator/einvp_1.sym index f8fd9481..3007793c 100644 --- a/xschem_library/xschem_simulator/einvp_1.sym +++ b/xschem_library/xschem_simulator/einvp_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/fa_1.sym b/xschem_library/xschem_simulator/fa_1.sym index 83d65a6e..42acee30 100644 --- a/xschem_library/xschem_simulator/fa_1.sym +++ b/xschem_library/xschem_simulator/fa_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/giant_label.sym b/xschem_library/xschem_simulator/giant_label.sym index d5be315a..aae41b8a 100644 --- a/xschem_library/xschem_simulator/giant_label.sym +++ b/xschem_library/xschem_simulator/giant_label.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/giant_label2.sym b/xschem_library/xschem_simulator/giant_label2.sym index 56fb9173..ffd305c2 100644 --- a/xschem_library/xschem_simulator/giant_label2.sym +++ b/xschem_library/xschem_simulator/giant_label2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/inv_2.sym b/xschem_library/xschem_simulator/inv_2.sym index 230cae03..97ed0636 100644 --- a/xschem_library/xschem_simulator/inv_2.sym +++ b/xschem_library/xschem_simulator/inv_2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/invert-1.sym b/xschem_library/xschem_simulator/invert-1.sym index e505aafe..f08ee37d 100644 --- a/xschem_library/xschem_simulator/invert-1.sym +++ b/xschem_library/xschem_simulator/invert-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/logic_test.sch b/xschem_library/xschem_simulator/logic_test.sch index 778bed61..197f8bbf 100644 --- a/xschem_library/xschem_simulator/logic_test.sch +++ b/xschem_library/xschem_simulator/logic_test.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/logic_test.sym b/xschem_library/xschem_simulator/logic_test.sym index 48c6c175..72d2fddd 100644 --- a/xschem_library/xschem_simulator/logic_test.sym +++ b/xschem_library/xschem_simulator/logic_test.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/mux2_1.sym b/xschem_library/xschem_simulator/mux2_1.sym index 6d4a8bf9..d8b3d8d5 100644 --- a/xschem_library/xschem_simulator/mux2_1.sym +++ b/xschem_library/xschem_simulator/mux2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/nand2_1.sym b/xschem_library/xschem_simulator/nand2_1.sym index 615df86b..a7b6a3f0 100644 --- a/xschem_library/xschem_simulator/nand2_1.sym +++ b/xschem_library/xschem_simulator/nand2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/nand3_1.sym b/xschem_library/xschem_simulator/nand3_1.sym index 7bbe7251..49461239 100644 --- a/xschem_library/xschem_simulator/nand3_1.sym +++ b/xschem_library/xschem_simulator/nand3_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/nand4_1.sym b/xschem_library/xschem_simulator/nand4_1.sym index 217f8259..d11b36dc 100644 --- a/xschem_library/xschem_simulator/nand4_1.sym +++ b/xschem_library/xschem_simulator/nand4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/nor4_1.sym b/xschem_library/xschem_simulator/nor4_1.sym index 4e5b0b4b..693e6356 100644 --- a/xschem_library/xschem_simulator/nor4_1.sym +++ b/xschem_library/xschem_simulator/nor4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/ntrans.sym b/xschem_library/xschem_simulator/ntrans.sym index 600c8ad2..7166494f 100644 --- a/xschem_library/xschem_simulator/ntrans.sym +++ b/xschem_library/xschem_simulator/ntrans.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/o21ai_1.sym b/xschem_library/xschem_simulator/o21ai_1.sym index effc086a..6f275f30 100644 --- a/xschem_library/xschem_simulator/o21ai_1.sym +++ b/xschem_library/xschem_simulator/o21ai_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/or4_1.sym b/xschem_library/xschem_simulator/or4_1.sym index d0657ab6..629b46a0 100644 --- a/xschem_library/xschem_simulator/or4_1.sym +++ b/xschem_library/xschem_simulator/or4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/ptrans.sym b/xschem_library/xschem_simulator/ptrans.sym index 4c61868d..a94e1b5b 100644 --- a/xschem_library/xschem_simulator/ptrans.sym +++ b/xschem_library/xschem_simulator/ptrans.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/segment.sym b/xschem_library/xschem_simulator/segment.sym index ed0cdbb1..b7c97688 100644 --- a/xschem_library/xschem_simulator/segment.sym +++ b/xschem_library/xschem_simulator/segment.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/simulate_ff.sch b/xschem_library/xschem_simulator/simulate_ff.sch index aa469f40..50e1e378 100644 --- a/xschem_library/xschem_simulator/simulate_ff.sch +++ b/xschem_library/xschem_simulator/simulate_ff.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/simulate_ff.sym b/xschem_library/xschem_simulator/simulate_ff.sym index 3dbd3824..d80ab5a3 100644 --- a/xschem_library/xschem_simulator/simulate_ff.sym +++ b/xschem_library/xschem_simulator/simulate_ff.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/switch-1.sym b/xschem_library/xschem_simulator/switch-1.sym index 68879101..44e92919 100644 --- a/xschem_library/xschem_simulator/switch-1.sym +++ b/xschem_library/xschem_simulator/switch-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/switch_level_sim.sch b/xschem_library/xschem_simulator/switch_level_sim.sch index 420f726a..cd69f7ea 100644 --- a/xschem_library/xschem_simulator/switch_level_sim.sch +++ b/xschem_library/xschem_simulator/switch_level_sim.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/xnor2_1.sym b/xschem_library/xschem_simulator/xnor2_1.sym index 4926d8ec..311d4085 100644 --- a/xschem_library/xschem_simulator/xnor2_1.sym +++ b/xschem_library/xschem_simulator/xnor2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/xor2_1.sym b/xschem_library/xschem_simulator/xor2_1.sym index b3f6666e..5f427bfd 100644 --- a/xschem_library/xschem_simulator/xor2_1.sym +++ b/xschem_library/xschem_simulator/xor2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/xor3_1.sym b/xschem_library/xschem_simulator/xor3_1.sym index e6fafc13..96aaaac1 100644 --- a/xschem_library/xschem_simulator/xor3_1.sym +++ b/xschem_library/xschem_simulator/xor3_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/xor4_1.sym b/xschem_library/xschem_simulator/xor4_1.sym index 83480161..c1660070 100644 --- a/xschem_library/xschem_simulator/xor4_1.sym +++ b/xschem_library/xschem_simulator/xor4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2024 Stefan Frederik Schippers +* Copyright (C) 1998-2026 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by