From c1f4d7e5f1fd8b0918b9f48757fdf49f8f08753a Mon Sep 17 00:00:00 2001
From: Matthias Schweikardt
- More objects can be rezized. You can add vertex/endpoints by pressing Ctrl and Shift and dragging the mouse + More objects can be resized. You can add vertex/endpoints by pressing Ctrl and Shift and dragging the mouse to enclose another vertex/endpoint. After selecting all desired elements pressing the m key will resize all objects.
@@ -373,7 +373,7 @@ set replace_key(w) Shift-W
Clicking one control point with the Ctrl key will delete a point in the polygon shape.
Adding attribute bezier=true or bezier=1 will transform the polygon into a bezier - cuve with the polygon points acting as control points.
+ curve with the polygon points acting as control points.
diff --git a/doc/xschem_man/component_property_syntax.html b/doc/xschem_man/component_property_syntax.html
index 5ceb672d..bf4148f1 100644
--- a/doc/xschem_man/component_property_syntax.html
+++ b/doc/xschem_man/component_property_syntax.html
@@ -73,7 +73,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
else, provided the names are different. XSCHEM enforces this,
unless Options -> allow duplicated instance names is set. If a name is given that already
exist in the current schematic it will be renamed. Normally the template string defines a default
- name for a given component, and expecially for SPICE compatibility, the first character must NOT
+ name for a given component, and especially for SPICE compatibility, the first character must NOT
be changed. For example, the default name for a MOS transistor is m1, it can be renamed
for example to mcurr_source but not for example to dcurr_source. XSCHEM
does not enforce that the first character is preserved, it's up to the designer to keep it
@@ -94,7 +94,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
This attribute defines a location (web page, file) that can be viewed when hitting the
- <shift>H key (or <Alt> left mouse buttoni) on a selected component.
+ <shift>H key (or <Alt> left mouse button) on a selected component.
This is very useful to link a datasheet to a
component, for example. The default program used to open the url is xdg-open.
this can be changed in the ~/xschemrc configuration file with the launcher_default_program
@@ -113,9 +113,9 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
this attribute is valid only on netlist_commands type symbols and specifies that the - symbol should be netlisted only if it is instantiated in the top-most hierarchy. This is very usefull + symbol should be netlisted only if it is instantiated in the top-most hierarchy. This is very useful for spice commands. Spice commands are placed in a special netlist component as we will see - and are meaningfull only when simulating the block, but should be skipped if the component + and are meaningful only when simulating the block, but should be skipped if the component is simulated as part of a bigger system which has its own (at higher hierarchy level) netlistcomponent for Spice commands.
@@ -175,7 +175,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
lvs_ignore is set to 1. This can be done in the Simulation menu:
Set 'lvs_ignore' variable. If this lvs_ignore is set on the instance
it will be shorted / ignored or kept as is depending on its lvs_ignore attribute
- and will be effective in all netlising formats. This is mostly used to modify the produced netlist
+ and will be effective in all netlisting formats. This is mostly used to modify the produced netlist
automatically when doing schematic vs layout (LVS) comparison.
By using the *_ignore attributes you can modify the circuit depending on the value of a tcl variable:
@@ -201,7 +201,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
In this example a verilog_include_file.v is included using the verilog `include directive.
In order to generate a full path for it the abs_sym_path TCL function is used that searches for this file
- in any of the XCHEM_LIBRARY_PATH directories. Since TCL is used the attribute is wrappend into a tcleval(...),
+ in any of the XCHEM_LIBRARY_PATH directories. Since TCL is used the attribute is wrapped into a tcleval(...),
The following will appear in the generated netlist:
// expanding symbol: verilog_include.sym # of pins=3
diff --git a/doc/xschem_man/creating_schematic.html b/doc/xschem_man/creating_schematic.html
index 873c4021..4fcd5a3c 100644
--- a/doc/xschem_man/creating_schematic.html
+++ b/doc/xschem_man/creating_schematic.html
@@ -68,7 +68,7 @@ p{padding: 15px 30px 10px;}
Finally we must connect the input and output port connectors, and to complete the gate schematic
we decide to use W=8u for the pmos transistors. Select both the pmos devices and press the
- edit proprty 'q' key; modify from 5u (default) to 8u.
+ edit property 'q' key; modify from 5u (default) to 8u.
@@ -101,7 +101,7 @@ p{padding: 15px 30px 10px;}
and pressing the Delete key) all the green lines, keep the red pins, the pin labels and the
@symname and @name texts, then draw a nand shape like in the following picture.
To allow you to draw small
- segments you may need to reduce the snap factor (menu View->Half snap thresholf)
+ segments you may need to reduce the snap factor (menu View->Half snap threshold)
remember to reset the snap factor to its default setting when done.
diff --git a/doc/xschem_man/developer_info.html b/doc/xschem_man/developer_info.html
index f6784467..2749a7a1 100644
--- a/doc/xschem_man/developer_info.html
+++ b/doc/xschem_man/developer_info.html
@@ -34,7 +34,7 @@ p{padding: 15px 30px 10px;}
These primitive objects can be drawn on any layer. XSCHEM number of layers can be defined at compile
- time, however there are some predefiend layers (from 0 to 5) that have specific functions:
+ time, however there are some predefined layers (from 0 to 5) that have specific functions:
- Background color
@@ -103,7 +103,7 @@ p{padding: 15px 30px 10px;}
- When drawing objecs in XSCHEM coordinates are snapped to a multiple of 10.0 coordinate units,
+ When drawing objects in XSCHEM coordinates are snapped to a multiple of 10.0 coordinate units,
so all drawn objects are easily aligned.
The snap level can be changed to any value by the user to allow drawing small objects if desired.
Grid points are shown at multiples of 20.0 coordinate units, by default.
diff --git a/doc/xschem_man/graphs.html b/doc/xschem_man/graphs.html
index ef5d9136..6e141f08 100644
--- a/doc/xschem_man/graphs.html
+++ b/doc/xschem_man/graphs.html
@@ -263,7 +263,7 @@ The following syntax:
loaded from a common .raw file.
Image below shows an example: DC, AC, Transient simulation each one done with 3 runs
varying the Bias current. In addition the xschem annotate_op is also used to
- annotate the operating point into teh schematic.
+ annotate the operating point into the schematic.
Ctrl-Left-button-clicking the Backannotate launcher will instantly update
all graphs with data taken from the updated raw file(s).
@@ -276,7 +276,7 @@ The following syntax:
"alias_name; signal_name % dataset# raw_file sim_type
where:
dataset# is the dataset index to display (only meaningful and needed
- if multiple datasets are present like in Montecarloo / Mismatch simulations).
+ if multiple datasets are present like in Montecarlo / Mismatch simulations).
If empty or -1 then show all datasets.
raw_file is the location and name of the raw file to load. You can use
$netlist_dir to quickly reference the simulation directory where usually such
diff --git a/doc/xschem_man/net_probes.html b/doc/xschem_man/net_probes.html
index 8be17716..3e7ca3ff 100644
--- a/doc/xschem_man/net_probes.html
+++ b/doc/xschem_man/net_probes.html
@@ -21,7 +21,7 @@ p{padding: 15px 30px 10px;}
NET PROBES
- XSCHEM has the ability to hilight a net and propagate the highlight color to all nets or
+ XSCHEM has the ability to highlight a net and propagate the highlight color to all nets or
instance pins attached to the net. It has the ability to follow this net through the hierarchy. This is very
useful in large designs as it makes it easy to see where a net is driven and were the net goes (fan-out).
Highlighting a net is straightforward, click a net and press the 'k' key. If more nets are selected
diff --git a/doc/xschem_man/netlisting.html b/doc/xschem_man/netlisting.html
index df8b4392..19adf4cb 100644
--- a/doc/xschem_man/netlisting.html
+++ b/doc/xschem_man/netlisting.html
@@ -65,7 +65,7 @@ p{padding: 15px 30px 10px;}
subcircuit components:
- - leaf: these componens are 'known' to the simulator,
+
- leaf: these components are 'known' to the simulator,
netlist of these blocks is done by specifying a 'format' attribute in the symbol
property string. Examples of leaf components in the schematic above are voltage sources,
resistors, capacitors, dependent sources. The following are examples of leaf component
diff --git a/doc/xschem_man/parameters.html b/doc/xschem_man/parameters.html
index 3517c9cc..5793b7c3 100644
--- a/doc/xschem_man/parameters.html
+++ b/doc/xschem_man/parameters.html
@@ -64,7 +64,7 @@ p{padding: 15px 30px 10px;}
Now close the modified symbol saving the changes. Let's test the placement of the
new modified symbol. Start a new
schematic (menu File -> New) and insert (Insert key)
- the NAND2 gate. by pressing 'q' you are now able to speciify different values
+ the NAND2 gate. by pressing 'q' you are now able to specify different values
for the geometric parameters:
diff --git a/doc/xschem_man/run_xschem.html b/doc/xschem_man/run_xschem.html
index f329071d..c68adf1e 100644
--- a/doc/xschem_man/run_xschem.html
+++ b/doc/xschem_man/run_xschem.html
@@ -52,7 +52,7 @@ Options:
-n --netlist Do a netlist of the given schematic cell.
-v --version Print version information and exit.
-V --vhdl Set netlist type to VHDL.
- -S --simulate Run a simulation of the current schematc file
+ -S --simulate Run a simulation of the current schematic file
(spice/Verilog/VHDL, depending on the netlist
type chosen).
-w --verilog Set netlist type to Verilog.
@@ -73,7 +73,7 @@ Options:
-s --spice Set netlist type to SPICE.
-y --symbol Set netlist type to SYMBOL (used when drawing symbols)
-x --no_x Don't use X (only command mode).
- -z --rainbow Use a raibow-looking layer color table.
+ -z --rainbow Use a rainbow-looking layer color table.
-W --waves Show simulation waveforms.
-f --flat_netlist Set flat netlist (for spice format only).
-r --no_readline Start without the tclreadline package, this is necessary
diff --git a/doc/xschem_man/simulation.html b/doc/xschem_man/simulation.html
index 0836ca4b..af3a7c5e 100644
--- a/doc/xschem_man/simulation.html
+++ b/doc/xschem_man/simulation.html
@@ -68,7 +68,7 @@ xrdb -merge ~/.Xresources
The text entry on the verilog line is the command to invoke icarus verilog simulation. $N
will be expanded to the netlist file ($netlist_dir/greycnt.v), while $n
will be replaced with the circuit name without extension ($netlist_dir/greycnt).
- Note also the command to invoke gtkwave on the vcd file generated by theverilog simulation.
+ Note also the command to invoke gtkwave on the vcd file generated by the verilog simulation.
If Save Configuration button is pressed the changes are made permanent by saving
in a ~/.xschem/simrc file.
diff --git a/doc/xschem_man/subckt_with_parameters.html b/doc/xschem_man/subckt_with_parameters.html
index 625f10a6..eb62b96d 100644
--- a/doc/xschem_man/subckt_with_parameters.html
+++ b/doc/xschem_man/subckt_with_parameters.html
@@ -25,7 +25,7 @@ p{padding: 15px 30px 10px;}
- GAIN: The differential maximum small signal gain of the opamp.
- - AMPLITUDE: The peak to peak swing ot the opamp output.
+ - AMPLITUDE: The peak to peak swing of the opamp output.
- OFFSET: the offset of the output when input differential signal is zero.
For example giving AMPLITUDE=10 and OFFSET=5 will result in an output swing from 0 to +10V.
- ROUT: the output resistance.
@@ -40,7 +40,7 @@ p{padding: 15px 30px 10px;}
- after drawig the schematic a symbol is created. The easiest way is to press the 'a' key in the
+ after drawing the schematic a symbol is created. The easiest way is to press the 'a' key in the
schematic to automatically create the symbol, then descend into the symbol and do some artwork to
reshape it to represent an opamp.
After reshaping the symbol edit its global attributes and add handling of subcircuit parameters
diff --git a/doc/xschem_man/symbol_property_syntax.html b/doc/xschem_man/symbol_property_syntax.html
index a1299ba1..adb6f3cc 100644
--- a/doc/xschem_man/symbol_property_syntax.html
+++ b/doc/xschem_man/symbol_property_syntax.html
@@ -45,14 +45,14 @@ p{padding: 15px 30px 10px;}
file even if it exists. Xschem will not allow to descend into an existing schematic.
- label: the symbol is used to label a net. These type of symbols must have
one and only one pin, and the template string must define a lab attribute
- that is passed at component instantiationi to name the net it is attached to.
+ that is passed at component instantiation to name the net it is attached to.
- probe: this denotes a probe symbol that may be backannotated with a
backannotation script (example: ngspice_backannotate.tcl).
- ngprobe: This is a probe element that uses a 'pull' method to fetch simulation
data and display it in current schematic. The data displayed is thus dynamic, multiple
- instancs of the same symbol with annotators will display operating point data for that particular
+ instances of the same symbol with annotators will display operating point data for that particular
instance without the need to update the backannotation as is required for annotators
- using the 'push' annotation methid.
+ using the 'push' annotation method.
- netlist_commands: the symbol is used to place SPICE commands into a spice netlist.
It should also have a value attribute that may contain arbitrary text that is
copied verbatim into the netlist. More on this in the netlist slide.
@@ -174,7 +174,7 @@ type=nmos
lvs_ignore is set to 1. This can be done in the Simulation menu:
Set 'lvs_ignore' variable. If this lvs_ignore is set on the symbol
it will be shorted / ignored or kept as is depending on its lvs_ignore attribute
- and will be effective in all netlising formats. This is mostly used to modify the produced netlist
+ and will be effective in all netlisting formats. This is mostly used to modify the produced netlist
automatically when doing schematic vs layout (LVS) comparison.
@@ -199,7 +199,7 @@ type=nmos
- default_schematic
If set to ignore xschem will not descend into the symbol associated schematic and will
not complain if this schematic does not exists. To descend into a schematic instances must specify a
- schematic attribute, otherwise no descendng and expansion occurs.
+ schematic attribute, otherwise no descending and expansion occurs.
- spice_sym_def
- verilog_sym_def
@@ -219,7 +219,7 @@ type=nmos
In this example a verilog_include_file.v is included using the verilog `include directive.
In order to generate a full path for it the abs_sym_path TCL function is used that searches for this file
- in any of the XCHEM_LIBRARY_PATH directories. Since TCL is used the attribute is wrappend into a tcleval(...),
+ in any of the XCHEM_LIBRARY_PATH directories. Since TCL is used the attribute is wrapped into a tcleval(...),
The following will appear in the generated netlist:
// expanding symbol: verilog_include.sym # of pins=3
@@ -236,7 +236,7 @@ type=nmos
This attribute is only useable in netlist_commands type symbols (netlist.sym, code.sym,...)
if set to end it tells XSCHEM that
the component instance of that symbol must be netlisted at the end, after all the other elements.
- This is sometimes needed for SPICE commands that must ge given at the end of the netlist.
+ This is sometimes needed for SPICE commands that must given at the end of the netlist.
This will be explained more in detail in the netlisting slide.
The place=header attribute is only valid only for netlist_commands
@@ -359,7 +359,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1
- verilog_extra
This attribute is similar to the extra attribute and is used for verilog netlist. Nodes
- listed in this atrribute value will be used as additional pin connections.
+ listed in this attribute value will be used as additional pin connections.
the extra attribute is still used in verilog netlist as a list of attributes NOT to pass as
@@ -438,7 +438,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1
This attribute is used in the xschem embedded digital simulation engine: propagate logic simulation
to the output pins n,[m,...]. The logic function is defined via the 'functionn'
- global attribute. There is one 'funtionn' for each n output pin.
+ global attribute. There is one 'functionn' for each n output pin.
see 'functionn' attribute for more info.
@@ -476,7 +476,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1
- m: same as above, but don't update if 'm' not 1 or 0. Used to avoid deadlocks.
- z: preceeded by 2 elements, 'a', 'e', return 'a' if 'e' == 1 else Z (hi-Z)
- d: Duplicates top element on the stack
- - x: Exhanges the 2 top elements on the stack
+ - x: Exchanges the 2 top elements on the stack
- r: Rotate down: bottom element of stack goes to top
- H: Puts a Logic '1' on the stack
- L: Puts a Logic '0' on the stack
@@ -642,19 +642,19 @@ verilog_format="xnor #(@risedel , @falldel ) @name ( @@Z , @@A , @@B );"
- @prop_ptr
- this expandes to the entire property string passed to the component.
+ this expands to the entire property string passed to the component.
- @schprop
- this expandes to the spice global property string of the schematic containing the symbol
+ this expands to the spice global property string of the schematic containing the symbol
- @schvhdlprop
- this expandes to the VHDL global property string of the schematic containing the symbol
+ this expands to the VHDL global property string of the schematic containing the symbol
- @schverilogprop
- this expandes to the Verilog global property string of the schematic containing the symbol
+ this expands to the Verilog global property string of the schematic containing the symbol
TCL ATTRIBUTE SUBSTITUTION
diff --git a/doc/xschem_man/tutorial_instance_based_implementation.html b/doc/xschem_man/tutorial_instance_based_implementation.html
index 33733a77..3ea2b8d4 100644
--- a/doc/xschem_man/tutorial_instance_based_implementation.html
+++ b/doc/xschem_man/tutorial_instance_based_implementation.html
@@ -57,7 +57,7 @@ p{padding: 15px 30px 10px;}
spice_sym_def attribute on instance
A spice_sym_def=<...text...> attribute attached to an instance will specify some text that describes
- the subcircuit (it can be a simplified spice subcircuit netlist or a spice .include line that gets the subcircuit from
+ the subcircuit (it can be a simplified spice subcircuit netlist or a spice .include line that gets the subcircuit from
an external file). This attribute on an instance must always be paired with a matching schematic attribute
that specifies the subcircuit name the instance is linked to.
@@ -100,10 +100,10 @@ spice_sym_def="
spice_sym_def=".include /path/to/subckt_file"
- Xchem will use the port order provided in the subckt line, either by looking directly into the attribute value
+ Xschem will use the port order provided in the subckt line, either by looking directly into the attribute value
or by loading the file specified by the .include line. This way there will not be inconsistencies
between instance line and subckt definition in the circuit netlist. If for some reason the port list can not be read or
- pin names do not match xchem will use the port order drom the .sym file.
+ pin names do not match xschem will use the port order drom the .sym file.
diff --git a/doc/xschem_man/tutorial_run_simulation.html b/doc/xschem_man/tutorial_run_simulation.html
index 390699ca..c183817e 100644
--- a/doc/xschem_man/tutorial_run_simulation.html
+++ b/doc/xschem_man/tutorial_run_simulation.html
@@ -72,7 +72,7 @@ p{padding: 15px 30px 10px;}
-
- Cosmetics: add 'title.sym' move the circuit (by selecting it dragging the mouse and pressing 'm', if needed). Note that you can do a 'stretch move'operation if you need move components keeping the wires attached; refer to the xschem manual here
+ - Cosmetics: add 'title.sym' move the circuit (by selecting it dragging the mouse and pressing 'm', if needed). Note that you can do a 'stretch move' operation if you need move components keeping the wires attached; refer to the xschem manual here
diff --git a/doc/xschem_man/tutorial_use_existing_subckt.html b/doc/xschem_man/tutorial_use_existing_subckt.html
index 81146b58..47b71276 100644
--- a/doc/xschem_man/tutorial_use_existing_subckt.html
+++ b/doc/xschem_man/tutorial_use_existing_subckt.html
@@ -63,13 +63,13 @@ template="name=x1"
This will put the selected pin in first position.
- Then move to the pin you want in second position, repeat above steps and assing to it index number 1,
+ Then move to the pin you want in second position, repeat above steps and assign to it index number 1,
and so on for all the symbol pins. At the end save your symbol and this will be the pin
ordering in netlists.
When netlist is produced this order will be used.
If left pins in above example have sequence numbers of (starting from the top) 0, 1, 2, 3 and
right pins have sequence numbers (starting from the bottom) 4, 5, 6, 7 the instance line in
- the netlist will be (check the net names with the schematc in the first image above):
+ the netlist will be (check the net names with the schematic in the first image above):
x1 VSS TRIG OUT VSUPPLY CTRL TRIG DIS VSUPPLY ne555
diff --git a/doc/xschem_man/xschem_elements.html b/doc/xschem_man/xschem_elements.html
index 82e1444e..a3a5f3ee 100644
--- a/doc/xschem_man/xschem_elements.html
+++ b/doc/xschem_man/xschem_elements.html
@@ -105,7 +105,7 @@ p{padding: 15px 30px 10px;}
- You wil learn in the xschem properties chapter
+ You will learn in the xschem properties chapter
how to set, edit and change object properties.
diff --git a/doc/xschem_man/xschem_properties.html b/doc/xschem_man/xschem_properties.html
index cbd77f98..1ad14d97 100644
--- a/doc/xschem_man/xschem_properties.html
+++ b/doc/xschem_man/xschem_properties.html
@@ -49,7 +49,7 @@ p{padding: 15px 30px 10px;}
The property string also defines a dir attribute with value
inout. This tells XSCHEM that electrically this is an input/output pin.
This is important when producing VHDL/verilog netlists.
- The propag=1 tells XSCHEM that when we select a wire attaced to this pin
+ The propag=1 tells XSCHEM that when we select a wire attached to this pin
(which is located at index 0 in xschem) the highlight will propagate to the other pin (with index 1).
To view the xschem index of a pin click and hold the mouse on it, the index will be shown as
n= <number> in the bottom status line:
diff --git a/doc/xschem_man/xschem_remote.html b/doc/xschem_man/xschem_remote.html
index d0ef7f3c..65c3c609 100644
--- a/doc/xschem_man/xschem_remote.html
+++ b/doc/xschem_man/xschem_remote.html
@@ -60,7 +60,7 @@ p{padding: 15px 30px 10px;}
The following shell script fragment shows the commands to be used to negotiate with xschem another tcp port.
The nc (netcat) utility is used to pipe the commands to the tcp socket.
When starting xschem a fixed initial port number is always used (2021 by default), so it is always possible to
- remotely communicate with xschem using this TCP port. Then the following comands can be sent to setup a new port number
+ remotely communicate with xschem using this TCP port. Then the following commands can be sent to setup a new port number
for further communications, freeing the initial (2021) port number. If another xschem process is started it will
again use the initial port number, so no port number collisions occur.
@@ -77,7 +77,7 @@ schippes@asus:~$ b=$(echo 'xschem get current_name' |nc localhost "$a")
schippes@asus:~$ echo "$b"
untitled.sch
-## repeat above steps if you want additional xschem instances each listenng to a different free tcp port.
+## repeat above steps if you want additional xschem instances each listening to a different free tcp port.