From b63a70090a667a070a74012d23e4eb05f7e3a972 Mon Sep 17 00:00:00 2001
From: stefan schippers <stefan.schippers@gmail.com>
Date: Sun, 12 Nov 2023 13:08:51 +0100
Subject: [PATCH] doc updates

---
 doc/xschem_man/developer_info.html     |  7 +++
 xschem_library/ngspice/adc.sch         | 36 +++++++-------
 xschem_library/ngspice/delta_sigma.sch | 68 +++++++++++++++++---------
 3 files changed, 69 insertions(+), 42 deletions(-)

diff --git a/doc/xschem_man/developer_info.html b/doc/xschem_man/developer_info.html
index 4ea94360..f42e9d05 100644
--- a/doc/xschem_man/developer_info.html
+++ b/doc/xschem_man/developer_info.html
@@ -522,6 +522,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
 
 
 
+
+
 
 
 
@@ -1073,6 +1075,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
    Rebuild logical connectivity abstraction of schematic </pre>
    <li><kbd>       rebuild_selection </kbd></li><pre>
    Rebuild selection list</pre>
+   <li><kbd>       record_global_node n node </kbd></li><pre>
+   call the record_global_node function (list of netlist global nodes) </pre>
    <li><kbd>       rect [x1 y1 x2 y2] [pos] [propstring] [draw]</kbd></li><pre>
    if 'x1 y1 x2 y2'is given place recangle on current
    layer (rectcolor) at indicated coordinates.
@@ -1267,6 +1271,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
    When a symbol is selected edit it in a new tab/window if not already open.
    If nothing selected open another window of the second schematic (issues a warning).
    if 'new_process' is given start a new xschem process </pre>
+   <li><kbd>       swap_windows </kbd></li><pre>
+   swap first and second window in window interface (internal command)</pre>
    <li><kbd>       switch [window_path |schematic_name]</kbd></li><pre>
    Switch context to indicated window path or schematic name
    returns 0 if switch was successfull or 1 in case of errors
@@ -1415,6 +1421,7 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
 
 
 
+
 
 
  </ul>
diff --git a/xschem_library/ngspice/adc.sch b/xschem_library/ngspice/adc.sch
index 6e7aebb6..6be4454c 100644
--- a/xschem_library/ngspice/adc.sch
+++ b/xschem_library/ngspice/adc.sch
@@ -69,7 +69,7 @@ P 5 5 40 -670 690 -670 690 -230 40 -230 40 -670 { dash=5}
 T {Modulator} 530 -710 0 0 0.6 0.6 { layer=5}
 T {Digital Decimator} 1030 -520 0 0 0.6 0.6 {layer=4}
 T {D} 190 -530 0 0 1 1 { layer=5 font=Symbol}
-T {S} 380 -650 0 0 1 1 { layer=5 font=Symbol}
+T {S} 370 -650 0 0 1 1 { layer=5 font=Symbol}
 T {D-S} 460 -705 0 0 0.6 0.6 { layer=5 font=Symbol}
 N 920 -410 940 -410 {lab=Q}
 N 940 -410 940 -250 {lab=Q}
@@ -88,26 +88,26 @@ N 670 -410 800 -410 { lab=COMP}
 N 210 -250 940 -250 { lab=Q}
 N 1080 -410 1170 -410 { lab=QN}
 N 940 -410 1000 -410 { lab=Q}
-N 530 -440 550 -440 { lab=INTEG}
-N 530 -440 530 -400 { lab=INTEG}
-N 310 -370 320 -370 { lab=VREF}
-N 210 -430 320 -430 {lab=FB}
-N 460 -400 530 -400 { lab=INTEG}
-N 430 -570 460 -570 { lab=INTEG}
-N 460 -570 460 -400 { lab=INTEG}
-N 320 -570 370 -570 { lab=FB}
+N 520 -440 550 -440 { lab=INTEG}
+N 520 -440 520 -400 { lab=INTEG}
+N 300 -370 310 -370 { lab=VREF}
+N 210 -430 310 -430 {lab=FB}
+N 450 -400 520 -400 { lab=INTEG}
+N 420 -570 450 -570 { lab=INTEG}
+N 450 -570 450 -400 { lab=INTEG}
+N 310 -570 360 -570 { lab=FB}
 N 120 -430 140 -430 { lab=SIG_IN}
-N 320 -570 320 -430 { lab=FB}
+N 310 -570 310 -430 { lab=FB}
 N 210 -430 210 -380 { lab=FB}
 N 210 -320 210 -250 { lab=Q}
-N 440 -400 460 -400 { lab=INTEG}
+N 430 -400 450 -400 { lab=INTEG}
 N 200 -430 210 -430 {lab=FB}
 N 1070 -270 1450 -270 { lab=RSTI}
 N 1070 -300 1070 -270 { lab=RSTI}
 N 1170 -390 1170 -320 { lab=#net4}
 C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
 C {lab_pin.sym} 800 -390 0 0 {name=p4 lab=CK}
-C {lab_wire.sym} 770 -410 0 0 {name=l4 lab=COMP}
+C {lab_wire.sym} 760 -410 0 1 {name=l4 lab=COMP}
 C {lab_pin.sym} 940 -330 0 1 {name=p8 lab=Q}
 C {flip_flop_ngspice.sym} 860 -390 0 0 {name=x1}
 C {lab_pin.sym} 800 -370 0 0 {name=p3 lab=0}
@@ -147,10 +147,10 @@ C {spice_probe.sym} 1540 -270 0 0 {name=p18 attrs=""}
 C {inv_ngspice.sym} 1040 -410 0 0 {name=x11 net_name=true RUP=1000}
 C {lab_wire.sym} 1130 -410 0 0 {name=l2 lab=QN}
 C {spice_probe.sym} 1090 -410 0 0 {name=p19 attrs=""}
-C {ipin.sym} 310 -370 0 0 {name=p242 lab=VREF}
-C {lab_pin.sym} 530 -420 0 0 {name=p244 lab=INTEG}
+C {ipin.sym} 300 -370 0 0 {name=p242 lab=VREF}
+C {lab_pin.sym} 520 -420 0 0 {name=p244 lab=INTEG}
 C {ipin.sym} 120 -430 0 0 {name=p260 lab=SIG_IN}
-C {capa.sym} 400 -570 1 0 {name=c10 m=1 value="1e-12"}
+C {capa.sym} 390 -570 1 0 {name=c10 m=1 value="1e-12"}
 C {res.sym} 170 -430 1 0 {name=R4
 value=60k
 footprint=1206
@@ -162,10 +162,10 @@ value=60k
 footprint=1206
 device=resistor
 m=1}
-C {lab_pin.sym} 320 -460 0 0 {name=p262 lab=FB}
-C {spice_probe.sym} 460 -500 0 0 {name=p264 attrs=""}
+C {lab_pin.sym} 310 -490 0 0 {name=p262 lab=FB}
+C {spice_probe.sym} 450 -500 0 0 {name=p264 attrs=""}
 C {spice_probe.sym} 220 -430 0 0 {name=p265 attrs=""}
-C {opamp_65nm.sym} 380 -400 2 1 {name=x41}
+C {opamp_65nm.sym} 370 -400 2 1 {name=x41}
 C {comp_65nm.sym} 610 -410 0 0 {name=x42}
 C {spice_probe.sym} 1470 -430 0 0 {name=p2 attrs=""}
 C {or_ngspice.sym} 1110 -320 0 0 {name=x3 ROUT=1000 net_name=true}
diff --git a/xschem_library/ngspice/delta_sigma.sch b/xschem_library/ngspice/delta_sigma.sch
index dc81e18a..fcec9e6a 100644
--- a/xschem_library/ngspice/delta_sigma.sch
+++ b/xschem_library/ngspice/delta_sigma.sch
@@ -91,11 +91,31 @@ P 8 7 620 -700 820 -700 820 -710 860 -700 820 -690 820 -700 620 -700 {}
 T {Value of this signal
 is equal to adc conversion
 CODE[5:0]} 602.5 -792.5 0 0 0.4 0.4 {layer=8}
+N 510 -220 540 -220 {
+lab=SIG_IN}
+N 510 -200 540 -200 {
+lab=VREF}
+N 510 -180 540 -180 {
+lab=CK}
+N 510 -160 540 -160 {
+lab=RST}
+N 270 -720 270 -690 {
+lab=VREF}
+N 520 -720 520 -690 {
+lab=RST}
+N 390 -720 390 -690 {
+lab=VCC}
+N 270 -570 270 -540 {
+lab=SIG_IN}
+N 520 -570 520 -540 {
+lab=CK}
+N 390 -570 390 -540 {
+lab=VSS}
 C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
-C {lab_pin.sym} 270 -670 0 0 {name=p33 lab=VREF}
-C {vsource.sym} 270 -640 0 0 {name=v2 value="'VCC/2'"}
-C {lab_pin.sym} 270 -610 0 0 {name=p34 lab=0}
-C {simulator_commands.sym} 10 -390 0 0 {name=INTERACTIVE
+C {lab_pin.sym} 270 -720 0 0 {name=p33 lab=VREF}
+C {vsource.sym} 270 -660 0 0 {name=v2 value="'VCC/2'"}
+C {lab_pin.sym} 270 -630 0 0 {name=p34 lab=0}
+C {simulator_commands.sym} 10 -380 0 0 {name=INTERACTIVE
 simulator=ngspice
 spice_ignore=0
 tclcommand="xschem edit_vi_prop"
@@ -120,44 +140,44 @@ value="
   quit 0
 .endc
 "}
-C {vsource.sym} 270 -540 0 1 {name=v3 
+C {vsource.sym} 270 -510 0 1 {name=v3 
 value="pwl
 + 0.001u 0.34 3u 0.34 
 + 3.001u 0.88 6u 0.88
 + 6.001u 0.97 9u 0.97"}
-C {lab_pin.sym} 270 -510 0 0 {name=p1 lab=0}
+C {lab_pin.sym} 270 -480 0 0 {name=p1 lab=0}
 C {lab_pin.sym} 270 -570 0 0 {name=p2 lab=SIG_IN}
-C {vsource.sym} 520 -540 0 0 {name=v1 
+C {vsource.sym} 520 -510 0 0 {name=v1 
 value="pulse 0 VCC 100n 100p 100p 9.9n 20n" 
 xvalue="sin 0.2 1.8 1u 0"
 }
-C {lab_pin.sym} 520 -510 0 0 {name=p6 lab=0}
+C {lab_pin.sym} 520 -480 0 0 {name=p6 lab=0}
 C {lab_pin.sym} 520 -570 0 0 {name=p7 lab=CK}
-C {vsource.sym} 390 -640 0 0 {name=v5 value=VCC}
-C {lab_pin.sym} 390 -610 0 0 {name=p17 lab=0}
+C {vsource.sym} 390 -660 0 0 {name=v5 value=VCC}
+C {lab_pin.sym} 390 -630 0 0 {name=p17 lab=0}
 C {lab_pin.sym} 390 -570 0 0 {name=p18 lab=VSS}
-C {vsource.sym} 390 -540 0 0 {name=v6 value=0}
-C {lab_pin.sym} 390 -510 0 0 {name=p19 lab=0}
-C {lab_pin.sym} 520 -670 0 0 {name=p55 lab=RST}
-C {vsource.sym} 520 -640 0 0 {name=v7 value="pwl 0 VCC 
+C {vsource.sym} 390 -510 0 0 {name=v6 value=0}
+C {lab_pin.sym} 390 -480 0 0 {name=p19 lab=0}
+C {lab_pin.sym} 520 -720 0 0 {name=p55 lab=RST}
+C {vsource.sym} 520 -660 0 0 {name=v7 value="pwl 0 VCC 
 + 1u VCC 1.001u 0 3u 0 3.001u VCC
 + 4u VCC 4.001u 0 6u 0 6.001u VCC
 + 7u VCC 7.001u 0 9u 0 9.001u VCC"
 
 }
-C {lab_pin.sym} 520 -610 0 0 {name=p56 lab=0}
-C {vdd.sym} 390 -670 0 0 {name=l2 lab=VCC}
+C {lab_pin.sym} 520 -630 0 0 {name=p56 lab=0}
+C {vdd.sym} 390 -720 0 0 {name=l2 lab=VCC}
 C {adc.sym} 620 -190 0 0 {name=x1}
 C {lab_pin.sym} 700 -220 0 1 {name=p38 lab=CODE[5:0]}
-C {lab_pin.sym} 540 -220 0 0 {name=p39 lab=SIG_IN}
-C {lab_pin.sym} 540 -200 0 0 {name=p40 lab=VREF}
-C {lab_pin.sym} 540 -180 0 0 {name=p41 lab=CK}
-C {lab_pin.sym} 540 -160 0 0 {name=p42 lab=RST}
-C {spice_probe.sym} 270 -670 0 0 {name=p3 attrs=""}
-C {spice_probe.sym} 390 -670 0 0 {name=p4 attrs=""}
+C {lab_pin.sym} 510 -220 0 0 {name=p39 lab=SIG_IN}
+C {lab_pin.sym} 510 -200 0 0 {name=p40 lab=VREF}
+C {lab_pin.sym} 510 -180 0 0 {name=p41 lab=CK}
+C {lab_pin.sym} 510 -160 0 0 {name=p42 lab=RST}
+C {spice_probe.sym} 270 -720 0 0 {name=p3 attrs=""}
+C {spice_probe.sym} 390 -720 0 0 {name=p4 attrs=""}
 C {spice_probe.sym} 270 -570 0 0 {name=p5 attrs=""}
 C {spice_probe.sym} 520 -570 0 0 {name=p8 attrs=""}
-C {spice_probe.sym} 520 -670 0 0 {name=p9 attrs=""}
+C {spice_probe.sym} 520 -720 0 0 {name=p9 attrs=""}
 C {spice_probe.sym} 700 -220 0 0 {name=p10 attrs=""}
 C {launcher.sym} 1270 -90 0 0 {name=h5 
 descr="Select arrow and 
@@ -171,7 +191,7 @@ descr="Netlist + Simulate
 Ctrl-Left-Click" 
 tclcommand="xschem netlist; xschem simulate"
 }
-C {simulator_commands.sym} 150 -390 0 0 {name=BATCH_MODE
+C {simulator_commands.sym} 150 -380 0 0 {name=BATCH_MODE
 simulator=ngspice
 spice_ignore=1
 tclcommand="xschem edit_vi_prop"