diff --git a/doc/xschem_man/developer_info.html b/doc/xschem_man/developer_info.html
index 3d64a8ee..54dfad7f 100644
--- a/doc/xschem_man/developer_info.html
+++ b/doc/xschem_man/developer_info.html
@@ -903,8 +903,9 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
Highlight instance 'inst'
if 'fast' is specified do not redraw
'inst' can be an instance name or number
- hilight_netname net
- Highlight net name 'net'
+ hilight_netname [-fast] net
+ Highlight net name 'net'
+ if '-fast' is given do not redraw hilights after operation
image [invert|white_transp|black_transp|transp_white|transp_black|write_back|
blend_white|blend_black]
Apply required changes to selected images
@@ -1596,7 +1597,9 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
translate n str
Translate string 'str' replacing @xxx tokens with values in instance 'n' attributes
Example: xschem translate vref {the voltage is @value}
- the voltage is 1.8
+ the voltage is 1.8
+ If -1 is given as the instance number try to translate the string without using any
+ instance specific data
translate3 str eat_escapes s1 [s2] [s3]
Translate string 'str' replacing @xxx tokens with values in string s1 or if
not found in string s2 or if not found in string s3
diff --git a/src/draw.c b/src/draw.c
index 9c5f9d6e..f2041244 100644
--- a/src/draw.c
+++ b/src/draw.c
@@ -2577,6 +2577,7 @@ int graph_fullyzoom(xRect *r, Graph_ctx *gr, int graph_dataset)
double xx, xx0 = 0.0; /* gcc gives false warnings if xx0 not initialized here */
int cnt=0, wrap;
register SPICE_DATA *gv = raw->values[sweep_idx];
+ register SPICE_DATA *gv0 = raw->values[0];
ofs_end = ofs + raw->npoints[dset];
/* optimization: skip unwanted datasets, if no dc no need to detect sweep variable wraps */
@@ -2584,8 +2585,8 @@ int graph_fullyzoom(xRect *r, Graph_ctx *gr, int graph_dataset)
for(p = ofs ; p < ofs_end; p++) {
if(gr->logx) xx = mylog10(gv[p]);
else xx = gv[p];
- if(p == ofs) xx0 = gv[p];
- wrap = (cnt > 1 && gv[p] == xx0);
+ if(p == ofs) xx0 = gv0[p];
+ wrap = (cnt > 1 && gv0[p] == xx0);
if(wrap) {
sweepvar_wrap++;
cnt = 0;
@@ -3596,6 +3597,7 @@ int calc_custom_data_yrange(int sweep_idx, const char *express, Graph_ctx *gr)
for(dset = 0 ; dset < raw->datasets; dset++) {
int cnt=0, wrap;
register SPICE_DATA *gv = raw->values[sweep_idx];
+ register SPICE_DATA *gv0 = raw->values[0];
ofs_end = ofs + raw->npoints[dset];
first = -1;
last = ofs;
@@ -3608,8 +3610,8 @@ int calc_custom_data_yrange(int sweep_idx, const char *express, Graph_ctx *gr)
else
xx = gv[p];
- if(p == ofs) xx0 = gv[p];
- wrap = ( cnt > 1 && gv[p] == xx0);
+ if(p == ofs) xx0 = gv0[p];
+ wrap = ( cnt > 1 && gv0[p] == xx0);
if(first != -1) { /* there is something to plot ... */
if(xx > end || xx < start || /* ... and we ran out of graph area ... */
wrap) { /* ... or sweep variable changed direction */
@@ -3737,6 +3739,7 @@ int find_closest_wave(int i, Graph_ctx *gr)
double prev_x = 0.0;
int cnt=0, wrap;
register SPICE_DATA *gvx = raw->values[sweep_idx];
+ register SPICE_DATA *gv0 = raw->values[0];
register SPICE_DATA *gvy;
ofs_end = ofs + raw->npoints[dset];
if(expression) plot_raw_custom_data(sweep_idx, ofs, ofs_end - 1, express, NULL);
@@ -3750,10 +3753,10 @@ int find_closest_wave(int i, Graph_ctx *gr)
for(p = ofs ; p < ofs_end; p++) {
if(gr->logx) xx = mylog10(gvx[p]);
else xx = gvx[p];
- if(p == ofs) xx0 = gvx[p];
if(gr->logy) yy = mylog10(gvy[p]);
else yy = gvy[p];
- wrap = (cnt > 1 && gvx[p] == xx0);
+ if(p == ofs) xx0 = gv0[p];
+ wrap = (cnt > 1 && gv0[p] == xx0);
if(first != -1) {
if(xx > end || xx < start || wrap) {
dbg(1, "find_closest_wave(): last=%d\n", last);
@@ -4053,6 +4056,7 @@ void draw_graph(int i, const int flags, Graph_ctx *gr, void *ct)
double prev_x;
int cnt=0, wrap;
register SPICE_DATA *gv = xctx->raw->values[sweep_idx];
+ register SPICE_DATA *gv0 = xctx->raw->values[0];
ofs_end = ofs + xctx->raw->npoints[dset];
first = -1;
@@ -4073,8 +4077,11 @@ void draw_graph(int i, const int flags, Graph_ctx *gr, void *ct)
else xx = gv[p];
xxprevious = xxfollowing = xx;
- if(p == ofs) xx0 = gv[p];
- wrap = cnt > 1 && gv[p] == xx0;
+ /* do not use sweep variable for wrap detection. sweep variables other that simulation sweep var
+ * are simulated and thos no equality test can be done, and any "approx equal" test si going
+ * to do unexpected things (liek in simulations with very dense steps) */
+ if(p == ofs) xx0 = gv0[p]; /* gv[p];*/
+ wrap = cnt > 1 && gv0[p] == xx0;
#if 1 /* plot one point before start and one point after end so
* waves will extend to whole graph area even if there are few points
* but NOT if we are about to wrap (missing 1st/last point in 2-var dc sweeps) */
diff --git a/src/hilight.c b/src/hilight.c
index 776526c3..8f2406fb 100644
--- a/src/hilight.c
+++ b/src/hilight.c
@@ -1104,7 +1104,7 @@ static void drill_hilight(int mode)
if(propagate_str) my_free(_ALLOC_ID_, &propagate_str);
}
-int hilight_netname(const char *name)
+int hilight_netname(const char *name, int fast)
{
Node_hashentry *node_entry;
prepare_netlist_structs(0);
@@ -1113,9 +1113,11 @@ int hilight_netname(const char *name)
node_entry = bus_node_hash_lookup(name, "", XLOOKUP, 0, "", "", "", "");
/* sets xctx->hilight_nets=1 */
if(node_entry && !bus_hilight_hash_lookup(name, xctx->hilight_color, XINSERT_NOREPLACE)) {
- if(tclgetboolvar("incr_hilight")) incr_hilight_color();
propagate_hilights(1, 0, XINSERT_NOREPLACE);
- redraw_hilights(0);
+ if(!fast) {
+ if(tclgetboolvar("incr_hilight")) incr_hilight_color();
+ redraw_hilights(0);
+ }
}
return node_entry ? 1 : 0;
}
diff --git a/src/scheduler.c b/src/scheduler.c
index ffb1ff47..2bba379e 100644
--- a/src/scheduler.c
+++ b/src/scheduler.c
@@ -2245,14 +2245,26 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
}
Tcl_ResetResult(interp);
}
- /* hilight_netname net
- * Highlight net name 'net' */
+ /* hilight_netname [-fast] net
+ * Highlight net name 'net'
+ * if '-fast' is given do not redraw hilights after operation */
else if(!strcmp(argv[1], "hilight_netname"))
{
- int ret = 0;
+ int ret = 0, fast = 0, i;
+ const char *net = NULL;
if(!xctx) {Tcl_SetResult(interp, not_avail, TCL_STATIC); return TCL_ERROR;}
- if(argc > 2) {
- ret = hilight_netname(argv[2]);
+ for(i = 2; i < argc; i++) {
+ if(argv[i][0] == '-') {
+ if(!strcmp(argv[i], "-fast")) {
+ fast = 1;
+ }
+ } else {
+ net = argv[i];
+ break;
+ }
+ }
+ if(net) {
+ ret = hilight_netname(net, fast);
}
Tcl_SetResult(interp, ret ? "1" : "0" , TCL_STATIC);
}
@@ -5972,14 +5984,17 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
/* translate n str
* Translate string 'str' replacing @xxx tokens with values in instance 'n' attributes
* Example: xschem translate vref {the voltage is @value}
- * the voltage is 1.8 */
+ * the voltage is 1.8
+ * If -1 is given as the instance number try to translate the string without using any
+ * instance specific data */
else if(!strcmp(argv[1], "translate") )
{
if(!xctx) {Tcl_SetResult(interp, not_avail, TCL_STATIC); return TCL_ERROR;}
if(argc>3) {
int i;
char *s = NULL;
- if((i = get_instance(argv[2])) < 0 ) {
+ if(!strcmp(argv[2], "-1")) i = -1;
+ else if((i = get_instance(argv[2])) < 0 ) {
Tcl_SetResult(interp, "xschem translate: instance not found", TCL_STATIC);
return TCL_ERROR;
}
diff --git a/src/xschem.h b/src/xschem.h
index de5b5f2a..7d79d48b 100644
--- a/src/xschem.h
+++ b/src/xschem.h
@@ -1700,7 +1700,7 @@ extern void print_generic(FILE *fd, char *ent_or_comp, int symbol);
extern void print_verilog_param(FILE *fd, int symbol);
extern void hilight_net(int to_waveform);
extern void logic_set(int v, int num, const char *net_name);
-extern int hilight_netname(const char *name);
+extern int hilight_netname(const char *name, int fast);
extern void unhilight_net();
extern void propagate_hilights(int set, int clear, int mode);
extern void select_connected_nets(int stop_at_junction);
diff --git a/tests/xschemtest.tcl b/tests/xschemtest.tcl
index 6e6690b5..df115782 100644
--- a/tests/xschemtest.tcl
+++ b/tests/xschemtest.tcl
@@ -190,7 +190,7 @@ proc test_xschem_simulation {{f simulate_ff.sch}} {
proc netlist_test {} {
global netlist_dir
foreach {f t h} {
- rom8k.sch spice 186669317
+ rom8k.sch spice 4198475513
greycnt.sch verilog 1945914565
autozero_comp.sch spice 1472671699
test_generators.sch spice 49312823
diff --git a/xschem_library/ngspice/solar_panel.sch b/xschem_library/ngspice/solar_panel.sch
index 046ef49c..8addbfa0 100644
--- a/xschem_library/ngspice/solar_panel.sch
+++ b/xschem_library/ngspice/solar_panel.sch
@@ -100,9 +100,10 @@ hilight_wave=-1
-autoload=1
-rawfile=$netlist_dir/solar_panel.raw
-sim_type=tran}
+autoload=0
+
+sim_type=tran
+xrawfile=$netlist_dir/solar_panel.raw}
B 2 1260 -390 1680 -220 {flags=graph
y1 = -0.0012
y2 = 6.8
@@ -118,9 +119,10 @@ i(Vled)
\\"R.Avg. I(VPANEL); i(VPANEL) 20u ravg()\\""
jpeg_quality=30
linewidth_mult=2.0
-autoload=1
-rawfile=$netlist_dir/solar_panel.raw
-sim_type=tran}
+autoload=0
+
+sim_type=tran
+xrawfile=$netlist_dir/solar_panel.raw}
B 2 1260 -750 1680 -560 {flags=graph
y1 = -2.7e-05
y2 = 100
@@ -140,9 +142,10 @@ SUN \\\\%; SUN 100 *"
hilight_wave=-1
jpeg_quality=30
linewidth_mult=2.0
-autoload=1
-rawfile=$netlist_dir/solar_panel.raw
-sim_type=tran}
+autoload=0
+
+sim_type=tran
+xrawfile=$netlist_dir/solar_panel.raw}
B 2 1260 -940 1680 -750 {flags=graph
y1 = 0
y2 = 1
@@ -162,9 +165,10 @@ ypos1=0.00261891
ypos2=0.51596
jpeg_quality=30
linewidth_mult=2.0
-autoload=1
-rawfile=$netlist_dir/solar_panel.raw
-sim_type=tran}
+autoload=0
+
+sim_type=tran
+xrawfile=$netlist_dir/solar_panel.raw}
B 2 1260 -1140 1680 -950 {flags=graph
y1 = 0
y2 = 1
@@ -185,9 +189,10 @@ color=8
node="\\"CTRL1 Duty cycle; CTRL1 20u ravg()\\""
jpeg_quality=30
linewidth_mult=2.0
-autoload=1
-rawfile=$netlist_dir/solar_panel.raw
-sim_type=tran}
+autoload=0
+
+sim_type=tran
+xrawfile=$netlist_dir/solar_panel.raw}
B 18 65 -960 320 -775 {}
A 5 320 -960 5.590169943749475 243.434948822922 360 {fill=true}
P 7 6 395 -775 340 -931.25 335 -945 322.5 -960 310 -965 65 -975 {}
diff --git a/xschem_library/rom8k/rom8k.sch b/xschem_library/rom8k/rom8k.sch
index ea849252..4c8d6082 100644
--- a/xschem_library/rom8k/rom8k.sch
+++ b/xschem_library/rom8k/rom8k.sch
@@ -1,4 +1,4 @@
-v {xschem version=3.4.5 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -524,3 +524,7 @@ simswap
"
}
+C {spice_probe.sym} 190 -790 2 0 {name=p92 analysis=tran}
+C {spice_probe.sym} 90 -790 2 0 {name=p102 analysis=tran}
+C {spice_probe.sym} 90 -890 2 0 {name=p103 analysis=tran}
+C {spice_probe.sym} 150 -400 2 0 {name=p104 analysis=tran}