diff --git a/src/netlist.c b/src/netlist.c
index 5f94ebeb..49cabdd1 100644
--- a/src/netlist.c
+++ b/src/netlist.c
@@ -594,7 +594,6 @@ static void name_generics()
   /* name generic pins from attached labels */
   dbg(2, "name_generics(): naming generics from attached labels\n");
   if(for_netlist) for (i=0;i<instances; ++i) { /* ... assign node fields on all (non label) instances */
-    if(inst[i].ptr<0) continue;
     if(skip_instance(i, 0, netlist_lvs_ignore)) continue;
     my_strdup(_ALLOC_ID_, &type,(inst[i].ptr+ xctx->sym)->type);
     if(type && !IS_LABEL_OR_PIN(type) ) {
@@ -845,8 +844,7 @@ int shorted_instance(int i, int lvs_ignore)
 static int skip_instance2(int i, int lvs_ignore, int mask)
 {
   int skip = 0;
-  if(xctx->inst[i].ptr < 0) skip = 1;
-  else if(xctx->inst[i].flags & mask) skip = 1;
+  if(xctx->inst[i].flags & mask) skip = 1;
   else if(xctx->sym[xctx->inst[i].ptr].flags & mask) skip = 1;
   else if(lvs_ignore && (xctx->inst[i].flags & LVS_IGNORE)) skip = 1;
   else if(lvs_ignore && (xctx->sym[xctx->inst[i].ptr].flags & LVS_IGNORE)) skip = 1;
@@ -856,7 +854,8 @@ static int skip_instance2(int i, int lvs_ignore, int mask)
 int skip_instance(int i, int skip_short, int lvs_ignore)
 {
   int skip = 0;
-  if(xctx->netlist_type == CAD_SPICE_NETLIST)
+  if(xctx->inst[i].ptr < 0) skip = 1;
+  else if(xctx->netlist_type == CAD_SPICE_NETLIST)
       skip =  skip_instance2(i, lvs_ignore, (skip_short ? SPICE_SHORT : 0) | SPICE_IGNORE);
   else if(xctx->netlist_type == CAD_VERILOG_NETLIST)
       skip =  skip_instance2(i, lvs_ignore, (skip_short ? VERILOG_SHORT : 0) | VERILOG_IGNORE);
@@ -1060,7 +1059,6 @@ static int name_nodes_of_pins_labels_and_propagate()
   print_erc =  (xctx->netlist_count == 0 || startlevel < xctx->currsch) && for_netlist;
   for (i=0;i<instances; ++i) {
     /* name ipin opin label node fields from prop_ptr attributes */
-    if(inst[i].ptr<0) continue;
     if(skip_instance(i, 0, netlist_lvs_ignore)) continue;
     my_strdup(_ALLOC_ID_, &type,(inst[i].ptr+ xctx->sym)->type);
     if(print_erc && (!inst[i].instname || !inst[i].instname[0]) &&
diff --git a/tests/xschemtest.tcl b/tests/xschemtest.tcl
index 5b5341c2..20a65b6e 100644
--- a/tests/xschemtest.tcl
+++ b/tests/xschemtest.tcl
@@ -190,17 +190,17 @@ proc test_xschem_simulation {{f simulate_ff.sch}} {
 proc netlist_test {} {
   global netlist_dir
   foreach {f t h} {
-    rom8k.sch               spice      2260553850
-    greycnt.sch             verilog    2772589036
+    rom8k.sch               spice      1998661799
+    greycnt.sch             verilog    2899796185
     autozero_comp.sch       spice      1181616733
-    loading.sch             vhdl       3300682141
+    loading.sch             vhdl       2975204502
     mos_power_ampli.sch     spice      1986885043
-    hierarchical_tedax.sch  tedax       998070173
+    hierarchical_tedax.sch  tedax       280590167
     LCC_instances.sch       spice       268038818
     pcb_test1.sch           tedax      1925087189
-    test_doublepin.sch      spice        64707104
-    simulate_ff.sch         spice      1321596936
-    test_symbolgen.sch      spice       486085716
+    test_doublepin.sch      spice       894741562
+    simulate_ff.sch         spice       574849766
+    test_symbolgen.sch      spice      2593807370
     inst_sch_select.sch     spice       801962545
     test_mosgen.sch         spice        21996225
   } {