From adf477fbcc1a7115b0eca23b03b7be50f93ddfcf Mon Sep 17 00:00:00 2001 From: Stefan Frederik Date: Sat, 15 Oct 2022 08:55:32 +0200 Subject: [PATCH] optimization in translate(): @spice_get_voltage will use the "lab" attribute (if existing) to build up the net name to look up in raw file, before reverting to a call to net_name() to get the net from the attached net --- src/save.c | 2 +- src/token.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/src/save.c b/src/save.c index 6604d490..c8266588 100644 --- a/src/save.c +++ b/src/save.c @@ -3278,7 +3278,7 @@ int load_sym_def(const char *name, FILE *embed_fd) read_line(lcc[level-1].fd, 0); /* discard any remaining characters till (but not including) newline */ else read_line(lcc[level].fd, 0); /* discard any remaining characters till (but not including) newline */ - } + } /* while(1) */ if(!embed_fd) { dbg(1, "l_s_d(): fclose2, level=%d, fd=%p\n", level, lcc[0].fd); fclose(lcc[0].fd); diff --git a/src/token.c b/src/token.c index 28b7181d..831650db 100644 --- a/src/token.c +++ b/src/token.c @@ -2997,10 +2997,11 @@ const char *translate(int inst, const char* s) if((start_level = sch_waves_loaded()) >= 0 && xctx->graph_annotate_p>=0) { int multip; int no_of_pins= (xctx->inst[inst].ptr + xctx->sym)->rects[PINLAYER]; + const char *pin_prop_ptr = (xctx->inst[inst].ptr + xctx->sym)->rect[PINLAYER][0].prop_ptr; if(no_of_pins == 1) { char *fqnet = NULL; const char *path = xctx->sch_path[xctx->currsch] + 1; - const char *net; + const char *net = NULL; size_t len; int idx; double val; @@ -3013,7 +3014,8 @@ const char *translate(int inst, const char* s) path++; } prepare_netlist_structs(0); - net = net_name(inst,0, &multip, 0, 0); + if(pin_prop_ptr) net = get_tok_value(pin_prop_ptr, "lab", 0); + if(net == 0 || net[0] == '\0') net = net_name(inst,0, &multip, 0, 0); len = strlen(path) + strlen(net) + 1; dbg(1, "net=%s\n", net); fqnet = my_malloc(1548, len);