From aa36cbb89792da9e9ed91460e01362a3e628ccdf Mon Sep 17 00:00:00 2001
From: stefan schippers <stefan.schippers@gmail.com>
Date: Thu, 9 Jan 2025 15:35:35 +0100
Subject: [PATCH] @path expansion in translate(): remove path components above
 the level where raw file (if any) was loaded; added @spice_get_current in
 bsource.sym

---
 src/token.c                        | 11 +++++++++++
 xschem_library/devices/bsource.sym |  3 ++-
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/src/token.c b/src/token.c
index f41c01e7..d66831dd 100644
--- a/src/token.c
+++ b/src/token.c
@@ -3739,6 +3739,15 @@ const char *translate(int inst, const char* s)
     result_pos+=tmp;
    } else if(strcmp(token,"@path")==0) {
     const char *path = xctx->sch_path[xctx->currsch] + 1;
+    int start_level = sch_waves_loaded(), skip = 0;
+    if(start_level == -1) start_level = 0;
+
+    /* skip path components that are above the level where raw file was loaded */
+    while(*path && skip < start_level) {
+      if(*path == '.') skip++;
+      ++path;
+    }
+
     tmp=strlen(path);
     STR_ALLOC(&result, tmp + result_pos, &size);
     memcpy(result+result_pos, path, tmp+1);
@@ -4367,11 +4376,13 @@ const char *translate2(Lcc *lcc, int level, char* s)
       }
       else if(strcmp(token,"@path")==0) {
         char *path = NULL;
+        here(level);
         my_strdup2(_ALLOC_ID_, &path, "@path@name\\.");
         if(level > 1) { /* add parent LCC instance names (X1, Xinv etc) */
           int i;
           for(i = 1; i <level; ++i) {
             const char *instname = get_tok_value(lcc[i].prop_ptr, "name", 0);
+            dbg(0, "adding %s to %s\n", instname, path);
             my_strcat(_ALLOC_ID_, &path, instname);
             my_strcat(_ALLOC_ID_, &path, ".");
           }
diff --git a/xschem_library/devices/bsource.sym b/xschem_library/devices/bsource.sym
index 0ac4668a..ac6885f3 100644
--- a/xschem_library/devices/bsource.sym
+++ b/xschem_library/devices/bsource.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
 *
 * This file is part of XSCHEM,
 * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -39,3 +39,4 @@ T {@VAR
 @FUNC} 20 0 0 0 0.2 0.2 {}
 T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
 T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@spice_get_current} -12.5 7.5 0 1 0.2 0.2 {layer=17}