From a8ba903aaaf7e87f71430fc09ca68faa34219409 Mon Sep 17 00:00:00 2001
From: stefan schippers <stefan.schippers@gmail.com>
Date: Thu, 13 Apr 2023 22:33:56 +0200
Subject: [PATCH] doc updates

---
 doc/xschem_man/tutorial_instance_based_implementation.html | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/doc/xschem_man/tutorial_instance_based_implementation.html b/doc/xschem_man/tutorial_instance_based_implementation.html
index e95a7a76..7c37523d 100644
--- a/doc/xschem_man/tutorial_instance_based_implementation.html
+++ b/doc/xschem_man/tutorial_instance_based_implementation.html
@@ -88,6 +88,12 @@ p{padding: 15px  30px 10px;}
   circuit. The assumption for all alternate circuits created using the methods explained above is that the
   alternate circuits have all the same interface as the base circuit (same input, output, inout pins, in the same order).
  </p><br><br>
+
+ <p class="important">
+  Note: all the above concepts are valid for VHDL, Verilog and tEDAx netlists by replacing the 
+  <kbd>spice_sym_def</kbd> attribute with <kbd>vhdl_sym_def</kbd>, <kbd>verilog_sym_def</kbd> and <kbd>tedax_sym_def</kbd>
+  respectively.
+ </p><br><br>
  <!-- end of slide -->
  <div class="filler"></div>
 </div>