diff --git a/doc/xschem_man/tutorial_instance_based_implementation.html b/doc/xschem_man/tutorial_instance_based_implementation.html
index e95a7a76..7c37523d 100644
--- a/doc/xschem_man/tutorial_instance_based_implementation.html
+++ b/doc/xschem_man/tutorial_instance_based_implementation.html
@@ -88,6 +88,12 @@ p{padding: 15px 30px 10px;}
circuit. The assumption for all alternate circuits created using the methods explained above is that the
alternate circuits have all the same interface as the base circuit (same input, output, inout pins, in the same order).
+
+
+ Note: all the above concepts are valid for VHDL, Verilog and tEDAx netlists by replacing the
+ spice_sym_def attribute with vhdl_sym_def, verilog_sym_def and tedax_sym_def
+ respectively.
+