diff --git a/doc/xschem_man/developer_info.html b/doc/xschem_man/developer_info.html
index d7287a29..cf43eea3 100644
--- a/doc/xschem_man/developer_info.html
+++ b/doc/xschem_man/developer_info.html
@@ -1003,14 +1003,16 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
0: eat non escaped quotes (")
1: return unescaped quotes as part of the token value if they are present
2: eat backslashes
- load f [symbol|gui|noundoreset|nofullzoom]
+
load [-nosymbols|-gui|-noundoreset|-nofullzoom|-keep_symbols] f
Load a new file 'f'.
- 'gui': ask to save modified file or warn if opening an already
- open file or opening a new(not existing) file.
- 'noundoreset': do not reset the undo history
- 'symbol': do not load symbols (used if loading a symbol instead of a schematic)
- 'nofullzoom': do not do a full zoom on new schematic.
- 'nodraw': do not draw.
+ '-gui': ask to save modified file or warn if opening an already
+ open file or opening a new(not existing) file.
+ '-noundoreset': do not reset the undo history
+ '-nosymbols': do not load symbols (used if loading a symbol instead of
+ a schematic)
+ '-nofullzoom': do not do a full zoom on new schematic.
+ '-nodraw': do not draw.
+ '-keep_symbols': retain symbols that are already loaded.
load_new_window [f]
Load schematic in a new tab/window. If 'f' not given prompt user
if 'f' is given as empty '{}' then open untitled.sch
@@ -1071,7 +1073,7 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
net_pin_mismatch
Highlight nets attached to selected symbols with
a different name than symbol pin
- netlist [-messages | -erc | -nohier] [filename]
+
netlist [-keep_symbols|-noalert|-messages|-erc | -nohier] [filename]
do a netlist of current schematic in currently defined netlist format
if 'filename'is given use specified name for the netlist
if 'filename' contains path components place the file in specified path location.
@@ -1081,9 +1083,11 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
will create the netlist in different places.
netlisting directory is reset to previous setting after completing this command
If -messages is given return the ERC messages instead of just a fail (1)
+ or no fail (0) code.
If -erc is given it means netlister is called from gui, enable show infowindow
If -nohier is given netlist only current level
- or no fail (0) code.
+ If -keep_symbols is given no not purge symbols encountered traversing the
+ design hierarchy
new_process [f]
Start a new xschem process for a schematic.
If 'f' is given load specified schematic.
@@ -1475,14 +1479,14 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
3 : set modified flag, do nothing else.
-1 : set title, rst floater caches.
-2 : rst floater caches, update simulation button colors (Simulate, Waves, Netlist).
- setprop instance|symbol|text|rect ref tok [val] [fast]
+
setprop [-fast|-fastundo] instance|symbol|text|rect ref tok [val]
- setprop instance inst [tok] [val] [fast]
+ setprop [-fast] instance inst [tok] [val]
set attribute 'tok' of instance (name or number) 'inst' to value 'val'
If 'tok' set to 'allprops' replace whole instance prop_str with 'val'
If 'val' not given (no attribute value) delete attribute from instance
If 'tok' not given clear completely instance attribute string
- If 'fast' argument if given does not redraw and is not undoable
+ If '-fast' argument if given does not redraw and is not undoable
setprop symbol name tok [val]
Set attribute 'tok' of symbol name 'name' to 'val'
@@ -1490,23 +1494,23 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
This command is not very useful since changes are not saved into symbol
and netlisters reload symbols, so changes are lost anyway.
- setprop rect lay n tok [val] [fast|fastundo]
+ setprop rect [-fast|-fastundo] lay n tok [val]
Set attribute 'tok' of rectangle number'n' on layer 'lay'
If 'val' not given (no attribute value) delete attribute from rect
- If 'fast' argument is given does not redraw and is not undoable
- If 'fastundo' s given same as above but action is undoable.
+ If '-fast' argument is given does not redraw and is not undoable
+ If '-fastundo' s given same as above but action is undoable.
setprop rect 2 n fullxzoom
setprop rect 2 n fullyzoom
These commands do full x/y zoom of graph 'n' (on layer 2, this is hardcoded).
- setprop text n [tok] [val] [fast|fastundo]
+ setprop [-fast|-fastundo] text n [tok] [val]
Set attribute 'tok' of text number 'n'
If 'tok' not specified set text string (txt_ptr) to value
If "txt_ptr" is given as token replace the text txt_ptr ("the text")
If 'val' not given (no attribute value) delete attribute from text
- If 'fast' argument is given does not redraw and is not undoable
- If 'fastundo' s given same as above but action is undoable.
+ If '-fast' argument is given does not redraw and is not undoable
+ If '-fastundo' is given same as above but action is undoable.
simulate [callback]
Run a simulation (start simulator configured as default in
Tools -> Configure simulators and tools)
diff --git a/src/actions.c b/src/actions.c
index f2d35bd3..987aa3b8 100644
--- a/src/actions.c
+++ b/src/actions.c
@@ -537,6 +537,10 @@ const char *get_file_path(char *f)
* -1 : user cancel
* 0 : file not saved due to errors or per user request
* confirm:
+ * 0 : do not ask user to save
+ * 1 : ask user to save
+ * fast:
+ * passed to save_schematic
*/
int save(int confirm, int fast)
{
@@ -544,8 +548,11 @@ int save(int confirm, int fast)
char *name = xctx->sch[xctx->currsch];
int force = 0;
+ /* current schematic exists on disk ... */
if(!stat(name, &buf)) {
+ /* ... and modification time on disk has changed since file loaded ... */
if(xctx->time_last_modify && xctx->time_last_modify != buf.st_mtime) {
+ /* ... so force a save */
force = 1;
confirm = 0;
}
@@ -2073,8 +2080,8 @@ void get_additional_symbols(int what)
}
}
/* fallback = 1: if schematic attribute is set but file not existing fallback
- * if inst == -1 use only symbol reference
- * to defaut symbol schematic (symname.sym -> symname.sch) */
+ * to defaut symbol schematic (symname.sym -> symname.sch)
+ * if inst == -1 use only symbol reference */
void get_sch_from_sym(char *filename, xSymbol *sym, int inst, int fallback)
{
char *sch = NULL;
diff --git a/src/callback.c b/src/callback.c
index 218f93c0..d52d6727 100644
--- a/src/callback.c
+++ b/src/callback.c
@@ -155,6 +155,7 @@ void abort_operation(void)
xctx->ui_state &= ~PLACE_SYMBOL;
xctx->ui_state &= ~PLACE_TEXT;
}
+ return;
}
if(xctx->ui_state & STARTCOPY)
{
@@ -1592,6 +1593,7 @@ static int check_menu_start_commands(double c_snap)
static int add_wire_from_inst_pin(Selected *sel, double mx, double my)
{
int res = 0;
+ int prev_state = xctx->ui_state;
int i, type = sel->type;
double pinx0, piny0;
if(type == ELEMENT) {
@@ -1605,19 +1607,13 @@ static int add_wire_from_inst_pin(Selected *sel, double mx, double my)
}
}
if(i < npin) {
- int save = xctx->modified;
dbg(1, "pin: %g %g\n", pinx0, piny0);
unselect_all(1);
- xctx->push_undo();
- storeobject(-1, pinx0, piny0, pinx0, piny0, WIRE, 0, SELECTED1, NULL);
- set_modify(save);
- xctx->shape_point_selected = 1;
- xctx->prep_hash_wires=0;
- xctx->need_reb_sel_arr = 1;
- xctx->kissing = 1;
- rebuild_selected_array();
- move_objects(START,0,0,0);
- xctx->ui_state |= START_SYMPIN; /* avoid double push_undo() in move_objects() */
+ start_wire(xctx->mousex_snap, xctx->mousey_snap);
+ if(prev_state == STARTWIRE) {
+ tcleval("set constr_mv 0" );
+ xctx->constr_mv=0;
+ }
res = 1;
}
} else if(type == WIRE) {
@@ -1627,18 +1623,12 @@ static int add_wire_from_inst_pin(Selected *sel, double mx, double my)
double x2 = xctx->wire[n].x2;
double y2 = xctx->wire[n].y2;
if( (mx == x1 && my == y1) || (mx == x2 && my == y2) ) {
- int save = xctx->modified;
unselect_all(1);
- xctx->push_undo();
- storeobject(-1, mx, my, mx, my, WIRE, 0, SELECTED1, NULL);
- set_modify(save);
- xctx->shape_point_selected = 1;
- xctx->prep_hash_wires=0;
- xctx->need_reb_sel_arr = 1;
- xctx->kissing = 1;
- rebuild_selected_array();
- move_objects(START,0,0,0);
- xctx->ui_state |= START_SYMPIN; /* avoid double push_undo() in move_objects() */
+ start_wire(xctx->mousex_snap, xctx->mousey_snap);
+ if(prev_state == STARTWIRE) {
+ tcleval("set constr_mv 0" );
+ xctx->constr_mv=0;
+ }
res = 1;
}
}
@@ -1895,7 +1885,7 @@ static void context_menu_action(double mx, double my)
merge_file(2,".sch");
break;
case 9: /* load most recent file */
- tclvareval("xschem load [lindex $recentfile 0] gui", NULL);
+ tclvareval("xschem load -gui [lindex $recentfile 0]", NULL);
break;
case 10: /* edit attributes */
edit_property(0);
@@ -3181,7 +3171,7 @@ int rstate; /* (reduced state, without ShiftMask) */
}
if(key=='O' && rstate == ControlMask ) /* load most recent tile */
{
- tclvareval("xschem load [lindex $recentfile 0] gui", NULL);
+ tclvareval("xschem load -gui [lindex $recentfile 0]", NULL);
break;
}
if(key=='O' && rstate == 0) /* toggle light/dark colorscheme 20171113 */
@@ -3762,13 +3752,13 @@ int rstate; /* (reduced state, without ShiftMask) */
if(set_netlist_dir(0, NULL)) {
dbg(1, "callback(): -------------\n");
if(xctx->netlist_type == CAD_SPICE_NETLIST)
- err = global_spice_netlist(1);
+ err = global_spice_netlist(1, 1);
else if(xctx->netlist_type == CAD_VHDL_NETLIST)
- err = global_vhdl_netlist(1);
+ err = global_vhdl_netlist(1, 1);
else if(xctx->netlist_type == CAD_VERILOG_NETLIST)
- err = global_verilog_netlist(1);
+ err = global_verilog_netlist(1, 1);
else if(xctx->netlist_type == CAD_TEDAX_NETLIST)
- err = global_tedax_netlist(1);
+ err = global_tedax_netlist(1, 1);
else
tcleval("tk_messageBox -type ok -parent [xschem get topwindow] "
"-message {Please Set netlisting mode (Options menu)}");
@@ -3803,13 +3793,13 @@ int rstate; /* (reduced state, without ShiftMask) */
if( set_netlist_dir(0, NULL) ) {
dbg(1, "callback(): -------------\n");
if(xctx->netlist_type == CAD_SPICE_NETLIST)
- err = global_spice_netlist(0);
+ err = global_spice_netlist(0, 1);
else if(xctx->netlist_type == CAD_VHDL_NETLIST)
- err = global_vhdl_netlist(0);
+ err = global_vhdl_netlist(0, 1);
else if(xctx->netlist_type == CAD_VERILOG_NETLIST)
- err = global_verilog_netlist(0);
+ err = global_verilog_netlist(0, 1);
else if(xctx->netlist_type == CAD_TEDAX_NETLIST)
- err = global_tedax_netlist(0);
+ err = global_tedax_netlist(0, 1);
else
tcleval("tk_messageBox -type ok -parent [xschem get topwindow] "
"-message {Please Set netlisting mode (Options menu)}");
@@ -4216,6 +4206,11 @@ int rstate; /* (reduced state, without ShiftMask) */
xctx->semaphore = savesem;
}
+ /* end wire creation when dragging in intuitive interface from an inst pin ow wire endpoint */
+ else if(xctx->intuitive_interface && (xctx->ui_state & STARTWIRE)) {
+ if(end_place_move_copy_zoom()) break;
+ }
+
/* end intuitive_interface copy or move */
if(xctx->ui_state & STARTCOPY && xctx->drag_elements) {
copy_objects(END);
diff --git a/src/hspice_backannotate.tcl b/src/hspice_backannotate.tcl
index 5f29b7f6..429e682c 100644
--- a/src/hspice_backannotate.tcl
+++ b/src/hspice_backannotate.tcl
@@ -108,19 +108,19 @@ proc annotate {} {
set type [xschem getprop instance $i cell::type]
if { $type == "probe"} {
set net [xschem instance_net $i p]
- if {[catch {xschem setprop instance $i voltage [get_voltage $net] fast} err]} {
+ if {[catch {xschem setprop -fast instance $i voltage [get_voltage $net]} err]} {
puts "1 error : $err net: $net"
}
}
if { $type == "current_probe"} {
- if {[catch {xschem setprop instance $i current [get_current $name] fast} err]} {
+ if {[catch {xschem setprop -fast instance $i current [get_current $name]} err]} {
puts "2 error : $err"
}
}
if { $type == "differential_probe"} {
set netp [xschem instance_net $i p]
set netm [xschem instance_net $i m]
- if {[catch {xschem setprop instance $i voltage [get_diff_voltage $netp $netm] fast} err]} {
+ if {[catch {xschem setprop -fast instance $i voltage [get_diff_voltage $netp $netm]} err]} {
puts "3 error : $err"
}
}
diff --git a/src/scheduler.c b/src/scheduler.c
index c00f0c47..691ca26a 100644
--- a/src/scheduler.c
+++ b/src/scheduler.c
@@ -2808,38 +2808,54 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
}
}
- /* load f [symbol|gui|noundoreset|nofullzoom]
+ /* load [-nosymbols|-gui|-noundoreset|-nofullzoom|-keep_symbols] f
* Load a new file 'f'.
- * 'gui': ask to save modified file or warn if opening an already
- * open file or opening a new(not existing) file.
- * 'noundoreset': do not reset the undo history
- * 'symbol': do not load symbols (used if loading a symbol instead of a schematic)
- * 'nofullzoom': do not do a full zoom on new schematic.
- * 'nodraw': do not draw.
+ * '-gui': ask to save modified file or warn if opening an already
+ * open file or opening a new(not existing) file.
+ * '-noundoreset': do not reset the undo history
+ * '-nosymbols': do not load symbols (used if loading a symbol instead of
+ * a schematic)
+ * '-nofullzoom': do not do a full zoom on new schematic.
+ * '-nodraw': do not draw.
+ * '-keep_symbols': retain symbols that are already loaded.
*/
else if(!strcmp(argv[1], "load") )
{
int load_symbols = 1, force = 1, undo_reset = 1, nofullzoom = 0, nodraw = 0;
+ int keep_symbols = 0;
size_t i;
if(!xctx) {Tcl_SetResult(interp, not_avail, TCL_STATIC); return TCL_ERROR;}
- if(argc > 3) {
- for(i = 3; i < argc; ++i) {
- if(!strcmp(argv[i], "symbol")) load_symbols = 0;
- if(!strcmp(argv[i], "gui")) force = 0;
- if(!strcmp(argv[i], "noundoreset")) undo_reset = 0;
- if(!strcmp(argv[i], "nofullzoom")) nofullzoom = 1;
- if(!strcmp(argv[i], "nodraw")) {nofullzoom = 1; nodraw = 1;}
+
+
+ for(i = 2; i < argc; i++) {
+ if(argv[i][0] == '-') {
+ if(!strcmp(argv[i], "-nosymbols")) {
+ load_symbols = 0 ;
+ } else if(!strcmp(argv[i], "-gui")) {
+ force = 0;
+ } else if(!strcmp(argv[i], "-noundoreset")) {
+ undo_reset = 0;
+ } else if(!strcmp(argv[i], "-nofullzoom")) {
+ nofullzoom = 1;
+ } else if(!strcmp(argv[i], "-nodraw")) {
+ nofullzoom = 1; nodraw = 1;
+ } else if(!strcmp(argv[i], "-keep_symbols")) {
+ keep_symbols = 1;
+ }
+ } else {
+ break;
}
}
- if(argc>2) {
+
+ if(argc>i) {
char f[PATH_MAX + 100];
- my_snprintf(f, S(f),"regsub {^~/} {%s} {%s/}", argv[2], home_dir);
+ my_snprintf(f, S(f),"regsub {^~/} {%s} {%s/}", argv[i], home_dir);
tcleval(f);
my_strncpy(f, tclresult(), S(f));
if(force || !has_x || !xctx->modified || save(1, 0) != -1 ) { /* save(1)==-1 --> user cancel */
char win_path[WINDOW_PATH_SIZE];
int skip = 0;
- dbg(1, "scheduler(): load: filename=%s\n", argv[2]);
+ dbg(1, "scheduler(): load: filename=%s\n", argv[i]);
my_strncpy(f, abs_sym_path(f, ""), S(f));
if(!force && f[0] && check_loaded(f, win_path) ) {
char msg[PATH_MAX + 100];
@@ -2859,7 +2875,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
/* no implicit undo: if needed do it before loading */
/* if(!undo_reset) xctx->push_undo(); */
if(undo_reset) xctx->currsch = 0;
- remove_symbols();
+ if(!keep_symbols) remove_symbols();
if(!nofullzoom) {
xctx->zoom=CADINITIALZOOM;
xctx->mooz=1/CADINITIALZOOM;
@@ -3200,7 +3216,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
hilight_net_pin_mismatches();
}
- /* netlist [-messages | -erc | -nohier] [filename]
+ /* netlist [-keep_symbols|-noalert|-messages|-erc | -nohier] [filename]
* do a netlist of current schematic in currently defined netlist format
* if 'filename'is given use specified name for the netlist
* if 'filename' contains path components place the file in specified path location.
@@ -3210,15 +3226,19 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
* will create the netlist in different places.
* netlisting directory is reset to previous setting after completing this command
* If -messages is given return the ERC messages instead of just a fail (1)
+ * or no fail (0) code.
* If -erc is given it means netlister is called from gui, enable show infowindow
* If -nohier is given netlist only current level
- * or no fail (0) code. */
+ * If -keep_symbols is given no not purge symbols encountered traversing the
+ * design hierarchy */
else if(!strcmp(argv[1], "netlist") )
{
char *saveshow = NULL;
int err = 0;
int hier_netlist = 1;
int i, messages = 0;
+ int alert = 1;
+ int keep_symbols=0, save_keep;
int erc = 0;
const char *fname = NULL;
const char *path;
@@ -3235,6 +3255,10 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
messages = 1;
} else if(!strcmp(argv[i], "-erc")) {
erc = 1;
+ } else if(!strcmp(argv[i], "-keep_symbols")) {
+ keep_symbols = 1;
+ } else if(!strcmp(argv[i], "-noalert")) {
+ alert = 0;
} else if(!strcmp(argv[i], "-nohier")) {
hier_netlist = 0;
}
@@ -3254,17 +3278,22 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
}
if(set_netlist_dir(0, NULL) ) {
done_netlist = 1;
+
+ save_keep = tclgetboolvar("keep_symbols");
+ tclsetboolvar("keep_symbols", keep_symbols);
if(xctx->netlist_type == CAD_SPICE_NETLIST)
- err = global_spice_netlist(hier_netlist); /* 1 means global netlist */
+ err = global_spice_netlist(hier_netlist, alert);
else if(xctx->netlist_type == CAD_VHDL_NETLIST)
- err = global_vhdl_netlist(hier_netlist);
+ err = global_vhdl_netlist(hier_netlist, alert);
else if(xctx->netlist_type == CAD_VERILOG_NETLIST)
- err = global_verilog_netlist(hier_netlist);
+ err = global_verilog_netlist(hier_netlist, alert);
else if(xctx->netlist_type == CAD_TEDAX_NETLIST)
- global_tedax_netlist(hier_netlist);
+ global_tedax_netlist(hier_netlist, alert);
else
if(has_x) tcleval("tk_messageBox -type ok -parent [xschem get topwindow] "
"-message {Please Set netlisting mode (Options menu)}");
+ tclsetboolvar("keep_symbols", save_keep);
+
if( (erc == 0) ) {
my_strncpy(xctx->netlist_name, "", S(xctx->netlist_name));
}
@@ -5258,14 +5287,14 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
}
Tcl_ResetResult(interp);
}
- /* setprop instance|symbol|text|rect ref tok [val] [fast]
+ /* setprop [-fast|-fastundo] instance|symbol|text|rect ref tok [val]
*
- * setprop instance inst [tok] [val] [fast]
+ * setprop [-fast] instance inst [tok] [val]
* set attribute 'tok' of instance (name or number) 'inst' to value 'val'
* If 'tok' set to 'allprops' replace whole instance prop_str with 'val'
* If 'val' not given (no attribute value) delete attribute from instance
* If 'tok' not given clear completely instance attribute string
- * If 'fast' argument if given does not redraw and is not undoable
+ * If '-fast' argument if given does not redraw and is not undoable
*
* setprop symbol name tok [val]
* Set attribute 'tok' of symbol name 'name' to 'val'
@@ -5273,43 +5302,52 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
* This command is not very useful since changes are not saved into symbol
* and netlisters reload symbols, so changes are lost anyway.
*
- * setprop rect lay n tok [val] [fast|fastundo]
+ * setprop rect [-fast|-fastundo] lay n tok [val]
* Set attribute 'tok' of rectangle number'n' on layer 'lay'
* If 'val' not given (no attribute value) delete attribute from rect
- * If 'fast' argument is given does not redraw and is not undoable
- * If 'fastundo' s given same as above but action is undoable.
+ * If '-fast' argument is given does not redraw and is not undoable
+ * If '-fastundo' s given same as above but action is undoable.
*
* setprop rect 2 n fullxzoom
* setprop rect 2 n fullyzoom
* These commands do full x/y zoom of graph 'n' (on layer 2, this is hardcoded).
*
- * setprop text n [tok] [val] [fast|fastundo]
+ * setprop [-fast|-fastundo] text n [tok] [val]
* Set attribute 'tok' of text number 'n'
* If 'tok' not specified set text string (txt_ptr) to value
* If "txt_ptr" is given as token replace the text txt_ptr ("the text")
* If 'val' not given (no attribute value) delete attribute from text
- * If 'fast' argument is given does not redraw and is not undoable
- * If 'fastundo' s given same as above but action is undoable.
+ * If '-fast' argument is given does not redraw and is not undoable
+ * If '-fastundo' is given same as above but action is undoable.
*/
else if(!strcmp(argv[1], "setprop"))
{
+ int i, fast = 0, shift = 0;
if(!xctx) {Tcl_SetResult(interp, not_avail, TCL_STATIC); return TCL_ERROR;}
- /* 0 1 2 3 4 5 6
- * xschem setprop instance R4 value [30k] [fast] */
+
+ for(i = 2; i < argc; i++) {
+ if(argv[i][0] == '-') {
+ if(!strcmp(argv[i], "-fast")) {
+ fast = 1; shift++;
+ } else if(!strcmp(argv[i], "-fastundo")) {
+ fast = 3; shift++;
+ }
+ } else {
+ break;
+ }
+ }
+ /* remove option (-xxx) arguments and shift remaining */
+ if(shift) for(; i < argc; i++) {
+ argv[i - shift] = argv[i];
+ }
+ argc -= shift;
+
+
+ /* 0 1 2 3 4 5
+ * xschem setprop instance R4 value [30k] */
if(argc > 2 && !strcmp(argv[2], "instance")) {
- int inst, fast=0;
- if(argc > 6) {
- if(!strcmp(argv[6], "fast")) {
- fast = 1;
- argc = 6;
- }
- }
- else if(argc > 5) {
- if(!strcmp(argv[5], "fast")) {
- fast = 1;
- argc = 5;
- }
- }
+ int inst;
+
if(argc < 4) {
Tcl_SetResult(interp, "xschem setprop instance needs 1 or more additional arguments", TCL_STATIC);
return TCL_ERROR;
@@ -5387,10 +5425,9 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
my_strdup2(_ALLOC_ID_, &sym->prop_ptr, subst_token(sym->prop_ptr, argv[4], NULL)); /* delete attr */
} else if(argc > 5 && !strcmp(argv[2], "rect")) {
- /* 0 1 2 3 4 5 6 7
- * xschem setprop rect c n token [value] [fast|fastundo] */
+ /* 0 1 2 3 4 5 6
+ * xschem setprop rect c n token [value] */
int change_done = 0;
- int fast = 0;
xRect *r;
int c = atoi(argv[3]);
int n = atoi(argv[4]);
@@ -5399,26 +5436,6 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
return TCL_ERROR;
}
r = &xctx->rect[c][n];
- if(argc > 7) {
- if(!strcmp(argv[7], "fast")) {
- fast = 1;
- argc = 7;
- }
- if(!strcmp(argv[7], "fastundo")) {
- fast = 3;
- argc = 7;
- }
- }
- else if(argc > 6) {
- if(!strcmp(argv[6], "fast")) {
- fast = 1;
- argc = 6;
- }
- if(!strcmp(argv[6], "fastundo")) {
- fast = 3;
- argc = 6;
- }
- }
if(!fast) {
bbox(START,0.0,0.0,0.0,0.0);
}
@@ -5477,7 +5494,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
* xschem setprop text n [token] value [fast|fastundo]
* if "txt_ptr" is given as token replace the text txt_ptr ("the text") */
int change_done = 0;
- int argc_copy, i, tmp, fast = 0;
+ int tmp;
double xx1, xx2, yy1, yy2, dtmp;
xText *t;
int n = atoi(argv[3]);
@@ -5487,17 +5504,6 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
}
t = &xctx->text[n];
- argc_copy = argc;
- for(i = 5; i < argc_copy; i++) {
- if(!strcmp(argv[i], "fast")) {
- fast = 1;
- argc--;
- }
- if(!strcmp(argv[i], "fastundo")) {
- fast = 3;
- argc--;
- }
- }
if(!fast) {
bbox(START,0.0,0.0,0.0,0.0);
}
diff --git a/src/spice_netlist.c b/src/spice_netlist.c
index 8fb84523..b7f751e1 100644
--- a/src/spice_netlist.c
+++ b/src/spice_netlist.c
@@ -247,7 +247,8 @@ static int spice_netlist(FILE *fd, int spice_stop )
return err;
}
-int global_spice_netlist(int global) /* netlister driver */
+/* alert: if set show alert if file missing */
+int global_spice_netlist(int global, int alert) /* netlister driver */
{
int err = 0;
int first;
@@ -478,12 +479,12 @@ int global_spice_netlist(int global) /* netlister driver */
if(strcmp(get_tok_value(xctx->sym[i].prop_ptr, "default_schematic", 0), "ignore"))
str_hash_lookup(&subckt_table, subckt_name, "", XINSERT);
if( split_f && strboolcmp(get_tok_value(xctx->sym[i].prop_ptr,"vhdl_netlist",0),"true")==0 )
- err |= vhdl_block_netlist(fd, i);
+ err |= vhdl_block_netlist(fd, i, alert);
else if(split_f && strboolcmp(get_tok_value(xctx->sym[i].prop_ptr,"verilog_netlist",0),"true")==0 )
- err |= verilog_block_netlist(fd, i);
+ err |= verilog_block_netlist(fd, i, alert);
else
if( strboolcmp(get_tok_value(xctx->sym[i].prop_ptr,"spice_primitive",0),"true") )
- err |= spice_block_netlist(fd, i);
+ err |= spice_block_netlist(fd, i, alert);
}
}
}
@@ -593,7 +594,8 @@ int global_spice_netlist(int global) /* netlister driver */
return err;
}
-int spice_block_netlist(FILE *fd, int i)
+/* alert: if set show alert if file missing */
+int spice_block_netlist(FILE *fd, int i, int alert)
{
int err = 0;
int spice_stop=0;
@@ -667,7 +669,7 @@ int spice_block_netlist(FILE *fd, int i)
my_free(_ALLOC_ID_, &extra);
fprintf(fd, "\n");
- spice_stop ? load_schematic(0,filename, 0, 1) : load_schematic(1,filename, 0, 1);
+ spice_stop ? load_schematic(0,filename, 0, alert) : load_schematic(1,filename, 0, alert);
get_additional_symbols(1);
err |= spice_netlist(fd, spice_stop); /* 20111113 added spice_stop */
err |= warning_overlapped_symbols(0);
diff --git a/src/tedax_netlist.c b/src/tedax_netlist.c
index 961ea92e..090830b8 100644
--- a/src/tedax_netlist.c
+++ b/src/tedax_netlist.c
@@ -69,7 +69,7 @@ static int tedax_netlist(FILE *fd, int tedax_stop )
return err;
}
-static int tedax_block_netlist(FILE *fd, int i)
+static int tedax_block_netlist(FILE *fd, int i, int alert)
{
int err = 0;
int tedax_stop=0;
@@ -107,7 +107,7 @@ static int tedax_block_netlist(FILE *fd, int i)
fprintf(fd, "%s", get_sym_template(xctx->sym[i].templ, extra));
my_free(_ALLOC_ID_, &extra);
fprintf(fd, "\n");
- load_schematic(1,filename, 0, 1);
+ load_schematic(1,filename, 0, alert);
get_additional_symbols(1);
err |= tedax_netlist(fd, tedax_stop);
xctx->netlist_count++;
@@ -121,7 +121,7 @@ static int tedax_block_netlist(FILE *fd, int i)
return err;
}
-int global_tedax_netlist(int global) /* netlister driver */
+int global_tedax_netlist(int global, int alert) /* netlister driver */
{
int err = 0;
FILE *fd;
@@ -232,7 +232,7 @@ int global_tedax_netlist(int global) /* netlister driver */
* will not be processed by *_block_netlist() */
if(strcmp(get_tok_value(xctx->sym[i].prop_ptr, "default_schematic", 0), "ignore"))
str_hash_lookup(&subckt_table, subckt_name, "", XINSERT);
- err |= tedax_block_netlist(fd, i);
+ err |= tedax_block_netlist(fd, i, alert);
}
}
}
diff --git a/src/token.c b/src/token.c
index 19968d29..d326377e 100644
--- a/src/token.c
+++ b/src/token.c
@@ -1189,8 +1189,7 @@ const char *subst_token(const char *s, const char *tok, const char *new_val)
/* given a string with multiple "token=value ..." assignments */
/* substitute 's value with */
/* if tok not found in s and new_val!=NULL add tok=new_val at end.*/
-/* if new_val is empty ('\0') set token value to "" (token="") */
-/* if new_val is NULL *remove* 'token (and =val if any)' from s */
+/* if new_val is NULL *OR* empty *remove* 'token (and =val if any)' from s */
/* return the updated string */
{
static char *result=NULL;
@@ -1225,8 +1224,11 @@ const char *subst_token(const char *s, const char *tok, const char *new_val)
new_val_copy = my_malloc(_ALLOC_ID_, new_val_len+3);
my_snprintf(new_val_copy, new_val_len+3, "\"%s\"", new_val);
}
- else my_strdup(_ALLOC_ID_, &new_val_copy, new_val);
+ else my_strdup(_ALLOC_ID_, &new_val_copy, new_val); /* new_val_copy is NULL if new_val empty */
} else new_val_copy = NULL;
+
+ /* if new_val is NULL or empty new_val_copy will be NULL */
+
dbg(1, "subst_token(): %s, %s, %s\n", s ? s : "", tok ? tok : "", new_val ? new_val : "");
sizetok = size = CADCHUNKALLOC;
my_realloc(_ALLOC_ID_, &result, size);
diff --git a/src/verilog_netlist.c b/src/verilog_netlist.c
index 4911225f..bb675e55 100644
--- a/src/verilog_netlist.c
+++ b/src/verilog_netlist.c
@@ -75,7 +75,7 @@ static int verilog_netlist(FILE *fd , int verilog_stop)
return err;
}
-int global_verilog_netlist(int global) /* netlister driver */
+int global_verilog_netlist(int global, int alert) /* netlister driver */
{
int err = 0;
FILE *fd;
@@ -350,11 +350,11 @@ int global_verilog_netlist(int global) /* netlister driver */
if(strcmp(get_tok_value(xctx->sym[i].prop_ptr, "default_schematic", 0), "ignore"))
str_hash_lookup(&subckt_table, subckt_name, "", XINSERT);
if( split_f && strboolcmp(get_tok_value(xctx->sym[i].prop_ptr,"vhdl_netlist",0),"true")==0 )
- err |= vhdl_block_netlist(fd, i);
+ err |= vhdl_block_netlist(fd, i, alert);
else if(split_f && strboolcmp(get_tok_value(xctx->sym[i].prop_ptr,"spice_netlist",0),"true")==0 )
- err |= spice_block_netlist(fd, i);
+ err |= spice_block_netlist(fd, i, alert);
else if( strboolcmp(get_tok_value(xctx->sym[i].prop_ptr,"verilog_primitive",0), "true"))
- err |= verilog_block_netlist(fd, i);
+ err |= verilog_block_netlist(fd, i, alert);
}
}
}
@@ -413,7 +413,7 @@ int global_verilog_netlist(int global) /* netlister driver */
}
-int verilog_block_netlist(FILE *fd, int i)
+int verilog_block_netlist(FILE *fd, int i, int alert)
{
int err = 0;
int j, l, tmp;
@@ -469,7 +469,7 @@ int verilog_block_netlist(FILE *fd, int i)
my_strdup(_ALLOC_ID_, &extra, get_tok_value(xctx->sym[i].prop_ptr, "verilog_extra", 0));
my_strdup(_ALLOC_ID_, &extra2, get_tok_value(xctx->sym[i].prop_ptr, "verilog_extra", 0));
fprintf(fd, "// sch_path: %s\n", sanitized_abs_sym_path(filename, ""));
- verilog_stop? load_schematic(0,filename, 0, 1) : load_schematic(1,filename, 0, 1);
+ verilog_stop? load_schematic(0,filename, 0, alert) : load_schematic(1,filename, 0, alert);
get_additional_symbols(1);
/* print verilog timescale and preprocessor directives 10102004 */
fmt_attr = xctx->format ? xctx->format : "verilog_format";
diff --git a/src/vhdl_netlist.c b/src/vhdl_netlist.c
index 1287c8e0..45ea3989 100644
--- a/src/vhdl_netlist.c
+++ b/src/vhdl_netlist.c
@@ -101,7 +101,8 @@ static int vhdl_netlist(FILE *fd , int vhdl_stop)
return err;
}
-int global_vhdl_netlist(int global) /* netlister driver */
+/* alert: if set show alert if file missing */
+int global_vhdl_netlist(int global, int alert) /* netlister driver */
{
int err = 0;
FILE *fd;
@@ -439,11 +440,11 @@ int global_vhdl_netlist(int global) /* netlister driver */
if(strcmp(get_tok_value(xctx->sym[i].prop_ptr, "default_schematic", 0), "ignore"))
str_hash_lookup(&subckt_table, subckt_name, "", XINSERT);
if( split_f && strboolcmp(get_tok_value(xctx->sym[i].prop_ptr,"verilog_netlist",0),"true")==0 )
- err |= verilog_block_netlist(fd, i);
+ err |= verilog_block_netlist(fd, i, alert);
else if( split_f && strboolcmp(get_tok_value(xctx->sym[i].prop_ptr,"spice_netlist",0),"true")==0 )
- err |= spice_block_netlist(fd, i);
+ err |= spice_block_netlist(fd, i, alert);
else if( strboolcmp(get_tok_value(xctx->sym[i].prop_ptr,"vhdl_primitive",0),"true"))
- err |= vhdl_block_netlist(fd, i);
+ err |= vhdl_block_netlist(fd, i, alert);
}
}
}
@@ -499,7 +500,8 @@ int global_vhdl_netlist(int global) /* netlister driver */
return err;
}
-int vhdl_block_netlist(FILE *fd, int i)
+/* alert: if set show alert if file missing */
+int vhdl_block_netlist(FILE *fd, int i, int alert)
{
int err = 0;
int j,k,l, tmp, found;
@@ -550,7 +552,7 @@ int vhdl_block_netlist(FILE *fd, int i)
} else {
Int_hashtable table = {NULL, 0};
fprintf(fd, "-- sch_path: %s\n", sanitized_abs_sym_path(filename, ""));
- load_schematic(1,filename, 0, 1);
+ load_schematic(1,filename, 0, alert);
get_additional_symbols(1);
dbg(1, "vhdl_block_netlist(): packages\n");
for(l=0;linstances; ++l)
diff --git a/src/xinit.c b/src/xinit.c
index e3d48898..e65cbfea 100644
--- a/src/xinit.c
+++ b/src/xinit.c
@@ -2978,13 +2978,13 @@ int Tcl_AppInit(Tcl_Interp *inter)
fprintf(errfp, "xschem: flat netlist requested\n");
}
if(xctx->netlist_type == CAD_SPICE_NETLIST)
- global_spice_netlist(1); /* 1 means global netlist */
+ global_spice_netlist(1, 1); /* 1 means global netlist */
else if(xctx->netlist_type == CAD_VHDL_NETLIST)
- global_vhdl_netlist(1); /* 1 means global netlist */
+ global_vhdl_netlist(1, 1); /* 1 means global netlist */
else if(xctx->netlist_type == CAD_VERILOG_NETLIST)
- global_verilog_netlist(1); /* 1 means global netlist */
+ global_verilog_netlist(1, 1); /* 1 means global netlist */
else if(xctx->netlist_type == CAD_TEDAX_NETLIST)
- global_tedax_netlist(1); /* 1 means global netlist */
+ global_tedax_netlist(1, 1); /* 1 means global netlist */
} else {
fprintf(errfp, "xschem: please set netlist_dir in xschemrc\n");
}
diff --git a/src/xschem.h b/src/xschem.h
index 93082e58..3e6a91bc 100644
--- a/src/xschem.h
+++ b/src/xschem.h
@@ -1473,13 +1473,13 @@ extern void store_arc(int pos, double x, double y, double r, double a, double b,
unsigned int rectcolor, unsigned short sel, char *prop_ptr);
extern void hier_psprint(char **res, int what);
-extern int global_spice_netlist(int global);
-extern int global_tedax_netlist(int global);
-extern int global_vhdl_netlist(int global);
-extern int global_verilog_netlist(int global);
-extern int vhdl_block_netlist(FILE *fd, int i);
-extern int verilog_block_netlist(FILE *fd, int i);
-extern int spice_block_netlist(FILE *fd, int i);
+extern int global_spice_netlist(int global, int alert);
+extern int global_tedax_netlist(int global, int alert);
+extern int global_vhdl_netlist(int global, int alert);
+extern int global_verilog_netlist(int global, int alert);
+extern int vhdl_block_netlist(FILE *fd, int i, int alert);
+extern int verilog_block_netlist(FILE *fd, int i, int alert);
+extern int spice_block_netlist(FILE *fd, int i, int alert);
extern void remove_symbols(void);
extern void remove_symbol(int i);
extern void clear_drawing(void);
diff --git a/src/xschem.tcl b/src/xschem.tcl
index c350c7bd..99f2c4fc 100644
--- a/src/xschem.tcl
+++ b/src/xschem.tcl
@@ -1189,7 +1189,7 @@ proc setup_recent_menu { { topwin {} } } {
if { [info exists recentfile] } {
foreach i $recentfile {
$topwin.menubar.file.recent add command \
- -command "xschem load {$i} gui" \
+ -command "xschem load -gui {$i}" \
-label [file tail $i]
}
}
@@ -1770,7 +1770,7 @@ proc simconf_add {tool} {
############ cellview
# proc cellview prints symbol bindings (default binding or "schematic" attr in symbol)
# of all symbols used in current and sub schematics.
-proc cellview_setlabels {w symbol sym_sch sym_spice_sym_def derived_symbol} {
+proc cellview_setlabels {w symbol derived_symbol} {
global dark_gui_colorscheme
if {$dark_gui_colorscheme} {
set instfg orange1
@@ -1783,6 +1783,12 @@ proc cellview_setlabels {w symbol sym_sch sym_spice_sym_def derived_symbol} {
set symbg SeaGreen1
set missingbg IndianRed1
}
+ set current [xschem get current_name]
+ set sym_spice_sym_def [xschem getprop symbol $symbol spice_sym_def 2]
+ set abs_sch [xschem get_sch_from_sym -1 $symbol]
+ set sym_sch [rel_sym_path $abs_sch]
+ set default_sch [add_ext $symbol .sch]
+ set new_sch [$w get]
$w configure -fg [option get . foreground {}]
$w configure -bg [option get . background {}]
if { $derived_symbol} {
@@ -1790,18 +1796,36 @@ proc cellview_setlabels {w symbol sym_sch sym_spice_sym_def derived_symbol} {
} elseif {$sym_spice_sym_def ne {} } {
$w configure -fg $symfg
}
- puts ===============
- puts sym_sch=$sym_sch
- puts symbol=$symbol
-
if { $sym_spice_sym_def eq {}} {
if { ![file exists [abs_sym_path [$w get]]] } {
$w configure -bg $missingbg
}
}
+ puts ===============
+ if {$sym_sch ne $new_sch && $sym_spice_sym_def eq {}} {
+ puts "Changing schematic attribute in symbol"
+ xschem load -keep_symbols -nodraw -noundoreset $symbol
+ set oldprop [xschem get schsymbolprop]
+ if { $new_sch eq $default_sch } {
+ set newprop [xschem subst_tok $oldprop schematic {}] ;# delete schematic attr in symbol
+ } else {
+ set newprop [xschem subst_tok $oldprop schematic $new_sch]
+ }
+ xschem set schsymbolprop $newprop
+ xschem set_modify 3 ;# set only modified flag to force a save, do not update window/tab titles
+ xschem save fast
+ xschem remove_symbols ;# purge all symbols to force a reload from disk
+ xschem load -keep_symbols -nodraw -noundoreset $current
+ xschem netlist -keep_symbols -noalert;# traverse the hierarchy and retain all encountered symbols
+ }
+ puts sym_sch=$sym_sch
+ puts default_sch=$default_sch
+ puts new_sch=$new_sch
+ puts symbol=$symbol
}
-proc cellview_edit_item {w sym_spice_sym_def} {
+proc cellview_edit_item {symbol w} {
+ set sym_spice_sym_def [xschem getprop symbol $symbol spice_sym_def 2]
if {[xschem is_generator [$w get]]} {
set f [$w get]
regsub {\(.*} $f {} f
@@ -1809,7 +1833,21 @@ proc cellview_edit_item {w sym_spice_sym_def} {
} elseif { $sym_spice_sym_def eq {}} {
xschem load_new_window [$w get]
} else {
- editdata $sym_spice_sym_def {Symbol spice_sym_def attribute}
+ puts $symbol
+ set current [xschem get current_name]
+ set old_sym_def [xschem getprop symbol $symbol spice_sym_def 2]
+ set new_sym_def [editdata $sym_spice_sym_def {Symbol spice_sym_def attribute}]
+ if {$new_sym_def ne $old_sym_def} {
+ xschem load -keep_symbols -nodraw -noundoreset $symbol
+ set oldprop [xschem get schsymbolprop]
+ set newprop [xschem subst_tok $oldprop spice_sym_def $new_sym_def]
+ xschem set schsymbolprop $newprop
+ xschem set_modify 3 ;# set only modified flag to force a save, do not update window/tab titles
+ xschem save fast
+ puts "$symbol: updated spice_sym_def attribute"
+ xschem load -keep_symbols -nodraw -noundoreset $current
+ xschem reload_symbols ;# update in-memory symbol data
+ }
}
}
@@ -1846,10 +1884,7 @@ proc cellview {{derived_symbols {}}} {
}
toplevel .cv
xschem reload_symbols ;# purge unused symbols
- set save_keep $keep_symbols
- set keep_symbols 1 ;# keep all symbols when doing a hierarchic netlist
- xschem netlist ;# traverse the hierarchy and retain all encountered symbols
- set keep_symbols $save_keep
+ xschem netlist -keep_symbols -noalert;# traverse the hierarchy and retain all encountered symbols
wm geometry .cv 800x200
update
raise .cv
@@ -1899,7 +1934,7 @@ proc cellview {{derived_symbols {}}} {
button $sf.f$i.sym -text Sym -padx 4 -borderwidth 1 -pady 0 -font $font \
-command "cellview_edit_sym $sf.f$i.l"
button $sf.f$i.sch -text Sch -padx 4 -borderwidth 1 -pady 0 -font $font \
- -command "cellview_edit_item $sf.f$i.s [list $sym_spice_sym_def]"
+ -command "cellview_edit_item $symbol $sf.f$i.s"
if {$sym_spice_sym_def eq {}} {
$sf.f$i.s insert 0 $sym_sch
} else {
@@ -1916,20 +1951,18 @@ proc cellview {{derived_symbols {}}} {
set f [abs_sym_path [$sf.f$i.s get]]
} else {
set ff [split $sym_spice_sym_def \n]
- puts ff=$ff
if {[llength $ff] > 5} {
set ff [lrange $ff 0 4]
lappend ff ...
}
set f [join $ff \n]
- puts f=$f
}
balloon $sf.f$i.s $f
bind $sf.f$i.s "
- cellview_setlabels %W [list $symbol] [list $sym_sch] [list $sym_spice_sym_def] $derived_symbol
+ cellview_setlabels %W [list $symbol] $derived_symbol
"
- cellview_setlabels $sf.f$i.s $symbol $sym_sch $sym_spice_sym_def $derived_symbol
+ cellview_setlabels $sf.f$i.s $symbol $derived_symbol
pack $sf.f$i.l $sf.f$i.s -side left -fill x -expand 1
pack $sf.f$i.sch $sf.f$i.sym -side left
}
@@ -1962,17 +1995,17 @@ proc traversal_setlabels {w parent_sch instname inst_sch sym_sch default_sch ins
# puts "traversal_update_schematic: $w parent: $parent_sch $instname def: $sym_sch $inst_sch --> [$w get]"
if { $inst_sch ne [$w get] } {
puts "update attr"
- xschem load $parent_sch noundoreset nodraw
+ xschem load -undoreset -nodraw $parent_sch
if { [$w get] eq $sym_sch} {
- xschem setprop instance $instname schematic fast ;# remove schematic attr on instance
+ xschem setprop -fast instance $instname schematic ;# remove schematic attr on instance
} else {
- xschem setprop instance $instname schematic [$w get] fast ;# set schematic attr on instance
+ xschem setprop -fast instance $instname schematic [$w get] ;# set schematic attr on instance
}
xschem set_modify 3 ;# set only modified flag to force a save, do not update window/tab titles
xschem save fast
set inst_sch [$w get]
# puts "inst_sch set to: $inst_sch"
- xschem load $current noundoreset nodraw
+ xschem load -undoreset -nodraw $current
bind $w "
traversal_setlabels $w [list $parent_sch] [list $instname] [list $inst_sch] [list $sym_sch] \
@@ -2014,7 +2047,7 @@ proc traversal_setlabels {w parent_sch instname inst_sch sym_sch default_sch ins
}
# This proc traverses the hierarchy and prints all instances in design.
-proc traversal {{only_subckts 0} {all_hierarchy 1}} {
+proc traversal {{only_subckts 1} {all_hierarchy 1}} {
global keep_symbols traversal_cnt
set traversal_cnt 0
set save_keep $keep_symbols
@@ -2693,7 +2726,7 @@ proc graph_edit_wave {n n_wave} {
# remove excess colors
set col [lrange $col 0 [expr {$i - 1}]]
set graph_sel_color [lindex $col $graph_sel_wave]
- xschem setprop rect 2 $graph_selected color $col fast
+ xschem setprop -fast rect 2 $graph_selected color $col
xschem draw_graph $graph_selected
toplevel .graphdialog -class Dialog
wm transient .graphdialog [xschem get topwindow]
@@ -2775,10 +2808,10 @@ proc graph_add_nodes_from_list {nodelist} {
.graphdialog.center.right.text1 insert end $sel
if { [xschem get schname] eq $graph_schname } {
set node [string trim [.graphdialog.center.right.text1 get 1.0 {end - 1 chars}] " \n"]
- xschem setprop rect 2 $graph_selected color $col fastundo
+ xschem setprop -fastundo rect 2 $graph_selected color $col
graph_update_nodelist
regsub -all {[\\"]} $node {\\&} node_quoted
- xschem setprop rect 2 $graph_selected node $node_quoted fast
+ xschem setprop -fast rect 2 $graph_selected node $node_quoted
xschem draw_graph $graph_selected
}
}
@@ -2805,13 +2838,13 @@ proc graph_add_nodes_from_list {nodelist} {
}
if {$change_done} {
- xschem setprop rect 2 [xschem get graph_lastsel] color $col fastundo
+ xschem setprop -fastundo rect 2 [xschem get graph_lastsel] color $col
if {[string length $nnn] > 0 && ![regexp "\n$" $nnn]} {
append nnn "\n"
}
append nnn $sel
regsub -all {[\\"]} $nnn {\\&} node_quoted
- xschem setprop rect 2 [xschem get graph_lastsel] node $node_quoted fast
+ xschem setprop -fast rect 2 [xschem get graph_lastsel] node $node_quoted
xschem draw_graph [xschem get graph_lastsel]
}
}
@@ -2914,7 +2947,7 @@ proc graph_change_wave_color {{wave {}}} {
set index [string range $tag 1 end]
set col [xschem getprop rect 2 $graph_selected color]
set col [lreplace $col $index $index $graph_sel_color]
- xschem setprop rect 2 $graph_selected color $col fast
+ xschem setprop -fast rect 2 $graph_selected color $col
}
}
graph_update_nodelist
@@ -2926,7 +2959,7 @@ proc graph_change_wave_color {{wave {}}} {
set index [string range $tag 1 end]
set col [xschem getprop rect 2 $graph_selected color]
set col [lreplace $col $index $index $graph_sel_color]
- xschem setprop rect 2 $graph_selected color $col fast
+ xschem setprop -fast rect 2 $graph_selected color $col
graph_update_nodelist
xschem draw_graph $graph_selected
}
@@ -2935,7 +2968,7 @@ proc graph_change_wave_color {{wave {}}} {
} else {
set col [xschem getprop rect 2 $graph_selected color]
set col [lreplace $col $wave $wave $graph_sel_color]
- xschem setprop rect 2 $graph_selected color $col fast
+ xschem setprop -fast rect 2 $graph_selected color $col
xschem draw_graph $graph_selected
}
}
@@ -2992,7 +3025,7 @@ proc graph_tag_nodes {txt} {
} else {
set col {}
}
- xschem setprop rect 2 $graph_selected color $col fast
+ xschem setprop -fast rect 2 $graph_selected color $col
}
return [list $tt $cc]
}
@@ -3047,7 +3080,7 @@ proc graph_update_node {node} {
# note the double escaping for regsub replace string
regsub -all {[\\"]} $node {\\&} node_quoted
graph_push_undo
- xschem setprop rect 2 $graph_selected node $node_quoted fast
+ xschem setprop -fast rect 2 $graph_selected node $node_quoted
xschem draw_graph $graph_selected
}
@@ -3108,13 +3141,13 @@ proc set_rect_flags {graph_selected} {
} else {
set unlocked {}
}
- xschem setprop rect 2 $graph_selected flags "graph$unlocked$private_cursor" fast
+ xschem setprop -fast rect 2 $graph_selected flags "graph$unlocked$private_cursor"
}
proc graphdialog_set_raw_props {} {
global graph_selected
- xschem setprop rect 2 $graph_selected rawfile [.graphdialog.center.right.rawentry get] fast
- xschem setprop rect 2 $graph_selected sim_type [.graphdialog.center.right.list get] fast
+ xschem setprop -fast rect 2 $graph_selected rawfile [.graphdialog.center.right.rawentry get]
+ xschem setprop -fast rect 2 $graph_selected sim_type [.graphdialog.center.right.list get]
graph_fill_listbox
}
@@ -3208,9 +3241,9 @@ proc graph_edit_properties {n} {
checkbutton .graphdialog.center.right.autoload -text {Auto load} -variable graph_autoload \
-command {
if {$graph_autoload} {
- xschem setprop rect 2 $graph_selected autoload 1 fast
+ xschem setprop -fast rect 2 $graph_selected autoload 1
} else {
- xschem setprop rect 2 $graph_selected autoload 0 fast
+ xschem setprop -fast rect 2 $graph_selected autoload 0
}
}
label .graphdialog.center.right.lab2 -text { Sim type:}
@@ -3223,7 +3256,7 @@ proc graph_edit_properties {n} {
}
if { [info tclversion] > 8.4} {
bind .graphdialog.center.right.list <> {
- xschem setprop rect 2 $graph_selected sim_type [.graphdialog.center.right.list get] fast
+ xschem setprop -fast rect 2 $graph_selected sim_type [.graphdialog.center.right.list get]
graph_fill_listbox
}
if { [xschem getprop rect 2 $graph_selected sim_type 2] ne {}} {
@@ -3241,7 +3274,7 @@ proc graph_edit_properties {n} {
}
bind .graphdialog.center.right.list {
- xschem setprop rect 2 $graph_selected sim_type [.graphdialog.center.right.list get] fast
+ xschem setprop -fast rect 2 $graph_selected sim_type [.graphdialog.center.right.list get]
graph_fill_listbox
}
@@ -3294,10 +3327,10 @@ proc graph_edit_properties {n} {
if { [xschem get schname] eq $graph_schname } {
graph_push_undo
graph_update_node [string trim [.graphdialog.center.right.text1 get 1.0 {end - 1 chars}] " \n"]
- xschem setprop rect 2 $graph_selected x1 [.graphdialog.top3.xmin get] fast
- xschem setprop rect 2 $graph_selected x2 [.graphdialog.top3.xmax get] fast
- xschem setprop rect 2 $graph_selected y1 [.graphdialog.top3.ymin get] fast
- xschem setprop rect 2 $graph_selected y2 [.graphdialog.top3.ymax get] fast
+ xschem setprop -fast rect 2 $graph_selected x1 [.graphdialog.top3.xmin get]
+ xschem setprop -fast rect 2 $graph_selected x2 [.graphdialog.top3.xmax get]
+ xschem setprop -fast rect 2 $graph_selected y1 [.graphdialog.top3.ymin get]
+ xschem setprop -fast rect 2 $graph_selected y2 [.graphdialog.top3.ymax get]
set_rect_flags $graph_selected
}
set graph_dialog_default_geometry [winfo geometry .graphdialog]
@@ -3309,10 +3342,10 @@ proc graph_edit_properties {n} {
if { [xschem get schname] eq $graph_schname } {
graph_push_undo
graph_update_node [string trim [.graphdialog.center.right.text1 get 1.0 {end - 1 chars}] " \n"]
- xschem setprop rect 2 $graph_selected x1 [.graphdialog.top3.xmin get] fast
- xschem setprop rect 2 $graph_selected x2 [.graphdialog.top3.xmax get] fast
- xschem setprop rect 2 $graph_selected y1 [.graphdialog.top3.ymin get] fast
- xschem setprop rect 2 $graph_selected y2 [.graphdialog.top3.ymax get] fast
+ xschem setprop -fast rect 2 $graph_selected x1 [.graphdialog.top3.xmin get]
+ xschem setprop -fast rect 2 $graph_selected x2 [.graphdialog.top3.xmax get]
+ xschem setprop -fast rect 2 $graph_selected y1 [.graphdialog.top3.ymin get]
+ xschem setprop -fast rect 2 $graph_selected y2 [.graphdialog.top3.ymax get]
set_rect_flags $graph_selected
}
}
@@ -3333,7 +3366,7 @@ proc graph_edit_properties {n} {
-command {
if { [xschem get schname] eq $graph_schname } {
graph_push_undo
- xschem setprop rect 2 $graph_selected legend $graph_legend fast
+ xschem setprop -fast rect 2 $graph_selected legend $graph_legend
xschem draw_graph $graph_selected
}
}
@@ -3466,7 +3499,7 @@ proc graph_edit_properties {n} {
-command {
if { [xschem get schname] eq $graph_schname } {
graph_push_undo
- xschem setprop rect 2 $graph_selected rainbow $graph_rainbow fast
+ xschem setprop -fast rect 2 $graph_selected rainbow $graph_rainbow
xschem draw_graph $graph_selected
}
}
@@ -3504,7 +3537,7 @@ proc graph_edit_properties {n} {
-command {
if { [xschem get schname] eq $graph_schname } {
graph_push_undo
- xschem setprop rect 2 $graph_selected digital $graph_digital fast
+ xschem setprop -fast rect 2 $graph_selected digital $graph_digital
xschem draw_graph $graph_selected
}
}
@@ -3592,17 +3625,17 @@ proc graph_edit_properties {n} {
-command {
if { [xschem get schname] eq $graph_schname } {
graph_push_undo
- xschem setprop rect 2 $graph_selected logx $graph_logx fast
+ xschem setprop -fast rect 2 $graph_selected logx $graph_logx
if { $graph_logx eq 1} {
graph_push_undo
- xschem setprop rect 2 $graph_selected subdivx 8 fast
+ xschem setprop -fast rect 2 $graph_selected subdivx 8
.graphdialog.top2.subdivx delete 0 end
.graphdialog.top2.subdivx insert 0 8
xschem setprop rect 2 $graph_selected fullxzoom
xschem setprop rect 2 $graph_selected fullyzoom
} else {
graph_push_undo
- xschem setprop rect 2 $graph_selected subdivx 4 fast
+ xschem setprop -fast rect 2 $graph_selected subdivx 4
.graphdialog.top2.subdivx delete 0 end
.graphdialog.top2.subdivx insert 0 4
xschem setprop rect 2 $graph_selected fullxzoom
@@ -3616,16 +3649,16 @@ proc graph_edit_properties {n} {
-command {
if { [xschem get schname] eq $graph_schname } {
graph_push_undo
- xschem setprop rect 2 $graph_selected logy $graph_logy fast
+ xschem setprop -fast rect 2 $graph_selected logy $graph_logy
if { $graph_logy eq 1} {
graph_push_undo
- xschem setprop rect 2 $graph_selected subdivy 8 fast
+ xschem setprop -fast rect 2 $graph_selected subdivy 8
.graphdialog.top2.subdivy delete 0 end
.graphdialog.top2.subdivy insert 0 8
xschem setprop rect 2 $graph_selected fullyzoom
} else {
graph_push_undo
- xschem setprop rect 2 $graph_selected subdivy 4 fast
+ xschem setprop -fast rect 2 $graph_selected subdivy 4
.graphdialog.top2.subdivy delete 0 end
.graphdialog.top2.subdivy insert 0 4
xschem setprop rect 2 $graph_selected fullyzoom
@@ -6619,7 +6652,7 @@ proc swap_compare_schematics {} {
}
puts "swap_compare_schematics:\n sch1=$sch1\n sch2=$sch2"
if {$sch2 ne {}} {
- xschem load $sch2 nofullzoom gui
+ xschem load -nofullzoom -gui $sch2
set current [xschem get schname]
# Use "file tail" to handle equality of
# https://raw.githubusercon...tb_reram.sch and /tmp/xschem_web/tb_reram.sch
@@ -8073,7 +8106,7 @@ proc build_widgets { {topwin {} } } {
}
$topwin.menubar.file add command -label "Open" -command "xschem load" -accelerator {Ctrl+O}
$topwin.menubar.file add command -label "Open Most Recent" \
- -command {xschem load [lindex "$recentfile" 0] gui} -accelerator {Ctrl+Shift+O}
+ -command {xschem load -gui [lindex "$recentfile" 0]} -accelerator {Ctrl+Shift+O}
$topwin.menubar.file add cascade -label "Open recent" -menu $topwin.menubar.file.recent
menu $topwin.menubar.file.recent -tearoff 0
setup_recent_menu $topwin
diff --git a/tests/xschemtest.tcl b/tests/xschemtest.tcl
index 1d2cb5ab..6e6690b5 100644
--- a/tests/xschemtest.tcl
+++ b/tests/xschemtest.tcl
@@ -201,7 +201,7 @@ proc netlist_test {} {
hierarchical_tedax.sch tedax 998070173
LCC_instances.sch spice 2839381760
pcb_test1.sch tedax 1925087189
- test_doublepin.sch spice 4159808692
+ test_doublepin.sch spice 1218682794
simulate_ff.sch spice 574849766
test_symbolgen.sch spice 4216484684
test_mosgen.sch spice 2380524013
diff --git a/xschem_library/devices/bus_tap.sym b/xschem_library/devices/bus_tap.sym
index fc64553a..f62d9282 100644
--- a/xschem_library/devices/bus_tap.sym
+++ b/xschem_library/devices/bus_tap.sym
@@ -33,5 +33,5 @@ L 1 0 0 10 -10 {}
B 5 9.375 -10.625 10.625 -9.375 {name=tap dir=inout}
B 5 -0.625 -0.625 0.625 0.625 {name=bus dir=inout}
T {@lab} 12.5 -12.5 3 0 0.27 0.27 {}
-T {@#0:net_name} 41.25 -12.5 3 0 0.15 0.15 {layer=15 hide=instance}
-T {@#0:spice_get_voltage} 31.25 -12.5 3 0 0.15 0.15 {layer=15 }
+T {@#0:net_name} 31.25 -12.5 3 0 0.15 0.15 {layer=15 hide=instance}
+T {@#0:spice_get_voltage} 41.25 -12.5 3 0 0.15 0.15 {layer=15 }
diff --git a/xschem_library/devices/connect.sym b/xschem_library/devices/connect.sym
index 773613c9..78c76ac3 100644
--- a/xschem_library/devices/connect.sym
+++ b/xschem_library/devices/connect.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -19,7 +19,8 @@ v {xschem version=3.4.4 file_version=1.2
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
-G {type=resistor
+G {}
+K {type=resistor
format="@name @pinlist 0.01 m=@m"
template="name=R1 m=1"}
V {}
@@ -43,3 +44,5 @@ L 4 -5 15 5 5 {}
L 4 0 15 5 10 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=p dir=out propag=1}
B 5 -2.5 27.5 2.5 32.5 {name=m dir=in propag=0}
+T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/delay.sym b/xschem_library/devices/delay.sym
index 32e314ae..ba906ba4 100644
--- a/xschem_library/devices/delay.sym
+++ b/xschem_library/devices/delay.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -19,7 +19,8 @@ v {xschem version=3.4.4 file_version=1.2
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
-G {type=delay_eldo
+G {}
+K {type=delay_eldo
format="del@name @pinlist @del"
template="name=d1 del=2e-9"}
V {}
@@ -35,3 +36,5 @@ B 5 -42.5 -2.5 -37.5 2.5 {name=inp dir=in}
B 5 37.5 -2.5 42.5 2.5 {name=outp dir=out}
T {del=@del} -27.5 -3.75 0 0 0.15 0.15 {}
T {@name} -25 -22.5 0 0 0.2 0.2 {}
+T {@#0:net_name} -40 -5 3 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} 30 -5 3 0 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/diode.sym b/xschem_library/devices/diode.sym
index a6ffe7f7..eabffcb5 100644
--- a/xschem_library/devices/diode.sym
+++ b/xschem_library/devices/diode.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -45,6 +45,6 @@ T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 17.5 0 1 0.2 0.2 {layer=13}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@model} 15 -6.25 0 0 0.2 0.2 {}
-T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
-T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#0:net_name} 5 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} 5 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {@spice_get_current} -12.5 -2.5 0 1 0.2 0.2 {layer=17}
diff --git a/xschem_library/devices/flash_cell.sym b/xschem_library/devices/flash_cell.sym
index fd89bc41..c8185e49 100644
--- a/xschem_library/devices/flash_cell.sym
+++ b/xschem_library/devices/flash_cell.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -42,5 +42,9 @@ B 5 -2.5 -32.5 2.5 -27.5 {name=D dir=inout}
B 5 -42.5 -2.5 -37.5 2.5 {name=G dir=in}
B 5 -2.5 27.5 2.5 32.5 {name=S dir=inout}
B 5 -2.5 -2.5 2.5 2.5 {name=B dir=in}
-T {DVT=@dvt} -11 4 0 0 0.2 0.2 {}
+T {DVT=@dvt} -11 9 0 0 0.2 0.2 {}
T {@name} -10 -12 0 0 0.2 0.2 {}
+T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#2:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} -45 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
+T {@#3:net_name} 5 0.625 0 0 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/ic.sym b/xschem_library/devices/ic.sym
index 590b2d59..1a93e6c0 100644
--- a/xschem_library/devices/ic.sym
+++ b/xschem_library/devices/ic.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.6RC file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -30,3 +30,4 @@ E {}
L 4 -20 -20 0 0 {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=in}
T {IC=@value} -20 -20 2 0 0.3 0.3 {layer=4}
+T {@#0:net_name} -15 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/nmos-sub.sym b/xschem_library/devices/nmos-sub.sym
index d76f29da..129a8a42 100644
--- a/xschem_library/devices/nmos-sub.sym
+++ b/xschem_library/devices/nmos-sub.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -19,7 +19,8 @@ v {xschem version=3.4.4 file_version=1.2
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
-G {type=nmos
+G {}
+K {type=nmos
format="@name @pinlist @substrate @model w=@w l=@l m=@m"
template="name=M1 model=nmos substrate=VSS w=5u l=0.18u m=1"}
V {}
@@ -43,4 +44,7 @@ B 5 17.5 27.5 22.5 32.5 {name=s dir=inout}
T {@w\\/@l\\/@m} 7.5 -17.5 0 0 0.2 0.2 {}
T {@name} 7.5 6.25 0 0 0.2 0.2 {}
T {D} 25 -27.5 0 0 0.15 0.15 {}
-T {@substrate} 22.5 -3.125 0 0 0.1 0.1 {layer=4}
+T {@substrate} 22.5 -3.125 0 0 0.1 0.1 {layer=1}
+T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/nmos.sym b/xschem_library/devices/nmos.sym
index ccfdf0ea..144a16b3 100644
--- a/xschem_library/devices/nmos.sym
+++ b/xschem_library/devices/nmos.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -53,3 +53,6 @@ T {@#1:pinnumber} -8.75 6.25 0 1 0.2 0.2 {layer=13}
T {@device} 21.25 -11.25 0 0 0.2 0.2 {}
T {@name} 21.25 3.75 0 0 0.2 0.2 {}
T {D} 10 -17.5 0 0 0.2 0.2 {}
+T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/pmos-sub.sym b/xschem_library/devices/pmos-sub.sym
index cf14e591..516dde29 100644
--- a/xschem_library/devices/pmos-sub.sym
+++ b/xschem_library/devices/pmos-sub.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -19,7 +19,8 @@ v {xschem version=3.4.4 file_version=1.2
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
-G {type=pmos
+G {}
+K {type=pmos
format="@name @pinlist @substrate @model w=@w l=@l m=@m"
template="name=M1 model=pmos substrate=VCC w=5u l=0.18u m=1"}
V {}
@@ -49,4 +50,7 @@ B 5 17.5 -32.5 22.5 -27.5 {name=s dir=inout}
T {@w\\/@l\\/@m} 7.5 -17.5 0 0 0.2 0.2 {}
T {@name} 7.5 6.25 0 0 0.2 0.2 {999}
T {D} 25 20 0 0 0.15 0.15 {}
-T {@substrate} 22.5 -3.125 0 0 0.1 0.1 {layer=4}
+T {@substrate} 22.5 -3.125 0 0 0.1 0.1 {layer=1}
+T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/pmos.sym b/xschem_library/devices/pmos.sym
index 8b5f9cb6..1294855c 100644
--- a/xschem_library/devices/pmos.sym
+++ b/xschem_library/devices/pmos.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -56,3 +56,6 @@ T {D} 7.5 8.75 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -28.75 0 0 0.2 0.2 {layer=13}
T {@#0:pinnumber} 25 18.75 0 0 0.2 0.2 {layer=13}
T {@#1:pinnumber} -13.75 6.25 0 1 0.2 0.2 {layer=13}
+T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/pmoshv4.sym b/xschem_library/devices/pmoshv4.sym
index d9b6d75f..c9ee55d3 100644
--- a/xschem_library/devices/pmoshv4.sym
+++ b/xschem_library/devices/pmoshv4.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -19,7 +19,8 @@ v {xschem version=3.4.4 file_version=1.2
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
-G {type=pmos
+G {}
+K {type=pmos
format="@name @pinlist @model w=@w l=@l number=@m"
template="name=X1 model=tepbsim3 m=1 w=5u l=0.7u"}
V {}
@@ -44,3 +45,7 @@ T {@w\\/@l\\/@m} 7.5 5 0 0 0.25 0.2 {}
T {@name} 7.5 -17.5 0 0 0.2 0.2 {999}
T {HV} -20 -20 0 0 0.2 0.2 {}
T {D} 11.875 23.125 0 0 0.15 0.15 {}
+T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
+T {@#3:net_name} 25 1.25 0 0 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/pmosnat.sym b/xschem_library/devices/pmosnat.sym
index e1aff7d8..699aee7d 100644
--- a/xschem_library/devices/pmosnat.sym
+++ b/xschem_library/devices/pmosnat.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.4 file_version=1.2
+v {xschem version=3.4.6 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -19,7 +19,8 @@ v {xschem version=3.4.4 file_version=1.2
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
}
-G {type=pmos
+G {}
+K {type=pmos
format="@name @pinlist vdd @model number=@m w=@w l=@l"
template="name=X1 model=npbsim3 m=1 w=5u l=2u"}
V {}
@@ -46,3 +47,6 @@ B 5 -22.5 -2.5 -17.5 2.5 {name=g dir=in}
B 5 17.5 -32.5 22.5 -27.5 {name=s dir=inout}
T {@w\\/@l\\/@m} 12.5 -17.5 0 0 0.25 0.2 {}
T {@name} 12.5 5 0 0 0.2 0.2 {}
+T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
+T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
diff --git a/xschem_library/devices/stop.sym b/xschem_library/devices/stop.sym
index 24195862..cb3d6aff 100644
--- a/xschem_library/devices/stop.sym
+++ b/xschem_library/devices/stop.sym
@@ -20,3 +20,4 @@ T {STOP} -60 -35 0 0 0.2 0.2 {}
T {@@node @nodecond} -57.5 -15 0 0 0.2 0.2 {}
T {time @timecond} -47.5 5 0 0 0.2 0.2 {}
T {@name} 60 -35 0 1 0.2 0.2 {}
+T {@#0:net_name} -72.5 -5 3 0 0.15 0.15 {layer=15 hide=instance}