From 9906001c5e39e5eb684e641cec85a8ee3ad7d4c8 Mon Sep 17 00:00:00 2001
From: stefan schippers <stefan.schippers@gmail.com>
Date: Mon, 16 Dec 2024 17:01:38 +0100
Subject: [PATCH] update Changelog

---
 Changelog | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Changelog b/Changelog
index 5a33641c..1fdd2608 100644
--- a/Changelog
+++ b/Changelog
@@ -1,4 +1,9 @@
 3.4.6:
+- Fix spurious change in tab name when netlisting if Trim Wires option enabled
+- Xschem raw values now returns full precision, no more 8 digit rounding, as this is
+  undesirable for transient noise sims
+- bus_tap.sym: show annotated voltage (remove hidden text attribute)
+- Add verilator in addition to icarus verilog simulator
 - "xschem annotate_op" command only deletes loaded OP raw file (if any),
   does no more delete all loaded raw files.
 - HistogramH and HistogramV graph modes (plot graph bars)