From 9604b8cc826bb0e028a9b07d1687ebe15bffc271 Mon Sep 17 00:00:00 2001 From: Stefan Frederik Date: Fri, 25 Dec 2020 21:31:15 +0100 Subject: [PATCH] removed redundant code in calc_drawing_bbox(),removed trim_wires, push & pop undo in print export routines, exported images should be wysiwyg --- src/actions.c | 27 ++------- src/draw.c | 7 +-- src/hilight.c | 124 ++++++++++++++++++++++++++---------------- src/netlist.c | 2 +- src/psprint.c | 7 --- src/scheduler.c | 11 ++-- src/spice_netlist.c | 2 +- src/svgdraw.c | 7 --- src/tedax_netlist.c | 2 +- src/verilog_netlist.c | 2 +- src/vhdl_netlist.c | 2 +- src/xschem.h | 5 +- src/xschem.tcl | 2 +- 13 files changed, 97 insertions(+), 103 deletions(-) diff --git a/src/actions.c b/src/actions.c index cb9a87b2..411dd1d7 100644 --- a/src/actions.c +++ b/src/actions.c @@ -1104,7 +1104,7 @@ void descend_schematic(int instnumber) if(xctx->hilight_nets) { prepare_netlist_structs(0); - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); } dbg(1, "descend_schematic(): before zoom(): prep_hash_inst=%d\n", xctx->prep_hash_inst); zoom_full(1, 0, 1, 0.97); @@ -1156,7 +1156,7 @@ void go_back(int confirm) /* 20171006 add confirm */ if(xctx->hilight_nets) { if(prev_sch_type != CAD_SYMBOL_ATTRS) hilight_parent_pins(); - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); } xctx->xorigin=xctx->zoom_array[xctx->currsch].x; xctx->yorigin=xctx->zoom_array[xctx->currsch].y; @@ -1307,25 +1307,10 @@ void calc_drawing_bbox(xRect *boundbox, int selected) if(selected == 1 && !xctx->inst[i].sel) continue; if(selected == 2) { - int j, rects, found, hilight_conn_inst; + int found; type = (xctx->inst[i].ptr+ xctx->sym)->type; found = 0; - hilight_conn_inst = !strcmp( - get_tok_value((xctx->inst[i].ptr+ xctx->sym)->prop_ptr, "highlight", 0), "true") || - !strcmp(get_tok_value(xctx->inst[i].prop_ptr, "highlight", 0), "true"); - if( hilight_conn_inst && (rects = (xctx->inst[i].ptr+ xctx->sym)->rects[PINLAYER]) > 0 ) { - prepare_netlist_structs(0); - for(j=0;jinst[i].node && xctx->inst[i].node[j]) { - entry=bus_hilight_lookup(xctx->inst[i].node[j], 0, XLOOKUP); - if(entry) { - found = 1; - break; - } - } - } - } - else if( type && IS_LABEL_OR_PIN(type)) { + if( type && IS_LABEL_OR_PIN(type)) { entry=bus_hilight_lookup(xctx->inst[i].lab, 0, XLOOKUP ); if(entry) found = 1; } @@ -1335,9 +1320,6 @@ void calc_drawing_bbox(xRect *boundbox, int selected) if(!found) continue; } - - - /* cpu hog 20171206 */ /* symbol_bbox(i, &xctx->inst[i].x1, &xctx->inst[i].y1, &xctx->inst[i].x2, &xctx->inst[i].y2); */ tmp.x1=xctx->inst[i].x1; @@ -1347,7 +1329,6 @@ void calc_drawing_bbox(xRect *boundbox, int selected) count++; updatebbox(count,boundbox,&tmp); } - } /* flags: bit0: invoke change_linewidth()/XSetLineAttributes, bit1: centered zoom */ diff --git a/src/draw.c b/src/draw.c index a2ba07be..18a23728 100644 --- a/src/draw.c +++ b/src/draw.c @@ -49,7 +49,7 @@ int textclip(int x1,int y1,int x2,int y2, void print_image() { - int modified_save, save_draw_grid; + int save_draw_grid; char cmd[PATH_MAX+100]; const char *r; char *tmpstring=NULL; @@ -63,9 +63,6 @@ void print_image() if(r[0]) my_strncpy(plotfile, r, S(plotfile)); else return; } - modified_save=xctx->modified; /* 20161121 save state */ - push_undo(); - trim_wires(); /* 20161121 add connection boxes on wires but undo at end */ #if 0 for(tmp=0;tmpxrect, 1, Unsorted); @@ -86,8 +83,6 @@ void print_image() tcleval(cmd); } else tcleval( "convert_to_png plot.xpm plot.png"); my_strncpy(plotfile,"", S(plotfile)); - pop_undo(0); /* 20161121 restore state */ - xctx->modified=modified_save; draw_grid=save_draw_grid; draw_pixmap=1; } diff --git a/src/hilight.c b/src/hilight.c index 075ba04a..aa0e96b8 100644 --- a/src/hilight.c +++ b/src/hilight.c @@ -70,9 +70,14 @@ void display_hilights(char **str) static int there_are_hilights() { - int i; + register int i; + register xInstance * inst = xctx->inst; + register struct hilight_hashentry **hiptr = xctx->hilight_table; for(i=0;ihilight_table[i]) return 1; + if(hiptr[i]) return 1; + } + for(i = 0; i < xctx->instances; i++) { + if(inst[i].color != -1) return 1; } return 0; } @@ -333,7 +338,7 @@ void hilight_net_pin_mismatches(void) my_free(714, &labname); my_free(715, &lab); my_free(716, &netname); - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); redraw_hilights(); } @@ -563,7 +568,7 @@ int search(const char *tok, const char *val, int sub, int sel) } } } - if(!sel) propagate_hilights(1, 0); + if(!sel) propagate_hilights(1, 0, XINSERT_NOREPLACE); if(sel) for(c = 0; c < cadlayers; c++) for(i=0;ilines[c];i++) { str = get_tok_value(xctx->line[c][i].prop_ptr, tok,0); if(get_tok_size) { @@ -642,7 +647,7 @@ int search(const char *tok, const char *val, int sub, int sel) /* "drill" option (pass through resistors or pass gates or whatever elements with */ /* 'propagate_to' properties set on pins) */ -void drill_hilight(void) +void drill_hilight(int mode) { char *netname=NULL, *propagated_net=NULL; int mult=0; @@ -663,13 +668,15 @@ void drill_hilight(void) rct=symbol->rect[PINLAYER]; for(j=0; jinst[i].color = entry->value; propagate_str=get_tok_value(rct[j].prop_ptr, "propagate_to", 0); - if(propagate_str[0] && (entry=bus_hilight_lookup(netname, 0, XLOOKUP))) { + if(propagate_str[0] && entry) { propagate = atoi(propagate_str); /* get net to propagate hilight to...*/ my_strdup(144, &propagated_net, net_name(i, propagate, &mult, 1, 1)); /* add net to highlight list */ - propag_entry = bus_hilight_lookup(propagated_net, entry->value, XINSERT_NOREPLACE); + propag_entry = bus_hilight_lookup(propagated_net, entry->value, mode); if(!propag_entry) found=1; /* keep looping until no more nets are found. */ } } /* for(j...) */ @@ -687,9 +694,10 @@ int hilight_netname(const char *name) dbg(1, "hilight_netname(): entering\n"); rebuild_selected_array(); node_entry = bus_hash_lookup(name, "", XLOOKUP, 0, "", "", "", ""); - if(node_entry && !bus_hilight_lookup(name, xctx->hilight_color, XINSERT_NOREPLACE)) { /* sets xctx->hilight_nets=1 */ + /* sets xctx->hilight_nets=1 */ + if(node_entry && !bus_hilight_lookup(name, xctx->hilight_color, XINSERT_NOREPLACE)) { if(incr_hilight) xctx->hilight_color++; - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); redraw_hilights(); } return node_entry ? 1 : 0; @@ -770,7 +778,7 @@ static void send_current_to_gaw(int simtype, const char *node) my_free(1182, &t); } -void propagate_hilights(int set, int clear) +void propagate_hilights(int set, int clear, int mode) { int i, hilight_connected_inst; struct hilight_hashentry *entry; @@ -812,10 +820,14 @@ void propagate_hilights(int set, int clear) } } xctx->hilight_nets = there_are_hilights(); - if(xctx->hilight_nets && enable_drill && set) drill_hilight(); + if(xctx->hilight_nets && enable_drill && set) drill_hilight(mode); } -#define LOGIC_X -1 + +#define LOGIC_X 7 +#define LOGIC_0 5 +#define LOGIC_1 0 + #define STACKMAX 100 int get_logic_value(int n) { @@ -895,6 +907,26 @@ int eval_logic_expr(char *expr) return stack[0]; } +void logicx() +{ + int i, rects, j; + static int map[] = {LOGIC_0, LOGIC_1, LOGIC_X}; + free_hilight_hash(); + prepare_netlist_structs(0); + for(i=0;iinstances;i++) { + rects = (xctx->inst[i].ptr+ xctx->sym)->rects[PINLAYER]; + for(j=0;jinst[i].node && xctx->inst[i].node[j]) { + bus_hilight_lookup(xctx->inst[i].node[j], map[2], XINSERT_NOREPLACE); + } + } + } + for(i=0;iwires;i++) { + bus_hilight_lookup(xctx->wire[i].node, 0, XINSERT_NOREPLACE); + } + propagate_hilights(1, 0, XINSERT_NOREPLACE); + draw(); +} void toggle_net_logic_value() { @@ -903,6 +935,7 @@ void toggle_net_logic_value() struct hilight_hashentry *entry; xRect boundbox; int big = xctx->wires> 2000 || xctx->instances > 2000 ; + static int map[] = {LOGIC_0, LOGIC_1, LOGIC_X}; prepare_netlist_structs(0); rebuild_selected_array(); @@ -913,41 +946,36 @@ void toggle_net_logic_value() } for(i=0;ilastsel;i++) { - n = xctx->sel_array[i].n; - switch(xctx->sel_array[i].type) - { - case WIRE: - entry = bus_hilight_lookup(xctx->wire[n].node, 0, XLOOKUP); - if(!entry) value = LOGIC_X; - else if(!entry->value) value = 0; - else value = 1; - newvalue = (value + 2) % 3 - 1; /* next logic value LOGIC_X (-1), 0, 1 */ - here(value); - here(newvalue); - if(newvalue == LOGIC_X) { - bus_hilight_lookup(xctx->wire[n].node, value, XDELETE); - } else { /* sets xctx->hilight_nets=1 */ - bus_hilight_lookup(xctx->wire[n].node, newvalue, XINSERT); - } - break; - case ELEMENT: - type = (xctx->inst[n].ptr+ xctx->sym)->type; - if( type && xctx->inst[n].node && IS_LABEL_SH_OR_PIN(type) ) { /* instance must have a pin! */ - entry = bus_hilight_lookup(xctx->inst[n].node[0], 0, XLOOKUP); - if(!entry) value = LOGIC_X; - else if(!entry->value) value = 0; - else value = 1; - newvalue = (value + 2) % 3 - 1; /* next logic value LOGIC_X (-1), 0, 1 */ - if(newvalue == LOGIC_X) bus_hilight_lookup(xctx->inst[n].node[0], value, XDELETE); - /* sets xctx->hilight_nets=1 */ - else bus_hilight_lookup(xctx->inst[n].node[0], newvalue, XINSERT); - } - break; - default: - break; - } + n = xctx->sel_array[i].n; + switch(xctx->sel_array[i].type) { + case WIRE: + entry = bus_hilight_lookup(xctx->wire[n].node, 0, XLOOKUP); + if(!entry) value = 2; + else if(entry->value == LOGIC_0) value = 0; + else if(entry->value == LOGIC_1) value = 1; + else value = 2; + newvalue = (value + 1) % 3; /* next logic value 0, 1, 2 (LOGIC_X) */ + here(value); + here(newvalue); + bus_hilight_lookup(xctx->wire[n].node, map[newvalue], XINSERT); + break; + case ELEMENT: + type = (xctx->inst[n].ptr+ xctx->sym)->type; + if( type && xctx->inst[n].node && IS_LABEL_SH_OR_PIN(type) ) { /* instance must have a pin! */ + entry = bus_hilight_lookup(xctx->inst[n].node[0], 0, XLOOKUP); + if(!entry) value = 2; + else if(entry->value == LOGIC_0) value = 0; + else if(entry->value == LOGIC_1) value = 1; + else value = 2; + newvalue = (value + 1) % 3; /* next logic value 0, 1, 2 (LOGIC_X) */ + bus_hilight_lookup(xctx->inst[n].node[0], map[newvalue], XINSERT); + } + break; + default: + break; + } } - propagate_hilights(1, 1); + propagate_hilights(1, 0, XINSERT); if(!big) { calc_drawing_bbox(&boundbox, 2); bbox(ADD, boundbox.x1, boundbox.y1, boundbox.x2, boundbox.y2); @@ -1004,7 +1032,7 @@ void hilight_net(int to_waveform) } } if(!incr_hilight) xctx->hilight_color++; - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); tcleval("if { [info exists gaw_fd] } {close $gaw_fd; unset gaw_fd}\n"); } @@ -1041,7 +1069,7 @@ void unhilight_net(void) bbox(ADD, boundbox.x1, boundbox.y1, boundbox.x2, boundbox.y2); bbox(SET , 0.0 , 0.0 , 0.0 , 0.0); } - propagate_hilights(0, 1); + propagate_hilights(0, 1, XINSERT_NOREPLACE); draw(); if(!big) bbox(END , 0.0 , 0.0 , 0.0 , 0.0); diff --git a/src/netlist.c b/src/netlist.c index e1c7f0f8..d5c9636e 100644 --- a/src/netlist.c +++ b/src/netlist.c @@ -1041,7 +1041,7 @@ void prepare_netlist_structs(int for_netlist) my_free(841, &global_node); dbg(2, "prepare_netlist_structs(): returning\n"); - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); } int sym_vs_sch_pins() diff --git a/src/psprint.c b/src/psprint.c index baa0d45b..bb0e4eda 100644 --- a/src/psprint.c +++ b/src/psprint.c @@ -586,7 +586,6 @@ void ps_draw(void) int c,i, textlayer; char tmp[2*PATH_MAX+40]; int old_grid; - int modified_save; const char *r, *textfont; char *psfile; @@ -604,10 +603,6 @@ void ps_draw(void) fprintf(errfp, "ps_draw(): can not create tmpfile %s\n", psfile); return; } - - modified_save=xctx->modified; - push_undo(); - trim_wires(); /* add connection bubbles on wires but undo at end */ ps_colors=my_calloc(311, cadlayers, sizeof(Ps_color)); if(ps_colors==NULL){ fprintf(errfp, "ps_draw(): calloc error\n");tcleval( "exit"); @@ -781,8 +776,6 @@ void ps_draw(void) } my_strncpy(plotfile,"", S(plotfile)); tcleval( tmp); - pop_undo(0); - xctx->modified=modified_save; Tcl_SetResult(interp,"",TCL_STATIC); } diff --git a/src/scheduler.c b/src/scheduler.c index ef652263..1afd76d9 100644 --- a/src/scheduler.c +++ b/src/scheduler.c @@ -1398,7 +1398,6 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg remove_symbol( xctx->symbols - 1); } } - Tcl_ResetResult(interp); Tcl_SetResult(interp, missing ? "0" : "1", TCL_STATIC); } @@ -1425,7 +1424,6 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg cmd_found = 1; if(argc==3 && opened==0 ) { errfp = fopen(argv[2], "w");opened=1; } /* added check to avoid multiple open */ else if(argc==2 && opened==1) { fclose(errfp); errfp=stderr;opened=0; } - Tcl_ResetResult(interp); } else if(!strcmp(argv[1],"logic_set")) { @@ -1434,7 +1432,12 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg toggle_net_logic_value(); Tcl_ResetResult(interp); } - + else if(!strcmp(argv[1],"logicx")) + { + cmd_found = 1; + logicx(); + Tcl_ResetResult(interp); + } } else if(argv[1][0] == 'm') { @@ -1772,7 +1775,7 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg set = atoi(argv[2]); clear = atoi(argv[3]); } - propagate_hilights(set, clear); + propagate_hilights(set, clear, XINSERT_NOREPLACE); } else if(!strcmp(argv[1],"push_undo")) diff --git a/src/spice_netlist.c b/src/spice_netlist.c index 86fe9377..8c2d24f6 100644 --- a/src/spice_netlist.c +++ b/src/spice_netlist.c @@ -207,7 +207,7 @@ void global_spice_netlist(int global) /* netlister driver */ } /* restore hilight flags from errors found analyzing top level before descending hierarchy */ for(i=0;iinstances; i++) xctx->inst[i].color = stored_flags[i]; - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); draw_hilight_net(1); my_free(945, &stored_flags); diff --git a/src/svgdraw.c b/src/svgdraw.c index 173774fc..7594d9bf 100644 --- a/src/svgdraw.c +++ b/src/svgdraw.c @@ -555,7 +555,6 @@ void svg_draw(void) double dx, dy; int c,i, textlayer; int old_grid; - int modified_save; char *tmpstring=NULL; const char *r, *textfont; int *unused_layer; @@ -582,10 +581,6 @@ void svg_draw(void) dy=xctx->xschem_h; dbg(1, "svg_draw(): dx=%g dy=%g\n", dx, dy); - modified_save=xctx->modified; - push_undo(); - /* Warning: sets xctx->prep_hi_structs to 0 */ - trim_wires(); /* add connection boxes on wires but undo at end */ if(plotfile[0]) { fd=fopen(plotfile, "w"); if(!fd) { @@ -767,8 +762,6 @@ void svg_draw(void) draw_grid=old_grid; my_free(964, &svg_colors); my_free(1217, &unused_layer); - pop_undo(0); - xctx->modified=modified_save; Tcl_SetResult(interp,"",TCL_STATIC); } diff --git a/src/tedax_netlist.c b/src/tedax_netlist.c index 1da1ee8f..bec515ea 100644 --- a/src/tedax_netlist.c +++ b/src/tedax_netlist.c @@ -120,7 +120,7 @@ void global_tedax_netlist(int global) /* netlister driver */ } /* restore hilight flags from errors found analyzing top level before descending hierarchy */ for(i=0;iinstances; i++) xctx->inst[i].color = stored_flags[i]; - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); draw_hilight_net(1); my_free(965, &stored_flags); diff --git a/src/verilog_netlist.c b/src/verilog_netlist.c index 6d9d7643..f2d90237 100644 --- a/src/verilog_netlist.c +++ b/src/verilog_netlist.c @@ -321,7 +321,7 @@ void global_verilog_netlist(int global) /* netlister driver */ } /* restore hilight flags from errors found analyzing top level before descending hierarchy */ for(i=0;iinstances; i++) xctx->inst[i].color = stored_flags[i]; - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); draw_hilight_net(1); my_free(1074, &stored_flags); diff --git a/src/vhdl_netlist.c b/src/vhdl_netlist.c index 646f37f7..07d2b20a 100644 --- a/src/vhdl_netlist.c +++ b/src/vhdl_netlist.c @@ -375,7 +375,7 @@ void global_vhdl_netlist(int global) /* netlister driver */ } /* restore hilight flags from errors found analyzing top level before descending hierarchy */ for(i=0;iinstances; i++) xctx->inst[i].color = stored_flags[i]; - propagate_hilights(1, 0); + propagate_hilights(1, 0, XINSERT_NOREPLACE); draw_hilight_net(1); my_free(1088, &stored_flags); dbg(1, "global_vhdl_netlist(): starting awk on netlist!\n"); diff --git a/src/xschem.h b/src/xschem.h index c7425b72..87942ba8 100644 --- a/src/xschem.h +++ b/src/xschem.h @@ -1105,9 +1105,10 @@ extern void print_generic(FILE *fd, char *ent_or_comp, int symbol); extern void print_verilog_param(FILE *fd, int symbol); extern void hilight_net(int to_waveform); extern void toggle_net_logic_value(); +extern void logicx(); extern int hilight_netname(const char *name); extern void unhilight_net(); -extern void propagate_hilights(int set, int clear); +extern void propagate_hilights(int set, int clear, int mode); extern void draw_hilight_net(int on_window); extern void display_hilights(char **str); extern void redraw_hilights(void); @@ -1134,7 +1135,7 @@ extern void toggle_only_probes(); extern void update_symbol(const char *result, int x); extern void tclexit(ClientData s); extern int build_colors(double dim); /* reparse the TCL 'colors' list and reassign colors 20171113 */ -extern void drill_hilight(void); +extern void drill_hilight(int mode); extern void get_square(double x, double y, int *xx, int *yy); extern void del_wire_table(void); extern void del_object_table(void); diff --git a/src/xschem.tcl b/src/xschem.tcl index d31f3236..489834c5 100644 --- a/src/xschem.tcl +++ b/src/xschem.tcl @@ -3546,7 +3546,7 @@ if {!$rainbow_colors} { set_ne dark_colors { "#000000" "#00ccee" "#3f3f3f" "#cccccc" "#88dd00" "#bb2200" "#00ccee" "#ff0000" "#ffff00" "#ffffff" - "#ff00ff" "#00ff00" "#0000cc" "#aaaa00" "#aaccaa" + "#ff00ff" "#00ff00" "#0044dd" "#aaaa00" "#aaccaa" "#ff7777" "#bfff81" "#00ffcc" "#ce0097" "#d2d46b" "#ef6158" "#fdb200"} } else {