diff --git a/xschem_library/examples/mos_power_ampli.sch b/xschem_library/examples/mos_power_ampli.sch
index abb71ef5..081e6d20 100644
--- a/xschem_library/examples/mos_power_ampli.sch
+++ b/xschem_library/examples/mos_power_ampli.sch
@@ -145,7 +145,7 @@ C {lab_pin.sym} 180 -1000 0 0 {name=p17 lab=E1}
 C {lab_pin.sym} 560 -1080 0 0 {name=p25 lab=VPP}
 C {lab_pin.sym} 340 -970 0 1 {name=p23 lab=E2}
 C {lab_pin.sym} 560 -970 0 1 {name=p28 lab=E6}
-C {lab_pin.sym} 840 -1000 0 1 {name=p29 lab=E4}
+C {lab_pin.sym} 840 -1000 0 0 {name=p29 lab=E4}
 C {lab_pin.sym} 180 -1120 0 0 {name=p34 lab=VBOOST}
 C {ammeter.sym} 1110 -540 0 0 {name=vd current=0.2093 net_name=true}
 C {ammeter.sym} 1110 -640 0 0 {name=vu current=0.2336 net_name=true}
@@ -218,16 +218,16 @@ C {res.sym} 560 -610 0 1 {name=R12 m=1 value=1300 net_name=true}
 C {lab_pin.sym} 690 -800 0 0 {name=p12 lab=B1}
 C {lab_pin.sym} 340 -470 0 1 {name=p13 lab=E9}
 C {lab_pin.sym} 560 -440 0 0 {name=p19 lab=C8}
-C {lab_pin.sym} 560 -530 0 1 {name=p20 lab=E8}
-C {lab_pin.sym} 840 -850 0 1 {name=p21 lab=E11}
+C {lab_pin.sym} 560 -560 0 1 {name=p20 lab=E8}
+C {lab_pin.sym} 840 -850 0 0 {name=p21 lab=E11}
 C {lab_pin.sym} 260 -160 0 1 {name=p22 lab=E3}
-C {lab_pin.sym} 260 -270 0 1 {name=p26 lab=C3}
+C {lab_pin.sym} 260 -270 0 0 {name=p26 lab=C3}
 C {lab_pin.sym} 50 -210 0 0 {name=p30 lab=B3}
 C {lab_pin.sym} 520 -490 0 0 {name=p33 lab=VSS}
 C {res.sym} 340 -660 0 1 {name=R13 m=1 value=300 net_name=true}
 C {npn.sym} 200 -630 0 1 {name=Q7 model=q2n2222 area=1 net_name=true}
 C {lab_pin.sym} 180 -690 0 0 {name=p8 lab=C7}
-C {lab_pin.sym} 340 -690 0 1 {name=p31 lab=C2}
+C {lab_pin.sym} 340 -710 0 1 {name=p31 lab=C2}
 C {title.sym} 160 -30 0 0 {name=l2 author="Stefan Schippers"}
 C {lab_pin.sym} 930 -700 0 0 {name=p32 lab=SA}
 C {ammeter.sym} 1110 -350 0 0 {name=v0 current=0.2288 net_name=true}
diff --git a/xschem_library/examples/mos_power_ampli.sym b/xschem_library/examples/mos_power_ampli.sym
index f760dd41..8c7363ca 100644
--- a/xschem_library/examples/mos_power_ampli.sym
+++ b/xschem_library/examples/mos_power_ampli.sym
@@ -1,30 +1,39 @@
-v {xschem version=2.9.7 file_version=1.1}
-G {type=subcircuit
+v {xschem version=2.9.8 file_version=1.2}
+G {}
+K {type=subcircuit
 format="@name @pinlist @symname"
 template="name=x1"
-}
-
-T {@symname} -85.5 -6 0 0 0.3 0.3 {}
-T {@name} 135 -62 0 0 0.2 0.2 {}
+net_name=true}
+V {}
+S {}
+E {}
 L 4 -130 -50 130 -50 {}
 L 4 -130 50 130 50 {}
 L 4 -130 -50 -130 50 {}
 L 4 130 -50 130 50 {}
-B 5 -152.5 -42.5 -147.5 -37.5 {name=MINUS dir=in name=p1 }
 L 4 -150 -40 -130 -40 {}
-T {MINUS} -125 -44 0 0 0.2 0.2 {}
-B 5 -152.5 -22.5 -147.5 -17.5 {name=PLUS dir=in name=p0 }
 L 4 -150 -20 -130 -20 {}
-T {PLUS} -125 -24 0 0 0.2 0.2 {}
-B 5 -152.5 -2.5 -147.5 2.5 {name=VSS dir=in name=p4 }
 L 4 -150 0 -130 0 {}
-T {VSS} -125 -4 0 0 0.2 0.2 {}
-B 5 147.5 -42.5 152.5 -37.5 {name=OUT dir=out name=p5 }
 L 4 130 -40 150 -40 {}
-T {OUT} 125 -44 0 1 0.2 0.2 {}
-B 5 -152.5 17.5 -147.5 22.5 {name=VPP dir=in name=p2 }
 L 4 -150 20 -130 20 {}
-T {VPP} -125 16 0 0 0.2 0.2 {}
-B 5 -152.5 37.5 -147.5 42.5 {name=VNN dir=in name=p3 }
 L 4 -150 40 -130 40 {}
+B 5 -152.5 -42.5 -147.5 -37.5 {name=MINUS dir=in name=p1 }
+B 5 -152.5 -22.5 -147.5 -17.5 {name=PLUS dir=in name=p0 }
+B 5 -152.5 -2.5 -147.5 2.5 {name=VSS dir=in name=p4 }
+B 5 147.5 -42.5 152.5 -37.5 {name=OUT dir=out name=p5 }
+B 5 -152.5 17.5 -147.5 22.5 {name=VPP dir=in name=p2 }
+B 5 -152.5 37.5 -147.5 42.5 {name=VNN dir=in name=p3 }
+T {@symname} -85.5 -6 0 0 0.3 0.3 {}
+T {@name} 73.75 -63.25 0 0 0.2 0.2 {}
+T {MINUS} -125 -44 0 0 0.2 0.2 {}
+T {PLUS} -125 -24 0 0 0.2 0.2 {}
+T {VSS} -125 -4 0 0 0.2 0.2 {}
+T {OUT} 125 -44 0 1 0.2 0.2 {}
+T {VPP} -125 16 0 0 0.2 0.2 {}
 T {VNN} -125 36 0 0 0.2 0.2 {}
+T {@#MINUS:net_name} -132.5 -52.5 0 1 0.15 0.15 {layer=15}
+T {@#PLUS:net_name} -132.5 -32.5 0 1 0.15 0.15 {layer=15}
+T {@#VSS:net_name} -132.5 -12.5 0 1 0.15 0.15 {layer=15}
+T {@#VPP:net_name} -132.5 7.5 0 1 0.15 0.15 {layer=15}
+T {@#VNN:net_name} -132.5 27.5 0 1 0.15 0.15 {layer=15}
+T {@#OUT:net_name} 132.5 -52.5 0 0 0.15 0.15 {layer=15}
diff --git a/xschem_library/ngspice/solar_panel.sch b/xschem_library/ngspice/solar_panel.sch
index d4ef93ae..dca89bac 100644
--- a/xschem_library/ngspice/solar_panel.sch
+++ b/xschem_library/ngspice/solar_panel.sch
@@ -79,16 +79,17 @@ N 830 -650 860 -650 {lab=SW}
 N 80 -450 170 -450 {lab=SRC}
 N 860 -250 1050 -250 {lab=0}
 N 570 -250 860 -250 {lab=0}
-N 1020 -650 1050 -650 {lab=VO}
-N 325 -450 325 -420 {lab=PANEL}
-N 325 -360 325 -310 {lab=0}
+N 1040 -650 1050 -650 {lab=VO}
+N 345 -450 345 -420 {lab=PANEL}
+N 345 -360 345 -310 {lab=0}
 N 1140 -480 1180 -480 {lab=LED}
 N 1140 -480 1140 -350 {lab=LED}
 N 230 -450 250 -450 {lab=#net2}
 N 310 -450 400 -450 {lab=PANEL}
-N 860 -470 860 -430 {lab=#net3}
 N 860 -370 860 -250 {lab=0}
-C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers"}
+N 860 -470 860 -430 { lab=#net3}
+N 960 -650 980 -650 { lab=#net4}
+C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers" net_name=true}
 C {code_shown.sym} 245 -245 0 0 {name=CONTROL value="* .control
 * save all
 * tran 5n 500u uic
@@ -98,51 +99,51 @@ C {code_shown.sym} 245 -245 0 0 {name=CONTROL value="* .control
 .save all
 .tran 5n 200u uic
 * .dc VP 0 21 0.01
-"}
+" net_name=true}
 C {code.sym} 15 -225 0 0 {name=MODELS value=".MODEL DIODE D(IS=1.139e-08 RS=0.99 CJO=9.3e-12 VJ=1.6 M=0.411 BV=30 EG=0.7 ) 
 .MODEL swmod SW(VT=0.1 VH=0.01 RON=0.01 ROFF=10000000)
-"}
-C {vsource.sym} 80 -340 0 0 {name=V1 value=21}
-C {lab_pin.sym} 80 -310 0 0 {name=l3 sig_type=std_logic lab=0}
+" net_name=true}
+C {vsource.sym} 80 -340 0 0 {name=V1 value=21 net_name=true}
+C {lab_pin.sym} 80 -310 0 0 {name=l3 sig_type=std_logic lab=0 net_name=true}
 C {res.sym} 80 -400 0 0 {name=R1
 value=1.4
 footprint=1206
 device=resistor
-m=1}
-C {lab_pin.sym} 400 -450 0 1 {name=l4 sig_type=std_logic lab=PANEL}
-C {lab_pin.sym} 80 -450 0 0 {name=l5 sig_type=std_logic lab=SRC}
-C {lab_pin.sym} 570 -250 0 0 {name=l6 sig_type=std_logic lab=0}
-C {ammeter.sym} 1110 -480 3 0 {name=Vled}
+m=1 net_name=true}
+C {lab_pin.sym} 400 -450 0 1 {name=l4 sig_type=std_logic lab=PANEL net_name=true}
+C {lab_pin.sym} 80 -450 0 0 {name=l5 sig_type=std_logic lab=SRC net_name=true}
+C {lab_pin.sym} 570 -250 0 0 {name=l6 sig_type=std_logic lab=0 net_name=true}
+C {ammeter.sym} 1110 -480 3 0 {name=Vled net_name=true}
 C {ind.sym} 930 -650 3 1 {name=L1
 m=1
 value=40u
 footprint=1206
-device=inductor}
-C {lab_pin.sym} 1180 -480 0 1 {name=l7 sig_type=std_logic lab=LED}
-C {lab_pin.sym} 610 -870 0 0 {name=l8 sig_type=std_logic lab=CTRL1}
-C {lab_pin.sym} 860 -590 0 1 {name=l9 sig_type=std_logic lab=SW}
+device=inductor net_name=true}
+C {lab_pin.sym} 1180 -480 0 1 {name=l7 sig_type=std_logic lab=LED net_name=true}
+C {lab_pin.sym} 610 -870 0 0 {name=l8 sig_type=std_logic lab=CTRL1 net_name=true}
+C {lab_pin.sym} 860 -590 0 1 {name=l9 sig_type=std_logic lab=SW net_name=true}
 C {capa.sym} 1050 -320 0 0 {name=C1
 m=1
 value=10u
 footprint=1206
-device="ceramic capacitor"}
-C {ammeter.sym} 280 -450 3 0 {name=Vpanel}
-C {lab_pin.sym} 1050 -440 0 1 {name=l10 sig_type=std_logic lab=VO}
+device="ceramic capacitor" net_name=true}
+C {ammeter.sym} 280 -450 3 1 {name=Vpanel net_name=true}
+C {lab_pin.sym} 1050 -440 0 1 {name=l10 sig_type=std_logic lab=VO net_name=true}
 C {res.sym} 860 -500 0 0 {name=R2
 value="r='V(SW) < 0 ? 0.01 : 1e9'"
 footprint=1206
 device=resistor
 m=1
-}
-C {vsource.sym} 610 -780 0 0 {name=Vset1 value="pulse 0 1 0 1n 1n 1.9u 5u"}
-C {lab_pin.sym} 610 -750 0 0 {name=l13 sig_type=std_logic lab=0}
+ net_name=true}
+C {vsource.sym} 610 -780 0 0 {name=Vset1 value="pulse 0 1 0 1n 1n 1.9u 5u" net_name=true}
+C {lab_pin.sym} 610 -750 0 0 {name=l13 sig_type=std_logic lab=0 net_name=true}
 C {res.sym} 800 -650 3 0 {name=R3
 value="r='V(CTRL1) > 0.5 ? 0.01 : 1e7'"
 footprint=1206
 device=resistor
 m=1
-}
-C {lab_pin.sym} 570 -650 0 0 {name=l2 sig_type=std_logic lab=PANEL}
+ net_name=true}
+C {lab_pin.sym} 570 -650 0 0 {name=l2 sig_type=std_logic lab=PANEL net_name=true}
 C {res.sym} 200 -450 1 1 {name=R4
 value="r='(15-V(PANEL) > 0) ?
 + (15-V(PANEL))/2.5 + 1.12 : 
@@ -152,17 +153,17 @@ value="r='(15-V(PANEL) > 0) ?
 footprint=1206
 device=resistor
 m=1
-}
-C {ammeter.sym} 990 -650 3 0 {name=Vind}
-C {capa.sym} 325 -390 0 0 {name=C2
+ net_name=true}
+C {ammeter.sym} 1010 -650 3 0 {name=Vind net_name=true}
+C {capa.sym} 345 -390 0 0 {name=C2
 m=1
 value=10u
 footprint=1206
-device="ceramic capacitor"}
-C {lab_pin.sym} 325 -310 0 0 {name=l11 sig_type=std_logic lab=0}
+device="ceramic capacitor" net_name=true}
+C {lab_pin.sym} 345 -310 0 0 {name=l11 sig_type=std_logic lab=0 net_name=true}
 C {launcher.sym} 655 -105 0 0 {name=h2 
 descr="Simulate" 
-tclcommand="xschem netlist; xschem simulate"}
+tclcommand="xschem netlist; xschem simulate" net_name=true}
 C {isource_table.sym} 1140 -320 0 0 {name=G2[9..0] CTRL="V(LED)" TABLE="
 + (0, 0)
 + (4.8, 5m)
@@ -178,9 +179,9 @@ C {isource_table.sym} 1140 -320 0 0 {name=G2[9..0] CTRL="V(LED)" TABLE="
 + (7.2, 395m)
 + (7.4, 470m)
 + (8.0, 750m)"
-}
-C {ammeter.sym} 650 -650 3 0 {name=Vsw}
-C {ammeter.sym} 860 -400 2 0 {name=Vdiode}
+ net_name=true}
+C {ammeter.sym} 650 -650 3 0 {name=Vsw net_name=true}
+C {ammeter.sym} 860 -400 2 0 {name=Vdiode net_name=true}
 C {launcher.sym} 655 -165 0 0 {name=h1 
 descr="Simulate + gaw reload" 
-tclcommand="set sim(spice,default) 1; set sim(spice,1,fg) 1; set sim(spice,1,st) 0;xschem netlist; xschem simulate; gaw_cmd reload_all"}
+tclcommand="set sim(spice,default) 1; set sim(spice,1,fg) 1; set sim(spice,1,st) 0;xschem netlist; xschem simulate; gaw_cmd reload_all" net_name=true}