From 6bbc60f8fbe0715658c27a0a1151711dceb12ab0 Mon Sep 17 00:00:00 2001 From: stefan schippers Date: Sun, 28 May 2023 15:30:40 +0200 Subject: [PATCH] add more ".." bus notations: XX[4,2,8..1..3,12,23] and others. bus_tap.sym: if no "[n]" pattern is given assume it is the complete name of the slice (does not need bus basename) --- src/expandlabel.y | 127 +++++++++++++++++++++-- src/netlist.c | 13 ++- xschem_library/examples/test_bus_tap.sch | 50 ++++++++- 3 files changed, 177 insertions(+), 13 deletions(-) diff --git a/src/expandlabel.y b/src/expandlabel.y index 80eac7ca..02061035 100644 --- a/src/expandlabel.y +++ b/src/expandlabel.y @@ -464,17 +464,21 @@ index: B_IDXNUM ':' B_IDXNUM ':' B_IDXNUM ':' B_IDXNUM $$[$$[0]]=$3; } ; -index_nobracket: B_IDXNUM B_DOUBLEDOT B_IDXNUM +index_nobracket: B_IDXNUM B_DOUBLEDOT B_IDXNUM B_DOUBLEDOT B_IDXNUM B_DOUBLEDOT B_IDXNUM { - int i; + /* start .. end .. offset .. repetitions */ + int r, i, sign, offset; + sign = XSIGN($3-$1); $$=my_malloc(_ALLOC_ID_, INITIALIDXSIZE*sizeof(int)); $$[0]=0; - dbg(3, "yyparse(): doubledot\n"); - for(i=$1;;i+=XSIGN($3-$1)) - { - check_idx(&$$,++$$[0]); - $$[$$[0]]=i; - if(i==$3) break; + offset = 0; + for(r=0; r < $7; r++) { + for(i = $1;; i += sign) { + check_idx(&$$,++$$[0]); + $$[$$[0]] = i + offset; + if(i == $3) break; + } + offset += $5; } } | B_IDXNUM B_DOUBLEDOT B_IDXNUM B_DOUBLEDOT B_IDXNUM @@ -495,6 +499,113 @@ index_nobracket: B_IDXNUM B_DOUBLEDOT B_IDXNUM if(sign==-1 && i - $5 < $3) break; } } + | B_IDXNUM B_DOUBLEDOT B_IDXNUM + { + int i; + $$=my_malloc(_ALLOC_ID_, INITIALIDXSIZE*sizeof(int)); + $$[0]=0; + dbg(3, "yyparse(): doubledot\n"); + for(i=$1;;i+=XSIGN($3-$1)) + { + check_idx(&$$,++$$[0]); + $$[$$[0]]=i; + if(i==$3) break; + } + } + | index_nobracket ',' B_IDXNUM B_DOUBLEDOT B_IDXNUM B_DOUBLEDOT B_IDXNUM B_DOUBLEDOT B_IDXNUM + { + /* start .. end .. offset .. repetitions */ + int r, i, sign, offset; + sign = XSIGN($5-$3); + offset = 0; + for(r=0; r < $9; r++) { + for(i = $3;; i += sign) { + check_idx(&$$,++$$[0]); + $$[$$[0]] = i + offset; + if(i == $5) break; + } + offset += $7; + } + } + | index_nobracket ',' B_IDXNUM B_DOUBLEDOT B_IDXNUM B_DOUBLEDOT B_IDXNUM + { + int i; + int sign; + + sign = XSIGN($5-$3); + dbg(3, "yyparse(): parsing comma sep idx range\n"); + for(i=$3;;i+=sign*$7) + { + check_idx(&$$, ++$$[0]); + $$[$$[0]]=i; + if(sign==1 && i + $7 > $5) break; + if(sign==-1 && i - $7 < $5) break; + } + } + | index_nobracket ',' B_IDXNUM B_DOUBLEDOT B_IDXNUM + { + int i; + dbg(3, "yyparse(): parsing comma sep idx range\n"); + for(i=$3;;i+=XSIGN($5-$3)) + { + check_idx(&$$, ++$$[0]); + $$[$$[0]]=i; + if(i==$5) break; + } + } + + + + | index ',' B_IDXNUM B_DOUBLEDOT B_IDXNUM B_DOUBLEDOT B_IDXNUM B_DOUBLEDOT B_IDXNUM + { + /* start .. end .. offset .. repetitions */ + int r, i, sign, offset; + sign = XSIGN($5-$3); + offset = 0; + for(r=0; r < $9; r++) { + for(i = $3;; i += sign) { + check_idx(&$$,++$$[0]); + $$[$$[0]] = i + offset; + if(i == $5) break; + } + offset += $7; + } + } + | index ',' B_IDXNUM B_DOUBLEDOT B_IDXNUM B_DOUBLEDOT B_IDXNUM + { + int i; + int sign; + + sign = XSIGN($5-$3); + dbg(3, "yyparse(): parsing comma sep idx range\n"); + for(i=$3;;i+=sign*$7) + { + check_idx(&$$, ++$$[0]); + $$[$$[0]]=i; + if(sign==1 && i + $7 > $5) break; + if(sign==-1 && i - $7 < $5) break; + } + } + | index ',' B_IDXNUM B_DOUBLEDOT B_IDXNUM + { + int i; + dbg(3, "yyparse(): parsing comma sep idx range\n"); + for(i=$3;;i+=XSIGN($5-$3)) + { + check_idx(&$$, ++$$[0]); + $$[$$[0]]=i; + if(i==$5) break; + } + } + + | index_nobracket ',' B_IDXNUM + { + dbg(3, "yyparse(): parsing comma sep idx list\n"); + check_idx(&$$, ++$$[0]); + $$[$$[0]]=$3; + } + + %% diff --git a/src/netlist.c b/src/netlist.c index 0d257a57..18fc379b 100644 --- a/src/netlist.c +++ b/src/netlist.c @@ -871,11 +871,18 @@ static int instcheck(int n, int p) } else if(bus_tap && p == 0) { char *node_base_name = NULL; + const char *tap; dbg(1, "instcheck: bus tap node: %s\n", inst[n].node[0]); if(!inst[n].node[1]) { - node_base_name = my_malloc(_ALLOC_ID_, strlen(inst[n].node[0]) + 1); - sscanf(inst[n].node[0], "%[^[]", node_base_name); - my_strcat(_ALLOC_ID_, &node_base_name, get_tok_value(inst[n].prop_ptr, "lab", 0)); + tap = get_tok_value(inst[n].prop_ptr, "lab", 0); + if(tap[0] == '[') { + node_base_name = my_malloc(_ALLOC_ID_, strlen(inst[n].node[0]) + 1); + sscanf(inst[n].node[0], "%[^[]", node_base_name); + my_strcat(_ALLOC_ID_, &node_base_name, tap); + } + else { + my_strdup2(_ALLOC_ID_, &node_base_name, tap); + } set_inst_node(n, 1, node_base_name); get_inst_pin_coord(n, 1, &x0, &y0); get_square(x0, y0, &sqx, &sqy); diff --git a/xschem_library/examples/test_bus_tap.sch b/xschem_library/examples/test_bus_tap.sch index 50b22a6a..b0d588aa 100644 --- a/xschem_library/examples/test_bus_tap.sch +++ b/xschem_library/examples/test_bus_tap.sch @@ -54,7 +54,7 @@ lab=DATA[15:0]} N 280 -810 940 -810 {bus=true lab=DIN[15..0]} N 390 -800 390 -740 { -lab=DIN0} +lab=0} N 610 -800 610 -740 { lab=DIN[4..1]} N 390 -680 390 -660 { @@ -62,9 +62,23 @@ lab=VSS} N 610 -680 610 -660 { lab=VSS} N 810 -800 810 -740 { -lab=DIN5} +lab=5} N 810 -680 810 -660 { lab=VSS} +N 1110 -620 1770 -620 {bus=true +lab=ADD[3:0],ENAB,CK} +N 1220 -610 1220 -550 { +lab=ADD[3:0]} +N 1440 -610 1440 -550 { +lab=ENAB} +N 1220 -490 1220 -470 { +lab=VSS} +N 1440 -490 1440 -470 { +lab=VSS} +N 1640 -610 1640 -550 { +lab=CK} +N 1640 -490 1640 -470 { +lab=VSS} C {bus_tap.sym} 510 -380 3 0 {name=l1 lab=[3] net_name=true} C {bus_tap.sym} 400 -380 3 0 {name=l2 lab=[13] @@ -201,3 +215,35 @@ m=1 net_name=true} C {lab_pin.sym} 810 -660 0 0 {name=p14 sig_type=std_logic lab=VSS } +C {lab_pin.sym} 1110 -620 0 0 {name=p15 sig_type=std_logic lab=ADD[3:0],ENAB,CK +} +C {bus_tap.sym} 1210 -620 1 0 {name=l13 lab=[3:0] +net_name=true} +C {bus_tap.sym} 1430 -620 1 0 {name=l14 lab=ENAB +net_name=true} +C {res.sym} 1440 -520 0 0 {name=R1[3:0] +value=1k +footprint=1206 +device=resistor +m=1 +net_name=true} +C {res.sym} 1220 -520 0 0 {name=R5 +value=1k +footprint=1206 +device=resistor +m=1 +net_name=true} +C {lab_pin.sym} 1220 -470 0 0 {name=p16 sig_type=std_logic lab=VSS +} +C {lab_pin.sym} 1440 -470 0 0 {name=p17 sig_type=std_logic lab=VSS +} +C {bus_tap.sym} 1630 -620 1 0 {name=l15 lab=CK +net_name=true} +C {res.sym} 1640 -520 0 0 {name=R6 +value=1k +footprint=1206 +device=resistor +m=1 +net_name=true} +C {lab_pin.sym} 1640 -470 0 0 {name=p18 sig_type=std_logic lab=VSS +}