diff --git a/src/callback.c b/src/callback.c index 6e7ad662..ac58254e 100644 --- a/src/callback.c +++ b/src/callback.c @@ -310,7 +310,7 @@ void backannotate_at_cursor_b_pos(xRect *r, Graph_ctx *gr) raw->annot_sweep_idx = sweep_idx; for(i = 0; i < raw->nvars; ++i) { char s[100]; - raw->cursor_b_val[i] = interpolate_yval(i, p, cursor2, sweep_idx, (p < ofs_end)); + raw->cursor_b_val[i] = interpolate_yval(i, p, cursor2, sweep_idx, (p < ofs_end)); my_snprintf(s, S(s), "%.5g", raw->cursor_b_val[i]); /* tclvareval("array set ngspice::ngspice_data [list {", raw->names[i], "} ", s, "]", NULL); */ Tcl_SetVar2(interp, "ngspice::ngspice_data", raw->names[i], s, TCL_GLOBAL_ONLY); diff --git a/src/hilight.c b/src/hilight.c index 62e98f1b..02cfab64 100644 --- a/src/hilight.c +++ b/src/hilight.c @@ -2069,18 +2069,14 @@ char *resolved_net(const char *net) my_strdup(_ALLOC_ID_, &rnet, net); return rnet; } - if(net) { char *n_s1, *n_s2; - int k, mult; + int k, mult, skip = 0; char *exp_net = NULL; - char *resolved_net; + char *resolved_net = NULL; int level = xctx->currsch; int start_level; - char *path = xctx->sch_path[level] + 1; - char *path2 = NULL; - char *path2_ptr; - int skip = 0; + char *path = xctx->sch_path[level] + 1, *path2 = NULL, *path2_ptr = NULL; start_level = sch_waves_loaded(); if(start_level == -1) start_level = 0; @@ -2099,12 +2095,21 @@ char *resolved_net(const char *net) char *net_name = my_strtok_r(n_s1, ",", "", 0, &n_s2); level = xctx->currsch; n_s1 = NULL; - resolved_net = net_name; + my_strdup2(_ALLOC_ID_, &resolved_net, net_name); dbg(1, "resolved_net(): resolved_net=%s\n", resolved_net); - while(level > start_level) { + if(xctx->currsch > 0) { /* check if net passed by attribute instead of by port */ + const char *ptr = get_tok_value(xctx->hier_attr[xctx->currsch - 1].prop_ptr, resolved_net, 0); + if(ptr && ptr[0]) { + my_strdup2(_ALLOC_ID_, &resolved_net, ptr); + level--; + dbg(1, "lcc[%d].prop_ptr=%s\n", xctx->currsch - 1, xctx->hier_attr[xctx->currsch - 1].prop_ptr); + dbg(1, "resolved_net(): resolved_net=%s\n", resolved_net); + } + } + while(level > start_level) { /* get net from parent nets attached to port if resolved_net is a port */ entry = str_hash_lookup(&xctx->portmap[level], resolved_net, NULL, XLOOKUP); if(entry) { - resolved_net = entry->value; + my_strdup2(_ALLOC_ID_, &resolved_net, entry->value); dbg(1, "resolved_net(): while loop: resolved_net=%s\n", resolved_net); } else break; @@ -2122,12 +2127,11 @@ char *resolved_net(const char *net) } path2_ptr++; } - dbg(1, "path2=%s\n", path2); - dbg(1, "level=%d start_level=%d\n", level, start_level); - + dbg(1, "path2=%s level=%d start_level=%d\n", path2, level, start_level); my_mstrcat(_ALLOC_ID_, &rnet, path2, resolved_net, NULL); if(k < mult - 1) my_strcat(_ALLOC_ID_, &rnet, ","); } + if(resolved_net) my_free(_ALLOC_ID_, &resolved_net); my_free(_ALLOC_ID_, &path2); my_free(_ALLOC_ID_, &exp_net); } diff --git a/src/token.c b/src/token.c index 19cd078c..acaf3725 100644 --- a/src/token.c +++ b/src/token.c @@ -3537,8 +3537,8 @@ static char *get_pin_attr(const char *token, int inst) my_strdup2(_ALLOC_ID_, &net, net_name(inst, n, &multip, 0, 0)); if(multip == 1 && net && net[0]) { char *rn; - dbg(1, "translate() @spice_get_voltage: inst=%d\n", inst); - dbg(1, " net=%s\n", net); + dbg(1, "get_pin_attr() spice_get_voltage: inst=%d\n", inst); + dbg(1, " net=%s\n", net); rn = resolved_net(net); if(rn) { my_strdup2(_ALLOC_ID_, &fqnet, rn); @@ -3553,7 +3553,7 @@ static char *get_pin_attr(const char *token, int inst) else if(idx < 0) { valstr = "UNDEF"; } else { - valstr = dtoa_eng(val); + valstr = dtoa(val); } my_strdup2(_ALLOC_ID_, &pin_attr_value, valstr); dbg(1, "inst %d, net=%s, fqnet=%s idx=%d valstr=%s\n", inst, net, fqnet, idx, valstr); @@ -3610,6 +3610,7 @@ static char *get_pin_attr(const char *token, int inst) } my_free(_ALLOC_ID_, &pin_attr); my_free(_ALLOC_ID_, &pin_num_or_name); + dbg(1, "get_pin_attr(): returning value=%s\n", value); return value; } @@ -3842,7 +3843,7 @@ const char *translate(int inst, const char* s) xctx->tok_size = 5; len = 5; } else { - valstr = dtoa_eng(val); + valstr = dtoa(val); len = xctx->tok_size; } if(len) { @@ -3916,7 +3917,7 @@ const char *translate(int inst, const char* s) xctx->tok_size = 5; len = 5; } else { - valstr = dtoa_eng(val); + valstr = dtoa(val); len = xctx->tok_size; } if(len) { @@ -3986,7 +3987,7 @@ const char *translate(int inst, const char* s) xctx->tok_size = 5; len = 5; } else { - valstr = dtoa_eng(val); + valstr = dtoa(val); len = xctx->tok_size; } if(len) { @@ -4051,7 +4052,7 @@ const char *translate(int inst, const char* s) double val1 = gnd1 ? 0.0 : xctx->raw->cursor_b_val[idx1]; double val2 = gnd2 ? 0.0 : xctx->raw->cursor_b_val[idx2]; val = val1 - val2; - valstr = dtoa_eng(val); + valstr = dtoa(val); len = xctx->tok_size; } if(len) { @@ -4119,7 +4120,7 @@ const char *translate(int inst, const char* s) xctx->tok_size = 0; len = 0; } else { - valstr = dtoa_eng(val); + valstr = dtoa(val); len = xctx->tok_size; } if(len) { diff --git a/xschem_library/devices/bus_tap.sym b/xschem_library/devices/bus_tap.sym index 7a2c9a03..5fef876f 100644 --- a/xschem_library/devices/bus_tap.sym +++ b/xschem_library/devices/bus_tap.sym @@ -1,4 +1,4 @@ -v {xschem version=3.4.4 file_version=1.2 +v {xschem version=3.4.5 file_version=1.2 * * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit @@ -34,3 +34,4 @@ B 5 9.375 -10.625 10.625 -9.375 {name=tap dir=inout} B 5 -0.625 -0.625 0.625 0.625 {name=bus dir=inout} T {@lab} 12.5 -12.5 3 0 0.27 0.27 {} T {@#0:net_name} 31.25 -12.5 3 0 0.15 0.15 {layer=15 hide=instance} +T {@#0:spice_get_voltage} 41.25 -12.5 3 0 0.15 0.15 {layer=15 hide=instance}