diff --git a/xschem_library/devices/ngspice_analog_delay.sym b/xschem_library/devices/ngspice_analog_delay.sym
new file mode 100644
index 00000000..4f1306e2
--- /dev/null
+++ b/xschem_library/devices/ngspice_analog_delay.sym
@@ -0,0 +1,39 @@
+v {xschem version=3.4.5 file_version=1.2
+*
+* This file is part of XSCHEM,
+* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
+* simulation.
+* Copyright (C) 1998-2023 Stefan Frederik Schippers
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License as published by
+* the Free Software Foundation; either version 2 of the License, or
+* (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
+}
+G {}
+K {type=analog_delay
+format="@name @pinlist @model"
+template="name=A1 model=del1"}
+V {}
+S {}
+E {}
+L 4 10 -5 10 10 {}
+L 4 0 10 10 10 {}
+L 4 -80 -10 80 -10 {dash=6}
+L 4 -75 -15 75 -15 {}
+L 4 -75 -5 75 -5 {}
+B 5 -82.5 -12.5 -77.5 -7.5 {name=in dir=in}
+B 5 77.5 -12.5 82.5 -7.5 {name=out dir=out}
+B 5 -2.5 7.5 2.5 12.5 {name=cntrl dir=in}
+T {@name} -40 -62.5 0 0 0.2 0.2 {}
+T {@symname} -40 -47.5 0 0 0.2 0.2 {}
+T {@model} -40 -32.5 0 0 0.2 0.2 {}