From 4e0d7beca3ca30faa44fc367b955b0413a470f5f Mon Sep 17 00:00:00 2001 From: stefan schippers Date: Wed, 13 Nov 2024 10:02:51 +0100 Subject: [PATCH] doc updates --- doc/xschem_man/developer_info.html | 34 ++++++++++++++++++++++-------- doc/xschem_man/xschem_footer.html | 2 +- 2 files changed, 26 insertions(+), 10 deletions(-) diff --git a/doc/xschem_man/developer_info.html b/doc/xschem_man/developer_info.html index dbaad390..1dd59575 100644 --- a/doc/xschem_man/developer_info.html +++ b/doc/xschem_man/developer_info.html @@ -549,6 +549,7 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns" +
  • abort_operation
    • @@ -593,6 +594,10 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
    
  •        change_elem_order n
    •     set selected object (instance, wire, line, rect, ...) to
    position 'n' in its respective array 
    
+   
  •        change_sch_path n <draw>
    • +   if descended into a vector instance change inst number we are into to 'n',
+   (same rules as 'descend' command) without going up and descending again
+   if 'draw' string is given redraw screen 
    
    
  •        check_symbols
    •     List all used symbols in current schematic and warn if some symbol is newer 
    
    
  •        check_unique_names [1|0]
    • @@ -659,9 +664,12 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
    Delete selection 
    
    
  •        delete_files
    •     Bring up a file selector the user can use to delete files 
    
-   
  •        descend [n]
    • +   
  •        descend [n] [notitle]
    •     Descend into selected component instance. Optional number 'n' specifies the 
-   instance number to descend into for vector instances (default: 0). 
    
+   instance number to descend into for vector instances (default: 0).
+   0 or 1: leftmost instance, 2: second leftmost instance, ...
+  -1: rightmost instance,-2: second rightmost instance, ...
+  if integer 'notitle' is given pass it to descend_schematic() 
    
    
  •        descend_symbol
    •     Descend into the symbol view of selected component instance 
    
    
  •        destroy_all [force]
    • @@ -801,6 +809,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
      
  •  yorigin  y coordinate of origin 
    • 
      
  •  zoom  zoom level 
    • 
    
+   
  •        get_additional_symbols what
    • +   create new symbols for instance based implementation selection 
    
    
  •        get_cell cell n_dirs
    •     return result of get_cell function 
    
    
  •        get_cell_w_ext cell n_dirs
    • @@ -852,8 +862,9 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
     
        ('inst' can be an instance name or instance number)
        ('pin' can be a pin name or pin number)
    
-   
  •        get_sch_from_sym inst
    • -   get schematic associated with instance 'inst' 
    
+   
  •        get_sch_from_sym inst [symbol]
    • +   get schematic associated with instance 'inst' 
+   if inst==-1 and a 'symbol' name is given get sch associated with symbol 
    
    
  •        get_tok str tok [with_quotes]
    •     get value of token 'tok' in string 'str'
    'with_quotes' (default:0) is an integer passed to get_tok_value() 
    
@@ -862,8 +873,9 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
    if returned value is 0 it means that last searched attribute did not exist 
    
    
  •        globals
    •     Return various global variables used in the program 
    
-   
  •        go_back
    • -   Go up one level (pop) in hierarchy 
    
+   
  •        go_back [notitle]
    • +   Go up one level (pop) in hierarchy
+   if string 'notitle' is given do not update window title (slow) 
    
    
  •        grabscreen
    •     grab root window 
    
    
  •        hash_file file [skip_path_lines]
    • @@ -949,7 +961,7 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
     --> { {Vsw} {plus} {580} {-560} } { {p2} {p} {660} {-440} }
         { {Vpanel1} {minus} {600} {-440} } 
    
    
  •        is_symgen symbol
    • -   tell if 'symbol' is agenerator (symbol(param1,param2,...) 
    
+   tell if 'symbol' is a generator (symbol(param1,param2,...)
  • line [x1 y1 x2 y2] [pos] [propstring] [draw]
    •     if 'x1 y1 x2 y2'is given place line on current
    layer (rectcolor) at indicated coordinates.
@@ -1442,6 +1454,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
        setprop symbol name tok [val]
    Set attribute 'tok' of symbol name 'name' to 'val'
    If 'val' not given (no attribute value) delete attribute from symbol
+   This command is not very useful since changes are not saved into symbol
+   and netlisters reload symbols, so changes are lost anyway.
       
        setprop rect lay n tok [val] [fast|fastundo]
    Set attribute 'tok' of rectangle number'n' on layer 'lay'
@@ -1548,8 +1562,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
    Remove leading and trailing chars matching any character in 'sep' from str
  • trim_wires
    •     Remove operlapping wires, join lines, trim wires at intersections
    -
  • undo
    • -   Undo last action
    +
  • undo [redo [set_modify]
    • +   Undo last action. Optional integers redo and set_modify are passed to pop_undo()
  • undo_type disk|memory
    •     Use disk file ('disk') or RAM ('memory') for undo bufer
  • unhilight_all [fast]
    • @@ -1649,6 +1663,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
 
 
 
+
+
 
 
 
diff --git a/doc/xschem_man/xschem_footer.html b/doc/xschem_man/xschem_footer.html
index 74080ce5..32cd01fc 100644
--- a/doc/xschem_man/xschem_footer.html
+++ b/doc/xschem_man/xschem_footer.html
@@ -20,7 +20,7 @@
         top: 12px;
         right: 30px;
         float: right;">
-        Copyright(C) 1998 - 2023 Stefan Schippers
+        Copyright(C) 1998 - 2024 Stefan Schippers