diff --git a/doc/xschem_man/developer_info.html b/doc/xschem_man/developer_info.html index dbaad390..1dd59575 100644 --- a/doc/xschem_man/developer_info.html +++ b/doc/xschem_man/developer_info.html @@ -549,6 +549,7 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns" +
@@ -593,6 +594,10 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
set selected object (instance, wire, line, rect, ...) to
position 'n' in its respective array
+ + if descended into a vector instance change inst number we are into to 'n', + (same rules as 'descend' command) without going up and descending again + if 'draw' string is given redraw screen
List all used symbols in current schematic and warn if some symbol is newer
@@ -659,9 +664,12 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
Delete selection
Bring up a file selector the user can use to delete files
- +
Descend into selected component instance. Optional number 'n' specifies the
- instance number to descend into for vector instances (default: 0).
+ instance number to descend into for vector instances (default: 0).
+ 0 or 1: leftmost instance, 2: second leftmost instance, ...
+ -1: rightmost instance,-2: second rightmost instance, ...
+ if integer 'notitle' is given pass it to descend_schematic()
Descend into the symbol view of selected component instance
@@ -801,6 +809,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
+ create new symbols for instance based implementation selection
return result of get_cell function
@@ -852,8 +862,9 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
('inst' can be an instance name or instance number)
('pin' can be a pin name or pin number)
- - get schematic associated with instance 'inst'+
+ get schematic associated with instance 'inst' + if inst==-1 and a 'symbol' name is given get sch associated with symbol
get value of token 'tok' in string 'str'
'with_quotes' (default:0) is an integer passed to get_tok_value()
@@ -862,8 +873,9 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
if returned value is 0 it means that last searched attribute did not exist
Return various global variables used in the program
- - Go up one level (pop) in hierarchy+
+ Go up one level (pop) in hierarchy + if string 'notitle' is given do not update window title (slow)
grab root window
@@ -949,7 +961,7 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
--> { {Vsw} {plus} {580} {-560} } { {p2} {p} {660} {-440} }
{ {Vpanel1} {minus} {600} {-440} }
- tell if 'symbol' is agenerator (symbol(param1,param2,...)+ tell if 'symbol' is a generator (symbol(param1,param2,...)
if 'x1 y1 x2 y2'is given place line on current
layer (rectcolor) at indicated coordinates.
@@ -1442,6 +1454,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
setprop symbol name tok [val]
Set attribute 'tok' of symbol name 'name' to 'val'
If 'val' not given (no attribute value) delete attribute from symbol
+ This command is not very useful since changes are not saved into symbol
+ and netlisters reload symbols, so changes are lost anyway.
setprop rect lay n tok [val] [fast|fastundo]
Set attribute 'tok' of rectangle number'n' on layer 'lay'
@@ -1548,8 +1562,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
Remove leading and trailing chars matching any character in 'sep' from str
Remove operlapping wires, join lines, trim wires at intersections
- - Undo last action+
+ Undo last action. Optional integers redo and set_modify are passed to pop_undo()
Use disk file ('disk') or RAM ('memory') for undo bufer
@@ -1649,6 +1663,8 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
+
+
diff --git a/doc/xschem_man/xschem_footer.html b/doc/xschem_man/xschem_footer.html
index 74080ce5..32cd01fc 100644
--- a/doc/xschem_man/xschem_footer.html
+++ b/doc/xschem_man/xschem_footer.html
@@ -20,7 +20,7 @@
top: 12px;
right: 30px;
float: right;">
- Copyright(C) 1998 - 2023 Stefan Schippers
+ Copyright(C) 1998 - 2024 Stefan Schippers