diff --git a/doc/xschem_man/symbol_property_syntax.html b/doc/xschem_man/symbol_property_syntax.html
index 9f5bcfb8..3eb278f5 100644
--- a/doc/xschem_man/symbol_property_syntax.html
+++ b/doc/xschem_man/symbol_property_syntax.html
@@ -99,6 +99,9 @@ p{padding: 15px  30px 10px;}
 
  <li><kbd>template</kbd>: Specifies default values for symbol parameters</li>
 <img src="general_rules.png">
+
+ <li><kbd>select</kbd>: specify an attribute value (not the attribute name) to select when editing properties of
+     a placed instance of the symbol. Specifying <kbd>select=*</kbd> will select all the attribute text.</li>
  </ul>
  <p>
   The order these attributes appear in the property string is not important, 
diff --git a/src/xschem.tcl b/src/xschem.tcl
index f8463729..0b6f4ab6 100644
--- a/src/xschem.tcl
+++ b/src/xschem.tcl
@@ -5689,6 +5689,9 @@ proc enter_text {textlabel {preserve_disabled disabled}} {
     }
   }
   bind .dialog.txt <Shift-KeyRelease-Return> {return_release %W; .dialog.buttons.ok invoke}
+  .dialog.txt tag add sel 1.0 {end - 1 chars}
+  .dialog.txt mark set insert 1.0
+  focus .dialog.txt
   #grab set .dialog
   tkwait window .dialog
   return $retval
@@ -6514,22 +6517,28 @@ proc edit_prop {txtlabel} {
 
   tkwait visibility .dialog
   # select text after value= or lab= and place cursor just before selection
-  set regx {value *= *("([^"]|(\\"))+"|[^ \t\n"]+)} ;# vim syntax fix "
-  set regx1 {value *= *[^ \n]}
-  set idx [.dialog.symprop search -regexp -nolinestop -count nchars $regx 1.0]
-  .dialog.symprop search -regexp -nolinestop -count len $regx1 1.0
-  incr len -1
-  if {$idx eq {} } { 
-    set regx {lab *= *("([^"]|(\\"))+"|[^ \t\n"]+)} ;# vim syntax fix "
-    set regx1 {lab *= *[^ \n]}
-    set idx [.dialog.symprop search -regexp -nolinestop -count nchars $regx 1.0]
-    .dialog.symprop search -regexp -nolinestop -count len $regx1 1.0
-    incr len -1
-  }
-  if { $idx ne {} } {
-    .dialog.symprop tag add sel "$idx + $len chars" "$idx + $nchars chars"
-    .dialog.symprop mark set insert "$idx + $len chars"
-  }
+
+  set sym_sel_attr [xschem getprop symbol $symbol select]
+  if {$sym_sel_attr eq {*}} {
+     .dialog.symprop tag add sel 1.0 {end - 1 chars}
+     .dialog.symprop mark set insert 1.0
+  } else {
+    foreach attr [list $sym_sel_attr value lab name] {
+      if {$attr eq {}} {continue}
+      set regx {}
+      set regx1 {} 
+      append regx $attr { *= *("([^"]|(\\"))+"|[^ \t\n"]+)} ;# vim syntax fix "
+      append regx1 $attr { *= *[^ \n]}
+      set idx [.dialog.symprop search -regexp -nolinestop -count nchars $regx 1.0]
+      .dialog.symprop search -regexp -nolinestop -count len $regx1 1.0
+      incr len -1
+      if {$idx ne {}} break
+    }
+    if { $idx ne {} } {
+      .dialog.symprop tag add sel "$idx + $len chars" "$idx + $nchars chars"
+      .dialog.symprop mark set insert "$idx + $len chars"
+    }
+  } 
   focus .dialog.symprop
   tkwait window .dialog
   xschem set semaphore [expr {[xschem get semaphore] -1}]
diff --git a/xschem_library/ngspice/comp_ngspice.sym b/xschem_library/ngspice/comp_ngspice.sym
index 007eb77f..ca66a0ec 100644
--- a/xschem_library/ngspice/comp_ngspice.sym
+++ b/xschem_library/ngspice/comp_ngspice.sym
@@ -1,4 +1,4 @@
-v {xschem version=3.4.5 file_version=1.2
+v {xschem version=3.4.8RC file_version=1.3
 *
 * This file is part of XSCHEM,
 * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -23,9 +23,10 @@ G {}
 K {type=subcircuit
 format="@name @pinlist @symname OFFSET=@OFFSET AMPLITUDE=@AMPLITUDE GAIN=@GAIN ROUT=@ROUT COUT=@COUT"
 template="name=x1 OFFSET=0 AMPLITUDE=5 GAIN=100 ROUT=1000 COUT=1p"
-}
+select=GAIN}
 V {}
 S {}
+F {}
 E {}
 L 4 -40 -50 -40 50 {}
 L 4 -60 -30 -40 -30 {}
diff --git a/xschem_library/ngspice/solar_panel.sch b/xschem_library/ngspice/solar_panel.sch
index 6a383ee2..96b4e587 100644
--- a/xschem_library/ngspice/solar_panel.sch
+++ b/xschem_library/ngspice/solar_panel.sch
@@ -1,4 +1,4 @@
-v {xschem version=3.4.6 file_version=1.2
+v {xschem version=3.4.8RC file_version=1.3
 *
 * This file is part of XSCHEM,
 * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@@ -25,6 +25,7 @@ G {}
 K {}
 V {}
 S {}
+F {}
 E {}
 L 2 95 -1105 95 -875 {}
 L 2 135 -1105 135 -875 {}
@@ -431,12 +432,12 @@ lab=TRIANG }
 C {vsource.sym} 550 -790 0 0 {name=Vref value=7}
 C {lab_pin.sym} 550 -760 0 0 {name=l17  lab=0 }
 C {lab_pin.sym} 760 -720 0 0 {name=l13  lab=CTRL1 }
-C {comp_ngspice.sym} 660 -890 0 0 {name=x3 OFFSET=0.5 AMPLITUDE=1 ROUT=7k COUT=1n}
+C {comp_ngspice.sym} 660 -890 0 0 {name=x3 GAIN=100 OFFSET=0.5 AMPLITUDE=1 ROUT=7k COUT=1n}
 C {lab_pin.sym} 550 -860 0 0 {name=l16
 lab=REF}
 C {lab_pin.sym} 550 -920 0 0 {name=l15  lab=LED}
 C {lab_pin.sym} 830 -890 0 1 {name=l18  lab=LEVEL}
-C {comp_ngspice.sym} 950 -1000 0 0 {name=x4 OFFSET=0.5 AMPLITUDE=1 ROUT=1 COUT=1p}
+C {comp_ngspice.sym} 950 -1000 0 0 {name=x4 GAIN=100 OFFSET=0.5 AMPLITUDE=1 ROUT=1 COUT=1p}
 C {lab_pin.sym} 1060 -1000 0 1 {name=l19  lab=CTRL1 }
 C {lab_pin.sym} 160 -450 0 0 {name=l20  lab=SUN }
 C {spice_probe.sym} 850 -1030 0 1 {name=p4 analysis=tran}