From 346a9704dfc651ae330b2b5e813668135f3cada8 Mon Sep 17 00:00:00 2001
From: stefan schippers <stefan.schippers@gmail.com>
Date: Tue, 24 Feb 2026 13:40:18 +0100
Subject: [PATCH] add optional "sim_type" parameter to command "xschem
 annotate_op filename level sim_type"

---
 doc/xschem_man/developer_info.html |  8 +++++---
 src/scheduler.c                    | 30 ++++++++++++++++++++++--------
 2 files changed, 27 insertions(+), 11 deletions(-)

diff --git a/doc/xschem_man/developer_info.html b/doc/xschem_man/developer_info.html
index e28391aa..4fc9fef8 100644
--- a/doc/xschem_man/developer_info.html
+++ b/doc/xschem_man/developer_info.html
@@ -575,13 +575,15 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
    Ask user to choose a png/jpg file and start a GUI placement of the image </pre>
    <li><kbd>       align</kbd></li><pre>
    Align currently selected objects to current snap setting </pre>
-   <li><kbd>       annotate_op [raw_file] [level]</kbd></li><pre>
+   <li><kbd>       annotate_op [raw_file] [level] [sim_type]</kbd></li><pre>
    Annotate operating point data into current schematic.
    use &lt;schematic name&gt;.raw or use supplied argument as raw file to open
    look for operating point data and annotate voltages/currents into schematic.
    The optional 'level' integer specifies the hierarchy level the raw file refers to.
    This is necessary if annotate_op is called from a sub schematic at a hierarchy
-   level &gt; 0 but simulation was done at top level (hierarchy 0, for example)</pre>
+   level &gt; 0 but simulation was done at top level (hierarchy 0, for example)
+   The sim_type optional parameter (specify also file name and level in this case) sets the 
+   simulation to look for (instead of default op, dc, tran fallbacks)</pre>
    <li><kbd>       arc [x y r a b layer prop]</kbd></li><pre>
    if arguments are given (center x and y, radius r, start angle a, end angle b, layer number)
    place specified arc, otherwise start a GUI placement of an arc.
@@ -899,7 +901,7 @@ C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns"
    Get attribute 'attr' of rectangle number 'num' on layer 'layer'
       
        getprop text num attr
-   Get attribute 'attr' of text number 'num', 'num' can also be the name attribute 
+   Get attribute 'attr' of text number 'num', 'num' can also be the name attribute
    of the text object
    if 'attr' is 'txt_ptr' return the text string
       
diff --git a/src/scheduler.c b/src/scheduler.c
index 05eccc01..25873b1b 100644
--- a/src/scheduler.c
+++ b/src/scheduler.c
@@ -334,20 +334,28 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
       draw();
     }
 
-    /* annotate_op [raw_file] [level]
+    /* annotate_op [raw_file] [level] [sim_type]
      *   Annotate operating point data into current schematic.
      *   use <schematic name>.raw or use supplied argument as raw file to open
      *   look for operating point data and annotate voltages/currents into schematic.
      *   The optional 'level' integer specifies the hierarchy level the raw file refers to.
      *   This is necessary if annotate_op is called from a sub schematic at a hierarchy
      *   level > 0 but simulation was done at top level (hierarchy 0, for example)
+     *   The sim_type optional parameter (specify also file name and level in this case) sets the 
+     *   simulation to look for (instead of default op, dc, tran fallbacks)
      */
     else if(!strcmp(argv[1], "annotate_op"))
     {
       int level = -1;
       int res = 0;
+      char sim_type[256] = "";
       char f[PATH_MAX + 100];
       if(!xctx) {Tcl_SetResult(interp, not_avail, TCL_STATIC); return TCL_ERROR;}
+
+      if(argc > 4) {
+        my_snprintf(sim_type, S(sim_type),"%s", argv[4]);
+      }
+
       if(argc > 3) {
         level = atoi(argv[3]);
         if(level < 0 || level > xctx->currsch) {
@@ -368,13 +376,19 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg
         res = extra_rawfile(3, xctx->raw->rawfile, xctx->raw->sim_type, -1.0, -1.0);
       }
       tcleval("array unset ngspice::ngspice_data");
-      res = extra_rawfile(1, f, "op", -1.0, -1.0);
-      if(res != 1) {
-        /* Xyce uses a 1-point DC transfer characteristic for operating point (OP) data */
-        res = extra_rawfile(1, f, "dc", -1.0, -1.0);
-      }
-      if(res != 1) { /* try to load a tran analysis (display 1stpoint as OP data in schematic) */
-        res = extra_rawfile(1, f, "tran", -1.0, -1.0);
+
+
+      if(sim_type[0]) {
+        res = extra_rawfile(1, f, sim_type, -1.0, -1.0);
+      } else {
+        res = extra_rawfile(1, f, "op", -1.0, -1.0);
+        if(res != 1) {
+          /* Xyce uses a 1-point DC transfer characteristic for operating point (OP) data */
+          res = extra_rawfile(1, f, "dc", -1.0, -1.0);
+        }
+        if(res != 1) { /* try to load a tran analysis (display 1stpoint as OP data in schematic) */
+          res = extra_rawfile(1, f, "tran", -1.0, -1.0);
+        }
       }
       if(res == 1) {
         if(level >= 0) {