diff --git a/src/xinit.c b/src/xinit.c index 75849e9b..ca4f75ce 100644 --- a/src/xinit.c +++ b/src/xinit.c @@ -1961,6 +1961,9 @@ int Tcl_AppInit(Tcl_Interp *inter) my_snprintf(tmp, S(tmp), "append XSCHEM_LIBRARY_PATH : [file dirname \"%s\"]/xschem_library/generators", pwd_dir); tcleval(tmp); + my_snprintf(tmp, S(tmp), + "append XSCHEM_LIBRARY_PATH : [file dirname \"%s\"]/xschem_library/inst_sch_select", pwd_dir); + tcleval(tmp); my_snprintf(tmp, S(tmp), "append XSCHEM_LIBRARY_PATH : [file dirname \"%s\"]/xschem_library/binto7seg", pwd_dir); tcleval(tmp); @@ -1976,7 +1979,7 @@ int Tcl_AppInit(Tcl_Interp *inter) } #else char *up_hier=NULL, *win_xschem_library_path=NULL; - #define WIN_XSCHEM_LIBRARY_PATH_NUM 10 + #define WIN_XSCHEM_LIBRARY_PATH_NUM 11 const char *WIN_XSCHEM_LIBRARY_PATH[WIN_XSCHEM_LIBRARY_PATH_NUM] = { /*1*/ "xschem_library", /*2*/ "xschem_library/devices", @@ -1985,9 +1988,10 @@ int Tcl_AppInit(Tcl_Interp *inter) /*5*/ "xschem_library/logic", /*6*/ "xschem_library/xschem_simulator", /*7*/ "xschem_library/generators", - /*8*/ "xschem_library/binto7seg", - /*9*/ "xschem_library/pcb", - /*10*/ "xschem_library/rom8k" }; + /*8*/ "xschem_library/inst_sch_select", + /*9*/ "xschem_library/binto7seg", + /*10*/ "xschem_library/pcb", + /*11*/ "xschem_library/rom8k" }; GetModuleFileNameA(NULL, install_dir, MAX_PATH); change_to_unix_fn(install_dir); size_t dir_len=strlen(install_dir); diff --git a/src/xschemrc b/src/xschemrc index 7af5afb5..616cffa0 100644 --- a/src/xschemrc +++ b/src/xschemrc @@ -22,6 +22,7 @@ #### /home/schippes/share/doc/xschem/logic #### /home/schippes/share/doc/xschem/xschem_simulator #### /home/schippes/share/doc/xschem/generators +#### /home/schippes/share/doc/xschem/inst_sch_select #### /home/schippes/share/doc/xschem/binto7seg #### /home/schippes/share/doc/xschem/pcb #### /home/schippes/share/doc/xschem/rom8k @@ -35,6 +36,7 @@ #### ../xschem_library/logic #### ../xschem_library/xschem_simulator #### ../xschem_library/generators +#### ../xschem_library/inst_sch_select #### ../xschem_library/binto7seg #### ../xschem_library/pcb #### ../xschem_library/rom8k @@ -51,6 +53,7 @@ # append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/logic # append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/pcb # append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/generators +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/inst_sch_select # append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/binto7seg # append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/symgen # append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/xTAG @@ -68,6 +71,7 @@ # append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/logic" # append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/pcb" # append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/generators" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/inst_sch_select" # append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/binto7seg" ########################################################################### diff --git a/xschem_library/Makefile b/xschem_library/Makefile index c62d42b2..b9debfdc 100644 --- a/xschem_library/Makefile +++ b/xschem_library/Makefile @@ -9,6 +9,7 @@ install: FORCE $(SCCBOX) mkdir -p "$(XDOCDIR)"/logic "$(XDOCDIR)"/xTAG "$(XDOCDIR)"/binto7seg $(SCCBOX) mkdir -p "$(XDOCDIR)"/symgen "$(XDOCDIR)"/ngspice "$(XDOCDIR)"/rulz-r8c33 $(SCCBOX) mkdir -p "$(XDOCDIR)"/generators + $(SCCBOX) mkdir -p "$(XDOCDIR)"/inst_sch_select $(SCCBOX) mkdir -p "$(XDOCDIR)"/rom8k "$(XDOCDIR)"/gschem_import/sym $(SCCBOX) install -f -d devices/*.sym "$(system_library_dir)" $(SCCBOX) install -f -d devices/*.sch "$(system_library_dir)" @@ -18,6 +19,7 @@ install: FORCE $(SCCBOX) install -f -d binto7seg/*.sym "$(XDOCDIR)"/binto7seg $(SCCBOX) install -f -d binto7seg/*.sch "$(XDOCDIR)"/binto7seg $(SCCBOX) install -f -d generators/*.* "$(XDOCDIR)"/generators + $(SCCBOX) install -f -d inst_sch_select/*.* "$(XDOCDIR)"/inst_sch_select $(SCCBOX) install -f -d xTAG/*.sym* "$(XDOCDIR)"/xTAG $(SCCBOX) install -f -d xTAG/*.sch "$(XDOCDIR)"/xTAG $(SCCBOX) install -f -d logic/*.sym "$(XDOCDIR)"/logic @@ -44,7 +46,7 @@ uninstall: FORCE $(SCCBOX) rm -f "$(system_library_dir)"/* "$(XDOCDIR)"/examples/* "$(XDOCDIR)"/pcb/* \ "$(XDOCDIR)"/ngspice/* "$(XDOCDIR)"/symgen/* "$(XDOCDIR)"/logic/* "$(XDOCDIR)"/xTAG/* \ "$(XDOCDIR)"/rom8k/* "$(XDOCDIR)"/xschem_simulator/* "$(XDOCDIR)"/binto7seg/* \ - "$(XDOCDIR)"/rulz-r8c33/* "$(XDOCDIR)"/generators/* \ + "$(XDOCDIR)"/rulz-r8c33/* "$(XDOCDIR)"/generators/* "$(XDOCDIR)"/inst_sch_select/* \ "$(XDOCDIR)"/gschem_import/*.sym \ "$(XDOCDIR)"/gschem_import/*.sch \ "$(XDOCDIR)"/gschem_import/sym/*.sym \ diff --git a/xschem_library/examples/0_examples_top.sch b/xschem_library/examples/0_examples_top.sch index 674bd73d..1b538064 100644 --- a/xschem_library/examples/0_examples_top.sch +++ b/xschem_library/examples/0_examples_top.sch @@ -81,14 +81,14 @@ that's me...) T {Simulation Graphs } 1530 -550 0 0 0.6 0.6 {layer=4} -T {Bus rippers} 580 -440 0 0 0.6 0.6 {layer=4} +T {Bus rippers} 580 -400 0 0 0.6 0.6 {layer=4} N 820 -420 940 -420 {lab=#net1} N 860 -460 860 -370 {lab=#net2} N 860 -390 920 -390 {lab=#net2} N 880 -430 910 -420 {lab=#net1} -N 380 -370 640 -370 {lab=BUS[4:0]} -N 510 -460 510 -380 {lab=BUS[1]} -N 410 -420 410 -380 {lab=BUS[2]} +N 380 -330 640 -330 {lab=BUS[4:0]} +N 510 -420 510 -340 {lab=BUS[1]} +N 410 -380 410 -340 {lab=BUS[2]} C {poweramp.sym} 480 -690 0 0 {name=x1 tclcommand="xschem descend"} C {tesla.sym} 160 -570 0 0 {name=x2} @@ -116,10 +116,10 @@ program=x-www-browser } C {rlc.sym} 160 -770 0 0 {name=x0} -C {lab_pin.sym} 640 -370 0 1 {name=l2 sig_type=std_logic lab=BUS[4:0]} -C {bus_connect.sym} 500 -370 0 0 {name=l3 lab=BUS[1]} -C {bus_connect_nolab.sym} 400 -370 0 0 {name=r1} -C {lab_pin.sym} 410 -420 3 1 {name=l4 sig_type=std_logic lab=BUS[2]} +C {lab_pin.sym} 640 -330 0 1 {name=l2 sig_type=std_logic lab=BUS[4:0]} +C {bus_connect.sym} 500 -330 0 0 {name=l3 lab=BUS[1]} +C {bus_connect_nolab.sym} 400 -330 0 0 {name=r1} +C {lab_pin.sym} 410 -380 3 1 {name=l4 sig_type=std_logic lab=BUS[2]} C {LCC_instances.sym} 160 -450 0 0 {name=x7} C {test_backannotated_subckt.sym} 160 -410 0 0 {name=x10} C {plot_manipulation.sym} 160 -370 0 0 {name=x11} @@ -1469,3 +1469,4 @@ tclcommand="xschem descend"} C {poweramp_lcc.sym} 480 -650 0 0 {name=x16 tclcommand="xschem descend"} C {test_symbolgen.sym} 480 -530 0 0 {name=x18} +C {inst_sch_select.sym} 480 -490 0 0 {name=x24} diff --git a/xschem_library/inst_sch_select/comp_65nm.sch b/xschem_library/inst_sch_select/comp_65nm.sch new file mode 100644 index 00000000..428d609e --- /dev/null +++ b/xschem_library/inst_sch_select/comp_65nm.sch @@ -0,0 +1,110 @@ +v {xschem version=3.1.0 file_version=1.2 +} +G {} +K {} +V {} +S {} +E {} +N 590 -150 590 -130 { lab=0} +N 370 -180 550 -180 { lab=GN1} +N 330 -230 330 -210 { lab=GN1} +N 330 -310 330 -290 { lab=VCC} +N 330 -150 330 -130 { lab=0} +N 510 -240 670 -240 { lab=#net1} +N 590 -240 590 -210 { lab=#net1} +N 510 -340 510 -300 { lab=#net2} +N 670 -340 670 -300 { lab=#net3} +N 550 -410 550 -380 { lab=#net2} +N 510 -380 550 -380 { lab=#net2} +N 510 -380 510 -340 { lab=#net2} +N 510 -460 510 -440 { lab=#net4} +N 800 -460 800 -400 { lab=VCC} +N 670 -370 760 -370 { lab=#net3} +N 330 -210 370 -210 { lab=GN1} +N 370 -210 370 -180 { lab=GN1} +N 670 -460 670 -440 { lab=VCC} +N 550 -410 640 -410 { lab=#net2} +N 800 -150 800 -130 { lab=0} +N 800 -340 800 -210 { lab=#net5} +N 550 -180 550 -170 { lab=GN1} +N 550 -170 660 -170 { lab=GN1} +N 660 -180 660 -170 { lab=GN1} +N 660 -180 760 -180 { lab=GN1} +N 670 -380 670 -340 { lab=#net3} +N 1130 -290 1170 -290 { lab=OUT} +N 800 -290 870 -290 { lab=#net5} +N 980 -150 980 -130 { lab=0} +N 980 -420 980 -400 { lab=VCC} +N 940 -370 940 -180 { lab=#net5} +N 980 -340 980 -210 { lab=#net6} +N 870 -290 940 -290 { lab=#net5} +N 1130 -150 1130 -130 { lab=0} +N 1130 -420 1130 -400 { lab=VCC} +N 1090 -370 1090 -180 { lab=#net6} +N 1130 -340 1130 -210 { lab=OUT} +N 980 -290 1090 -290 { lab=#net6} +N 990 -620 990 -510 { lab=#net6} +N 930 -620 930 -510 { lab=#net5} +N 890 -560 930 -560 { lab=#net5} +N 890 -560 890 -290 { lab=#net5} +N 990 -560 1010 -560 { lab=#net6} +N 1010 -560 1030 -560 { lab=#net6} +N 1030 -560 1030 -290 { lab=#net6} +N 960 -660 990 -660 { lab=#net6} +N 990 -660 990 -620 { lab=#net6} +N 930 -510 930 -470 { lab=#net5} +N 930 -470 960 -470 { lab=#net5} +C {nmos4.sym} 570 -180 0 0 {name=M1 model=nmos w=4u l=0.4u m=1} +C {lab_pin.sym} 590 -180 0 1 {name=p2 lab=0} +C {lab_pin.sym} 590 -130 0 0 {name=p6 lab=0} +C {nmos4.sym} 350 -180 0 1 {name=M2 model=nmos w=4u l=0.4u m=1} +C {lab_pin.sym} 330 -180 0 0 {name=p7 lab=0} +C {isource.sym} 330 -260 0 0 {name=I0 value=30u} +C {lab_pin.sym} 330 -310 0 0 {name=p9 lab=VCC} +C {lab_pin.sym} 330 -130 0 0 {name=p16 lab=0} +C {nmos4.sym} 490 -270 0 0 {name=M3 model=nmos w=1.5u l=0.2u m=1} +C {lab_pin.sym} 510 -270 0 1 {name=p17 lab=0} +C {nmos4.sym} 690 -270 0 1 {name=M4 model=nmos w=1.5u l=0.2u m=1} +C {lab_pin.sym} 670 -270 0 0 {name=p18 lab=0 l=0.2u} +C {pmos4.sym} 530 -410 0 1 {name=M5 model=pmos w=6u l=0.3u m=1} +C {pmos4.sym} 650 -410 0 0 {name=M6 model=pmos w=6u l=0.3u m=1} +C {lab_pin.sym} 670 -460 0 0 {name=p21 lab=VCC} +C {lab_pin.sym} 510 -410 0 0 {name=p23 lab=VCC} +C {lab_pin.sym} 670 -410 0 1 {name=p33 lab=VCC} +C {lab_wire.sym} 500 -180 0 0 {name=l2 lab=GN1} +C {ipin.sym} 100 -310 0 0 {name=p161 lab=PLUS} +C {ipin.sym} 100 -260 0 0 {name=p1 lab=MINUS} +C {opin.sym} 180 -290 0 0 {name=p20 lab=OUT} +C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"} +C {lab_pin.sym} 710 -270 0 1 {name=p3 lab=PLUS} +C {lab_pin.sym} 470 -270 0 0 {name=p4 lab=MINUS} +C {lab_pin.sym} 1170 -290 0 1 {name=p14 lab=OUT} +C {pmos4.sym} 780 -370 0 0 {name=M14 model=pmos w=6u l=0.3u m=1} +C {lab_pin.sym} 800 -370 0 1 {name=p15 lab=VCC} +C {lab_pin.sym} 800 -460 0 0 {name=p22 lab=VCC} +C {spice_probe.sym} 420 -180 0 0 {name=p27 attrs=""} +C {spice_probe.sym} 570 -410 0 0 {name=p28 attrs=""} +C {nmos4.sym} 780 -180 0 0 {name=M7 model=nmos w=4u l=0.4u m=1} +C {lab_pin.sym} 800 -180 0 1 {name=p5 lab=0} +C {lab_pin.sym} 800 -130 0 1 {name=p8 lab=0} +C {nmos4.sym} 960 -180 0 0 {name=M8 model=nmos w=1u l=0.4u m=1} +C {lab_pin.sym} 980 -180 0 1 {name=p10 lab=0} +C {lab_pin.sym} 980 -130 0 1 {name=p11 lab=0} +C {pmos4.sym} 960 -370 0 0 {name=M9 model=pmos w=2u l=0.4u m=1} +C {lab_pin.sym} 980 -370 0 1 {name=p12 lab=VCC} +C {lab_pin.sym} 980 -420 0 0 {name=p13 lab=VCC} +C {nmos4.sym} 1110 -180 0 0 {name=M10 model=nmos w=1u l=0.4u m=1} +C {lab_pin.sym} 1130 -180 0 1 {name=p24 lab=0} +C {lab_pin.sym} 1130 -130 0 1 {name=p25 lab=0} +C {pmos4.sym} 1110 -370 0 0 {name=M11 model=pmos w=2u l=0.4u m=1} +C {lab_pin.sym} 1130 -370 0 1 {name=p26 lab=VCC} +C {lab_pin.sym} 1130 -420 0 0 {name=p29 lab=VCC} +C {nmos4.sym} 960 -490 3 0 {name=M13 model=nmos w=2u l=0.1u m=1} +C {lab_pin.sym} 960 -510 3 1 {name=p31 lab=0} +C {spice_probe.sym} 1040 -290 0 0 {name=p35 attrs=""} +C {spice_probe.sym} 840 -290 0 0 {name=p36 attrs=""} +C {nmos4.sym} 960 -640 1 0 {name=M12 model=nmos w=2u l=0.1u m=1} +C {lab_pin.sym} 960 -620 1 1 {name=p30 lab=0} +C {spice_probe.sym} 560 -240 0 0 {name=p32 attrs=""} +C {parax_cap.sym} 390 -170 0 0 {name=C2 gnd=0 value=200f m=1} +C {vdd.sym} 510 -460 0 0 {name=l3 lab=VCC} diff --git a/xschem_library/inst_sch_select/comp_65nm.sym b/xschem_library/inst_sch_select/comp_65nm.sym new file mode 100644 index 00000000..4ffaaf36 --- /dev/null +++ b/xschem_library/inst_sch_select/comp_65nm.sym @@ -0,0 +1,24 @@ +v {xschem version=3.1.0 file_version=1.2 +} +G {} +K {type=subcircuit +format="@name @pinlist @symname" +template="name=x1" +} +V {} +S {} +E {} +L 4 -40 -50 -40 50 {} +L 4 40 0 60 0 {} +L 4 -60 30 -40 30 {} +L 4 -40 -50 40 0 {} +L 4 -40 50 40 0 {} +L 4 -60 -30 -40 -30 {} +B 5 -62.5 -32.5 -57.5 -27.5 {name=PLUS dir=in } +B 5 57.5 -2.5 62.5 2.5 {name=OUT dir=out } +B 5 -62.5 27.5 -57.5 32.5 {name=MINUS dir=in } +T {@symname} -32 44 0 0 0.3 0.3 {} +T {@name} -10 -48.25 0 0 0.2 0.2 {} +T {PLUS} -38.75 -30.25 0 0 0.2 0.2 {} +T {OUT} 28.75 -5.25 0 1 0.2 0.2 {} +T {MINUS} -38.75 18.5 0 0 0.2 0.2 {} diff --git a/xschem_library/inst_sch_select/comp_65nm_empty.sch b/xschem_library/inst_sch_select/comp_65nm_empty.sch new file mode 100644 index 00000000..f26c2f64 --- /dev/null +++ b/xschem_library/inst_sch_select/comp_65nm_empty.sch @@ -0,0 +1,8 @@ +v {xschem version=3.1.0 file_version=1.2 +} +G {} +K {} +V {} +S {vout out 0 2} +E {} +C {architecture.sym} 70 -610 0 0 { nothing here, use global schematic properties } diff --git a/xschem_library/inst_sch_select/comp_65nm_file.cir b/xschem_library/inst_sch_select/comp_65nm_file.cir new file mode 100644 index 00000000..a8c05397 --- /dev/null +++ b/xschem_library/inst_sch_select/comp_65nm_file.cir @@ -0,0 +1,6 @@ +* comp_65nm_file.cir + +.subckt comp_65nm_file PLUS OUT MINUS +v1 x 0 1 +e1 out x plus minus 0.5 +.ends diff --git a/xschem_library/inst_sch_select/comp_65nm_parax.sch b/xschem_library/inst_sch_select/comp_65nm_parax.sch new file mode 100644 index 00000000..a2c0c181 --- /dev/null +++ b/xschem_library/inst_sch_select/comp_65nm_parax.sch @@ -0,0 +1,21 @@ +v {xschem version=3.1.0 file_version=1.2 +} +G {} +K {} +V {} +S {} +E {} +N 100 -310 120 -310 { +lab=PLUS} +N 100 -260 120 -260 { +lab=MINUS} +N 230 -290 230 -260 { +lab=OUT} +C {opin.sym} 230 -290 0 0 {name=p20 lab=OUT} +C {ipin.sym} 100 -260 0 0 {name=p1 lab=MINUS} +C {ipin.sym} 100 -310 0 0 {name=p161 lab=PLUS} +C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"} +C {parax_cap.sym} 120 -300 0 0 {name=C1 gnd=0 value=50f m=1} +C {parax_cap.sym} 120 -250 0 0 {name=C2 gnd=0 value=50f m=1} +C {ammeter.sym} 230 -230 0 0 {name=Vmeas} +C {lab_pin.sym} 230 -200 0 0 {name=p2 sig_type=std_logic lab=0} diff --git a/xschem_library/inst_sch_select/inst_sch_select.sch b/xschem_library/inst_sch_select/inst_sch_select.sch new file mode 100644 index 00000000..1360fb3c --- /dev/null +++ b/xschem_library/inst_sch_select/inst_sch_select.sch @@ -0,0 +1,277 @@ +v {xschem version=3.1.0 file_version=1.2 +} +G {} +K {} +V {} +S {} +E {} +B 2 710 -590 1510 -190 {flags=graph +y1=-0.013 +y2=2.1 +ypos1=0 +ypos2=2 +divy=5 +subdivy=1 +unity=1 +x1=0 +x2=5e-08 +divx=5 +subdivx=1 +node="out1 +out2 +out3 +out4 +out5" +color="7 8 9 10 11" +dataset=-1 +unitx=1 +logx=0 +logy=0 +hilight_wave=-1} +B 2 710 -910 1510 -590 {flags=graph +y1=-0.013 +y2=2.1 +ypos1=0 +ypos2=2 +divy=5 +subdivy=1 +unity=1 +x1=0 +x2=5e-08 +divx=5 +subdivx=1 +node="plus +minus" +color="4 14" +dataset=-1 +unitx=1 +logx=0 +logy=0 +hilight_wave=-1} +T {Default instance: +Uses comp_65nm.sch} 10 -900 0 0 0.4 0.4 { layer=7} +T {Alternate instance: +Uses comp_65nm_parax.sch} 10 -690 0 0 0.4 0.4 { layer=8} +T {Alternate instance: +Uses comp_65nm_pex +contained in attribute +spice_sym_def +No schematic used} 10 -490 0 0 0.4 0.4 {} +T {Alternate instance: +Uses comp_65nm_empty.sch +netlist embedded in global +spice schematic attribute} 340 -890 0 0 0.4 0.4 { layer=10} +T {Alternate instance: +Uses spice_sym_def to read in +file comp_65nm_file.cir +no schematic used} 340 -590 0 0 0.4 0.4 { layer=11} +T {The same symbol is simulated with 5 different implementations +using instance 'schematic' and 'spice_sym_def' attributes} 190 -1010 0 0 0.6 0.6 { layer=4 slant=oblique} +T {Instance based implementation selection.} 250 -1070 0 0 0.8 0.8 {} +C {comp_65nm.sym} 180 -790 0 0 {name=x1} +C {lab_pin.sym} 120 -820 0 0 {name=p1 lab=PLUS} +C {lab_pin.sym} 240 -790 0 1 {name=p2 lab=OUT1} +C {lab_pin.sym} 120 -760 0 0 {name=p3 lab=MINUS} +C {comp_65nm.sym} 180 -580 0 0 {name=x2 +schematic=comp_65nm_parax.sch} +C {lab_pin.sym} 120 -610 0 0 {name=p4 lab=PLUS} +C {lab_pin.sym} 240 -580 0 1 {name=p5 lab=OUT2} +C {lab_pin.sym} 120 -550 0 0 {name=p6 lab=MINUS} +C {comp_65nm.sym} 180 -310 0 0 {name=x3 +schematic=comp_65nm_pex +spice_sym_def=".subckt comp_65nm_pex PLUS OUT MINUS +** parasitic netlist +cparax1 net1 0 20f +cparax2 net2 0 20f +cparax3 net3 0 20f +cparax4 net4 0 20f +cparax5 net5 0 20f +cparaxout out 0 40f +M1 net1 GN1 0 0 nmos w=4u l=0.4u m=1 +M2 GN1 GN1 0 0 nmos w=4u l=0.4u m=1 +I0 VCC GN1 30u +M3 net2 MINUS net1 0 nmos w=1.5u l=0.2u m=1 +M4 net3 PLUS net1 0 nmos w=1.5u l=0.2u m=1 +M5 net2 net2 VCC VCC pmos w=6u l=0.3u m=1 +M6 net3 net2 VCC VCC pmos w=6u l=0.3u m=1 +M14 net4 net3 VCC VCC pmos w=6u l=0.3u m=1 +.save v(gn1) +.save v(net2) +M7 net4 GN1 0 0 nmos w=4u l=0.4u m=1 +M8 net5 net4 0 0 nmos w=1u l=0.4u m=1 +M9 net5 net4 VCC VCC pmos w=2u l=0.4u m=1 +M10 OUT net5 0 0 nmos w=1u l=0.4u m=1 +M11 OUT net5 VCC VCC pmos w=2u l=0.4u m=1 +M13 net4 net4 net5 0 nmos w=2u l=0.1u m=1 +M12 net5 net5 net4 0 nmos w=2u l=0.1u m=1 +C2 GN1 0 200f m=1 +.ends" + +verilog_sym_def="verilog stuff" +vhdl_sym_def="vhdl stuff"} +C {lab_pin.sym} 120 -340 0 0 {name=p7 lab=PLUS} +C {lab_pin.sym} 240 -310 0 1 {name=p8 lab=OUT3} +C {lab_pin.sym} 120 -280 0 0 {name=p9 lab=MINUS} +C {code.sym} 0 -200 0 0 {name=MODELS only_toplevel=false value="* Beta Version released on 2/22/06 + +* PTM 65nm NMOS + +.model nmos nmos level = 54 ++version = 4.0 binunit = 1 paramchk= 1 mobmod = 0 ++capmod = 2 igcmod = 1 igbmod = 1 geomod = 1 ++diomod = 1 rdsmod = 0 rbodymod= 1 rgatemod= 1 ++permod = 1 acnqsmod= 0 trnqsmod= 0 ++tnom = 27 toxe = 1.85e-9 toxp = 1.2e-9 toxm = 1.85e-9 ++dtox = 0.65e-9 epsrox = 3.9 wint = 5e-009 lint = 5.25e-009 ++ll = 0 wl = 0 lln = 1 wln = 1 ++lw = 0 ww = 0 lwn = 1 wwn = 1 ++lwl = 0 wwl = 0 xpart = 0 toxref = 1.85e-9 ++xl = -30e-9 ++vth0 = 0.423 k1 = 0.4 k2 = 0.01 k3 = 0 ++k3b = 0 w0 = 2.5e-006 dvt0 = 1 dvt1 = 2 ++dvt2 = -0.032 dvt0w = 0 dvt1w = 0 dvt2w = 0 ++dsub = 0.1 minv = 0.05 voffl = 0 dvtp0 = 1.0e-009 ++dvtp1 = 0.1 lpe0 = 0 lpeb = 0 xj = 1.96e-008 ++ngate = 2e+020 ndep = 2.54e+018 nsd = 2e+020 phin = 0 ++cdsc = 0.000 cdscb = 0 cdscd = 0 cit = 0 ++voff = -0.13 nfactor = 1.9 eta0 = 0.0058 etab = 0 ++vfb = -0.55 u0 = 0.0491 ua = 6e-010 ub = 1.2e-018 ++uc = 0 vsat = 124340 a0 = 1.0 ags = 1e-020 ++a1 = 0 a2 = 1.0 b0 = 0 b1 = 0 ++keta = 0.04 dwg = 0 dwb = 0 pclm = 0.04 ++pdiblc1 = 0.001 pdiblc2 = 0.001 pdiblcb = -0.005 drout = 0.5 ++pvag = 1e-020 delta = 0.01 pscbe1 = 8.14e+008 pscbe2 = 1e-007 ++fprout = 0.2 pdits = 0.08 pditsd = 0.23 pditsl = 2.3e+006 ++rsh = 5 rdsw = 165 rsw = 85 rdw = 85 ++rdswmin = 0 rdwmin = 0 rswmin = 0 prwg = 0 ++prwb = 6.8e-011 wr = 1 alpha0 = 0.074 alpha1 = 0.005 ++beta0 = 30 agidl = 0.0002 bgidl = 2.1e+009 cgidl = 0.0002 ++egidl = 0.8 ++aigbacc = 0.012 bigbacc = 0.0028 cigbacc = 0.002 ++nigbacc = 1 aigbinv = 0.014 bigbinv = 0.004 cigbinv = 0.004 ++eigbinv = 1.1 nigbinv = 3 aigc = 0.012 bigc = 0.0028 ++cigc = 0.002 aigsd = 0.012 bigsd = 0.0028 cigsd = 0.002 ++nigc = 1 poxedge = 1 pigcd = 1 ntox = 1 ++xrcrg1 = 12 xrcrg2 = 5 ++cgso = 1.5e-010 cgdo = 1.5e-010 cgbo = 2.56e-011 cgdl = 2.653e-10 ++cgsl = 2.653e-10 ckappas = 0.03 ckappad = 0.03 acde = 1 ++moin = 15 noff = 0.9 voffcv = 0.02 ++kt1 = -0.11 kt1l = 0 kt2 = 0.022 ute = -1.5 ++ua1 = 4.31e-009 ub1 = 7.61e-018 uc1 = -5.6e-011 prt = 0 ++at = 33000 ++fnoimod = 1 tnoimod = 0 ++jss = 0.0001 jsws = 1e-011 jswgs = 1e-010 njs = 1 ++ijthsfwd= 0.01 ijthsrev= 0.001 bvs = 10 xjbvs = 1 ++jsd = 0.0001 jswd = 1e-011 jswgd = 1e-010 njd = 1 ++ijthdfwd= 0.01 ijthdrev= 0.001 bvd = 10 xjbvd = 1 ++pbs = 1 cjs = 0.0005 mjs = 0.5 pbsws = 1 ++cjsws = 5e-010 mjsws = 0.33 pbswgs = 1 cjswgs = 3e-010 ++mjswgs = 0.33 pbd = 1 cjd = 0.0005 mjd = 0.5 ++pbswd = 1 cjswd = 5e-010 mjswd = 0.33 pbswgd = 1 ++cjswgd = 5e-010 mjswgd = 0.33 tpb = 0.005 tcj = 0.001 ++tpbsw = 0.005 tcjsw = 0.001 tpbswg = 0.005 tcjswg = 0.001 ++xtis = 3 xtid = 3 ++dmcg = 0e-006 dmci = 0e-006 dmdg = 0e-006 dmcgt = 0e-007 ++dwj = 0.0e-008 xgw = 0e-007 xgl = 0e-008 ++rshg = 0.4 gbmin = 1e-010 rbpb = 5 rbpd = 15 ++rbps = 15 rbdb = 15 rbsb = 15 ngcon = 1 + +* PTM 65nm PMOS + +.model pmos pmos level = 54 ++version = 4.0 binunit = 1 paramchk= 1 mobmod = 0 ++capmod = 2 igcmod = 1 igbmod = 1 geomod = 1 ++diomod = 1 rdsmod = 0 rbodymod= 1 rgatemod= 1 ++permod = 1 acnqsmod= 0 trnqsmod= 0 ++tnom = 27 toxe = 1.95e-009 toxp = 1.2e-009 toxm = 1.95e-009 ++dtox = 0.75e-9 epsrox = 3.9 wint = 5e-009 lint = 5.25e-009 ++ll = 0 wl = 0 lln = 1 wln = 1 ++lw = 0 ww = 0 lwn = 1 wwn = 1 ++lwl = 0 wwl = 0 xpart = 0 toxref = 1.95e-009 ++xl = -30e-9 ++vth0 = -0.365 k1 = 0.4 k2 = -0.01 k3 = 0 ++k3b = 0 w0 = 2.5e-006 dvt0 = 1 dvt1 = 2 ++dvt2 = -0.032 dvt0w = 0 dvt1w = 0 dvt2w = 0 ++dsub = 0.1 minv = 0.05 voffl = 0 dvtp0 = 1e-009 ++dvtp1 = 0.05 lpe0 = 0 lpeb = 0 xj = 1.96e-008 ++ngate = 2e+020 ndep = 1.87e+018 nsd = 2e+020 phin = 0 ++cdsc = 0.000 cdscb = 0 cdscd = 0 cit = 0 ++voff = -0.126 nfactor = 1.9 eta0 = 0.0058 etab = 0 ++vfb = 0.55 u0 = 0.00574 ua = 2.0e-009 ub = 0.5e-018 ++uc = 0 vsat = 70000 a0 = 1.0 ags = 1e-020 ++a1 = 0 a2 = 1 b0 = -1e-020 b1 = 0 ++keta = -0.047 dwg = 0 dwb = 0 pclm = 0.12 ++pdiblc1 = 0.001 pdiblc2 = 0.001 pdiblcb = 3.4e-008 drout = 0.56 ++pvag = 1e-020 delta = 0.01 pscbe1 = 8.14e+008 pscbe2 = 9.58e-007 ++fprout = 0.2 pdits = 0.08 pditsd = 0.23 pditsl = 2.3e+006 ++rsh = 5 rdsw = 165 rsw = 85 rdw = 85 ++rdswmin = 0 rdwmin = 0 rswmin = 0 prwg = 3.22e-008 ++prwb = 6.8e-011 wr = 1 alpha0 = 0.074 alpha1 = 0.005 ++beta0 = 30 agidl = 0.0002 bgidl = 2.1e+009 cgidl = 0.0002 ++egidl = 0.8 ++aigbacc = 0.012 bigbacc = 0.0028 cigbacc = 0.002 ++nigbacc = 1 aigbinv = 0.014 bigbinv = 0.004 cigbinv = 0.004 ++eigbinv = 1.1 nigbinv = 3 aigc = 0.69 bigc = 0.0012 ++cigc = 0.0008 aigsd = 0.0087 bigsd = 0.0012 cigsd = 0.0008 ++nigc = 1 poxedge = 1 pigcd = 1 ntox = 1 ++xrcrg1 = 12 xrcrg2 = 5 ++cgso = 1.5e-010 cgdo = 1.5e-010 cgbo = 2.56e-011 cgdl = 2.653e-10 ++cgsl = 2.653e-10 ckappas = 0.03 ckappad = 0.03 acde = 1 ++moin = 15 noff = 0.9 voffcv = 0.02 ++kt1 = -0.11 kt1l = 0 kt2 = 0.022 ute = -1.5 ++ua1 = 4.31e-009 ub1 = 7.61e-018 uc1 = -5.6e-011 prt = 0 ++at = 33000 ++fnoimod = 1 tnoimod = 0 ++jss = 0.0001 jsws = 1e-011 jswgs = 1e-010 njs = 1 ++ijthsfwd= 0.01 ijthsrev= 0.001 bvs = 10 xjbvs = 1 ++jsd = 0.0001 jswd = 1e-011 jswgd = 1e-010 njd = 1 ++ijthdfwd= 0.01 ijthdrev= 0.001 bvd = 10 xjbvd = 1 ++pbs = 1 cjs = 0.0005 mjs = 0.5 pbsws = 1 ++cjsws = 5e-010 mjsws = 0.33 pbswgs = 1 cjswgs = 3e-010 ++mjswgs = 0.33 pbd = 1 cjd = 0.0005 mjd = 0.5 ++pbswd = 1 cjswd = 5e-010 mjswd = 0.33 pbswgd = 1 ++cjswgd = 5e-010 mjswgd = 0.33 tpb = 0.005 tcj = 0.001 ++tpbsw = 0.005 tcjsw = 0.001 tpbswg = 0.005 tcjswg = 0.001 ++xtis = 3 xtid = 3 ++dmcg = 0e-006 dmci = 0e-006 dmdg = 0e-006 dmcgt = 0e-007 ++dwj = 0.0e-008 xgw = 0e-007 xgl = 0e-008 ++rshg = 0.4 gbmin = 1e-010 rbpb = 5 rbpd = 15 ++rbps = 15 rbdb = 15 rbsb = 15 ngcon = 1 +"} +C {vsource.sym} 680 -110 0 0 {name=V1 value=2} +C {lab_pin.sym} 680 -140 0 0 {name=p21 lab=VCC} +C {lab_pin.sym} 680 -80 0 0 {name=p10 lab=0} +C {vsource.sym} 800 -110 0 0 {name=V2 value=1} +C {lab_pin.sym} 800 -140 0 0 {name=p11 lab=MINUS} +C {lab_pin.sym} 800 -80 0 0 {name=p12 lab=0} +C {vsource.sym} 950 -110 0 0 {name=V3 value="pwl 0 0 10n 0 20n 2 30n 2 40n 0"} +C {lab_pin.sym} 950 -140 0 0 {name=p13 lab=PLUS} +C {lab_pin.sym} 950 -80 0 0 {name=p14 lab=0} +C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"} +C {launcher.sym} 790 -170 0 0 {name=h5 +descr="load waves" +tclcommand="xschem raw_read $netlist_dir/test_instance_schematic_selection.raw tran" +} +C {code_shown.sym} 140 -190 0 0 {name=COMMANDS only_toplevel=false value=".control + save all + tran 1n 50n + write test_instance_schematic_selection.raw +.endc"} +C {comp_65nm.sym} 490 -700 0 0 {name=x4 +schematic=comp_65nm_empty.sch} +C {lab_pin.sym} 430 -730 0 0 {name=p15 lab=PLUS} +C {lab_pin.sym} 550 -700 0 1 {name=p16 lab=OUT4} +C {lab_pin.sym} 430 -670 0 0 {name=p17 lab=MINUS} +C {comp_65nm.sym} 490 -420 0 0 {name=x5 +schematic=comp_65nm_file +spice_sym_def="tcleval( + [read_data_nonewline [abs_sym_path comp_65nm_file.cir]] +)" + +vhdl_sym_def="tcleval( + [read_data_nonewline [abs_sym_path comp_65nm_file.cir]] +)" +tclcommand="textwindow [abs_sym_path comp_65nm_file.cir]"} +C {lab_pin.sym} 430 -450 0 0 {name=p18 lab=PLUS} +C {lab_pin.sym} 550 -420 0 1 {name=p19 lab=OUT5} +C {lab_pin.sym} 430 -390 0 0 {name=p20 lab=MINUS} diff --git a/xschem_library/inst_sch_select/inst_sch_select.sym b/xschem_library/inst_sch_select/inst_sch_select.sym new file mode 100644 index 00000000..678f63ad --- /dev/null +++ b/xschem_library/inst_sch_select/inst_sch_select.sym @@ -0,0 +1,11 @@ +v {xschem version=3.1.0 file_version=1.2} +K {type=subcircuit +format="@name @pinlist @symname" +template="name=x1" +} +T {@symname} -85.5 -6 0 0 0.3 0.3 {} +T {@name} 135 -22 0 0 0.2 0.2 {} +L 4 -130 -10 130 -10 {} +L 4 -130 10 130 10 {} +L 4 -130 -10 -130 10 {} +L 4 130 -10 130 10 {} diff --git a/xschem_library/inst_sch_select/xschemrc b/xschem_library/inst_sch_select/xschemrc new file mode 100644 index 00000000..8dcdbf27 --- /dev/null +++ b/xschem_library/inst_sch_select/xschemrc @@ -0,0 +1,433 @@ +#### xschemrc system configuration file + +#### values may be overridden by user's ~/.xschem/xschemrc configuration file +#### or by project-local ./xschemrc + +########################################################################### +#### XSCHEM INSTALLATION DIRECTORY: XSCHEM_SHAREDIR +########################################################################### +#### Normally there is no reason to set this variable if using standard +#### installation. Location of files is set at compile time but may be overridden +#### with following line: +# set XSCHEM_SHAREDIR $env(HOME)/share/xschem + +#### older xschem versions +# set XSCHEM_SHAREDIR $env(HOME)/x/xschem-r2363/src +# set XSCHEM_SHAREDIR $env(HOME)/xschem + + + +# libptr: +# set to noop do nothing +# set to empty for empty XSCHEM_LIBRARY_PATH +# set to sky130 for sky130 schematics +# set to repo to edit directly in xschem-repo workspace +# set to share for installed schematics (share/doc/xschem) +# set to xschem for ~/xschem/xschem_library +set XSCHEM_LIBRARY_PATH {} +append XSCHEM_LIBRARY_PATH :${XSCHEM_SHAREDIR}/xschem_library/devices + +append XSCHEM_LIBRARY_PATH :~/.xschem/xschem_library/library_LCC_stefan +append XSCHEM_LIBRARY_PATH :~/.xschem/xschem_library +append XSCHEM_LIBRARY_PATH :$env(HOME)/xschem-repo/trunk/xschem_library/logic +append XSCHEM_LIBRARY_PATH :$env(HOME)/xschem-repo/trunk/xschem_library/examples +append XSCHEM_LIBRARY_PATH :$env(HOME)/xschem-repo/trunk/xschem_library/binto7seg +append XSCHEM_LIBRARY_PATH :$env(HOME)/xschem-repo/trunk/xschem_library/ngspice +append XSCHEM_LIBRARY_PATH :$env(HOME)/xschem-repo/trunk/xschem_library/xschem_simulator +append XSCHEM_LIBRARY_PATH :$env(HOME)/xschem-repo/trunk/xschem_library/rom8k +append XSCHEM_LIBRARY_PATH :$env(HOME)/xschem-repo/trunk/xschem_library/pcb + +append XSCHEM_LIBRARY_PATH :[pwd] + + +########################################################################### +#### XSCHEM SYSTEM-WIDE DESIGN LIBRARY PATHS: XSCHEM_LIBRARY_PATH +########################################################################### +#### If unset xschem starts with XSCHEM_LIBRARY_PATH set to the default, typically: +# /home/schippes/.xschem/xschem_library +# /home/schippes/share/xschem/xschem_library/devices +# /home/schippes/share/doc/xschem/examples +# /home/schippes/share/doc/xschem/ngspice +# /home/schippes/share/doc/xschem/logic +# /home/schippes/share/doc/xschem/xschem_simulator +# /home/schippes/share/doc/xschem/binto7seg +# /home/schippes/share/doc/xschem/pcb +# /home/schippes/share/doc/xschem/rom8k + +#### For testing in build src directory +#### if unset following paths are set and maintained if existing: +# +# ~/.xschem/xschem_library +# ../xschem_library/devices +# ../xschem_library/examples +# ../xschem_library/ngspice +# ../xschem_library/logic +# ../xschem_library/xschem_simulator +# ../xschem_library/binto7seg +# ../xschem_library/pcb +# ../xschem_library/rom8k + +#### For testing after installation: uncomment following lines +# set xschem_doc_dir [file dirname ${XSCHEM_SHAREDIR}]/doc/xschem +# set XSCHEM_LIBRARY_PATH {} +# append XSCHEM_LIBRARY_PATH :~/.xschem/xschem_library +# append XSCHEM_LIBRARY_PATH :${XSCHEM_SHAREDIR}/xschem_library/devices +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/examples +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/ngspice +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/xschem_simulator +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/rom8k +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/logic +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/pcb +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/binto7seg +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/symgen +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/xTAG +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/rulz-r8c33 +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/gschem_import +# append XSCHEM_LIBRARY_PATH :${xschem_doc_dir}/gschem_import/sym + +#### For Windows, use ; instead of :, and enclosed pathname with "" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/devices" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/examples" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/ngspice" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/xschem_simulator" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/rom8k" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/logic" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/pcb" +# append XSCHEM_LIBRARY_PATH ";${XSCHEM_SHAREDIR}/../xschem_library/binto7seg" + +########################################################################### +#### SET CUSTOM COLORS FOR XSCHEM LIBRARIES MATCHING CERTAIN PATTERNS +########################################################################### +#### each line contains a dircolor(pattern) followed by a color +#### color can be an ordinary name (grey, brown, blue) or a hex code {#77aaff} +#### hex code must be enclosed in braces +#### these are the defaults: +# set dircolor(/share/xschem/) red +# set dircolor(/share/doc/xschem/) {#338844} + +########################################################################### +#### WINDOW TO OPEN ON STARTUP: XSCHEM_START_WINDOW +########################################################################### +#### Start without a design if no filename given on command line: +#### To avoid absolute paths, use a path that is relative to one of the +#### XSCHEM_LIBRARY_PATH directories. Default: empty +# set XSCHEM_START_WINDOW {0_examples_top.sch} + +########################################################################### +#### DIRECTORY WHERE SIMULATIONS, NETLIST AND SIMULATOR OUTPUTS ARE PLACED +########################################################################### +#### If unset $USER_CONF_DIR/simulations is assumed (normally ~/.xschem/simulations) +# set netlist_dir $env(HOME)/.xschem/simulations + +########################################################################### +#### NETLIST AND HIERARCHICAL PRINT EXCLUDE PATTERNS +########################################################################### +#### xschem_libs is a list of patterns of cells to exclude from netlisting. +#### Matching is done as regular expression on full cell path +#### Example: +#### set xschem_libs { {/cmoslib/} {/analoglib/.*pass} buffer } +#### in this case all schematic cells of directory cmoslib and cells containing +#### /analoglib/...pass and buffer will be excluded from netlisting +#### default value: empty +# set xschem_libs {} +#### noprint_libs is a list with same rules as for xschem_libs. This +#### variable controls hierarchical print +#### default value: empty +# set noprint_libs {} +#### nolist_libs is a list with same rules as for xschem_libs. This +#### variable controls cell listing in procedure list_hierarchy. +#### default value: empty +# set nolist_libs {} + +########################################################################### +#### CHANGE DEFAULT [] WITH SOME OTHER CHARACTERS FOR BUSSED SIGNALS +#### IN SPICE NETLISTS (EXAMPLE: DATA[7] --> DATA<7>) +########################################################################### +#### default: empty (use xschem default, [ ]) +# set bus_replacement_char {<>} +#### for XSPICE: replace square brackets as the are used for XSPICE vector nodes. +# set bus_replacement_char {__} + +########################################################################### +#### SOME DEFAULT BEHAVIOR +########################################################################### +#### Allowed values: spice, verilog, vhdl, tedax, default: spice +# set netlist_type spice + +#### Some netlisting options (these are the defaults) +# set verilog_2001 1 + +#### to use a fixed line with set change_lw to 0 and set some value to line_width +#### these are the defaults +# set line_width 0 +# set change_lw 1 + +#### allow color postscript and svg exports. Default: 1, enable color +# set color_ps 1 + +#### initial size of xschem window you can specify also position with (wxh+x+y) +#### this is the default: +set initial_geometry {750x500} + +#### if set to 0, when zooming out allow the viewport do drift toward the mouse position, +#### allowing to move away by zooming / unzooming with mouse wheel +#### default setting: 0 +# set unzoom_nodrift 0 + +#### if set to 1 full zoom will center the drawing instead of anhoring to lower +#### left corner. Default: 0 +set zoom_full_center 1 + +#### if set to 1 allow to place multiple components with same name. +#### Warning: this is normally not allowed in any simulation netlist. +#### default: 0, do not allow place multiple elements with same name (refdes) +# set disable_unique_names 0 + +#### if set to 1 continue drawing lines / wires after click +#### default: 0 +# set persistent_command 1 + +#### if set to 1 a wire is inserted when separating components that are +#### connected by pins. Default: not enabled (0) +# set connect_by_kissing 1 + +#### if set to 1 automatically join/trim wires while editing +#### this may slow down on rally big designs. Can be disabled via menu +#### default: 0 +# set autotrim_wires 0 + +#### set widget scaling (mainly for font display), this is useful on 4K displays +#### default: unset (tk uses its default) > 1.0 ==> bigger +set tk_scaling 1.1 + +#### use the tclreadline package if available , Default: 1 (enabled). +# set use_tclreadline 1 + +#### disable some symbol layers. Default: none, all layers are visible. +# set enable_layer(5) 0 ;# example to disable pin red boxes + +#### enable to scale grid point size as done with lines at close zoom, default: 0 +set big_grid_points 1 + +#### enable grouping contiguous bits of bus slices in net->pin instance +#### assignments for verilog netlists. Default: disabled (0) +# set verilog_bitblast 0 + +#### allow searching the full search path for schematics associated to symbols +#### instead of looking only in symbol directory. Default: disabled (0). +# set search_schematic 0 + +#### focus the schematic window if mouse goes over it, even if a dialog box +#### is displayed, without needing to click. +#### This allows to move/zoom/pan the schematic while editing attributes. +#### Clicking in the schematic window usually closes the dialog box or starts +#### editing a new component if clicking on a new component. +#### default: enabled (1) +set autofocus_mainwindow 1 + +#### set component browser always above drawing canvas. +#### default: enabled (1) +# set component_browser_on_top 0 + +# +########################################################################### +#### EXPORT FORMAT TRANSLATORS, PNG AND PDF +########################################################################### +#### command to translate xpm to png; (assumes command takes source +#### and dest file as arguments, example: gm convert plot.xpm plot.png) +#### default: {gm convert} +#### Windows ghostscript uses gswin64c +# set to_png {gswin64c -sDEVICE=png16m -o} +# set to_png {gm convert} + +#### command to translate ps to pdf; (assumes command takes source +#### and dest file as arguments, example: ps2pdf plot.ps plot.pdf) +#### default: ps2pdf +#### Windows ghostscript uses gswin64c +# set to_pdf {gswin64c -sDEVICE=pdfwrite -o} +# set to_pdf ps2pdf +set to_pdf {ps2pdf -dAutoRotatePages=/None} + + +########################################################################### +#### UNDO: SAVE ON DISK OR KEEP IN MEMORY +########################################################################### +#### Alloved: 'disk'or 'memory'. +#### Saving undo on disk is safer but slower on extremely big schematics. +#### In most cases you won't notice any delay. Undo on disk allows previous +#### state recovery in case of crashes. In-memory undo is extremely fast +#### but should a crash occur everything is lost. +#### It is highly recommended to keep undo on disk. +#### Default: disk +# set undo_type disk + +########################################################################### +#### CUSTOM GRID / SNAP VALUE SETTINGS +########################################################################### +#### Warning: changing these values will likely break compatibility +#### with existing symbol libraries. Defaults: grid 20, snap 10. +# set cadgrid 20 +# set cadsnap 10 + +########################################################################### +#### CUSTOM COLORS MAY BE DEFINED HERE +########################################################################### +# set cadlayers 22 +# set light_colors { +# "#ffffff" "#0044ee" "#aaaaaa" "#222222" "#229900" +# "#bb2200" "#00ccee" "#ff0000" "#888800" "#00aaaa" +# "#880088" "#00ff00" "#0000cc" "#666600" "#557755" +# "#aa2222" "#7ccc40" "#00ffcc" "#ce0097" "#d2d46b" +# "#ef6158" "#fdb200" } + +# set dark_colors { +# "#000000" "#00ccee" "#3f3f3f" "#cccccc" "#88dd00" +# "#bb2200" "#00ccee" "#ff0000" "#ffff00" "#ffffff" +# "#ff00ff" "#00ff00" "#0000cc" "#aaaa00" "#aaccaa" +# "#ff7777" "#bfff81" "#00ffcc" "#ce0097" "#d2d46b" +# "#ef6158" "#fdb200" } + +########################################################################### +#### CAIRO STUFF +########################################################################### +#### Scale all fonts by this number +# set cairo_font_scale 1.0 + +#### default for following two is 0.85 (xscale) and 0.88 (yscale) to +#### match cairo font spacing +# set nocairo_font_xscale 1.0 +#### set nocairo_font_yscale 1.0 + +#### Scale line spacing by this number +# set cairo_font_line_spacing 1.0 + +#### Specify a font +# set cairo_font_name {Sans-Serif} +# set svg_font_name {Sans-Serif} + +#### Lift up text by some zoom-corrected pixels for +#### better compatibility wrt no cairo version. +#### Useful values in the range [-1, 3] +# set cairo_vert_correct 0 +# set nocairo_vert_correct 0 + +########################################################################### +#### KEYBINDINGS +########################################################################### +#### General format for specifying a replacement for a keybind +#### Replace Ctrl-q with Escape (so you wont kill the program) +# set replace_key(Control-q) Escape + +#### swap w and W keybinds; Always specify Shift for capital letters +# set replace_key(Shift-W) Key-w +# set replace_key(Key-w) Shift-W + +########################################################################### +#### TERMINAL +########################################################################### +#### default for linux: xterm +# set terminal {xterm -geometry 100x35 -fn 9x15 -bg black -fg white -cr white -ms white } +#### lxterminal is not OK since it will not inherit env vars: +#### In order to reduce memory usage and increase the performance, all instances +#### of the lxterminal are sharing a single process. LXTerminal is part of LXDE + +########################################################################### +#### EDITOR +########################################################################### +#### editor must not detach from launching shell (-f mandatory for gvim) +#### default for linux: gvim -f +# set editor {gvim -f -geometry 90x28} +# set editor { xterm -geometry 100x40 -e nano } +# set editor { xterm -geometry 100x40 -e pico } + +#### For Windows +# set editor {notepad.exe} + +########################################################################### +#### SHOW ERC INFO WINDOW (erc errors, warnings etc) +########################################################################### +#### default: 0 (can be enabled by menu) +# set show_infowindow 0 + +########################################################################### +#### TCP CONNECTION WITH GAW +########################################################################### +#### set gaw address for socket connection: {host port} +#### default: set to localhost, port 2020 +# set gaw_tcp_address {localhost 2020} + +########################################################################### +#### XSCHEM LISTEN TO TCP PORT +########################################################################### +#### set xschem listening port; default: not enabled +set xschem_listen_port 2021 + +########################################################################### +#### BESPICE WAVE SOCKET CONNECTION +########################################################################### +#### set bespice wave listening port; default: not enabled +set bespice_listen_port 2022 + +########################################################################### +#### TCL FILES TO LOAD AT STARTUP +########################################################################### +#### list of tcl files to preload. +# lappend tcl_files ${XSCHEM_SHAREDIR}/change_index.tcl +lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl +# lappend tcl_files $env(HOME)/.xschem/bindings.tcl +########################################################################### +#### WEB URL DOWNLOAD HELPER APPLICATION +########################################################################### +#### used to download files from web: default: {curl -f -s -O} +# set download_url_helper {curl -f -s -O} +# set download_url_helper {wget -N --quiet} + +########################################################################### +#### XSCHEM TOOLBAR +########################################################################### +#### default: not enabled. +set toolbar_visible 1 +set toolbar_horiz 1 + +########################################################################### +#### TABBED WINDOWS +########################################################################### +# default: not enabled. Interface can be changed runtime if only one window +# or tab is open. +set tabbed_interface 1 + +########################################################################### +#### CASE INSENSITIVE SYMBOL LOOKUP +########################################################################### +## this option might be useful on filesystems that are case insensitive and +## on designs ported from windows where case of file names does not matter. +## if this option is set symbol lookup will be case insensitive, +## so a symbol reference 'AMPLI.SYM' will match with 'ampli.sym' or +## Amply.sym on disk. File system must be case insensitive for this to work, +## like FAT32 or NTFS. +## Do not set this option if you don't know what you are doing. +## Default: not enabled (0) +# set case_insensitive 1 + +########################################################################### +#### HIDE GRAPHS IF NO SPICE DATA LOADED +########################################################################### +## if enabled graphs will be hidden if no data is loaded. +## default: not enabled (0) +set hide_empty_graphs 0 + +########################################################################### +#### SHOW HIDDEN TEXTS +########################################################################### +## This option shows text objects even if they have attribute 'hide=true' set +## default: 0 (not set) +# set show_hidden_texts 1 + +########################################################################### +#### LIVE BACKANNOTATION OF DATA AT CURSOR 2 (B) POSITION +########################################################################### +## if enabled will backannotate values in schematic at cursor 'b' position +## in graph. Default: not enabled (0) +set live_cursor2_backannotate 1 +