From 2e7eb9e38bbb2285ffc27a2ab8985fba287d0581 Mon Sep 17 00:00:00 2001 From: stefan schippers Date: Thu, 27 Apr 2023 01:14:10 +0200 Subject: [PATCH] instance based schematic selection: place get_additional_symbols(1) after every load_schematic() to consistently add new virtual symbols for every instance based "schematic" attribute across the whole hierarchy. This is done for all netlisting code and hier_psprint() --- src/spice_netlist.c | 2 ++ src/tedax_netlist.c | 1 + src/verilog_netlist.c | 1 + src/vhdl_netlist.c | 1 + 4 files changed, 5 insertions(+) diff --git a/src/spice_netlist.c b/src/spice_netlist.c index 2fa2f384..5f50323f 100644 --- a/src/spice_netlist.c +++ b/src/spice_netlist.c @@ -93,6 +93,7 @@ void hier_psprint(char **res, int what) /* netlister driver */ /* for printing we go down to bottom regardless of spice_stop attribute */ dbg(1, "hier_psprint(): loading file: |%s|\n", filename); load_schematic(1,filename, 0, 1); + get_additional_symbols(1); zoom_full(0, 0, 1, 0.97); if(what & 1) ps_draw(2); /* page */ if(what & 2) { /* print cellname */ @@ -577,6 +578,7 @@ int spice_block_netlist(FILE *fd, int i) fprintf(fd, "\n"); spice_stop ? load_schematic(0,filename, 0, 1) : load_schematic(1,filename, 0, 1); + get_additional_symbols(1); err |= spice_netlist(fd, spice_stop); /* 20111113 added spice_stop */ if(xctx->schprop && xctx->schprop[0]) { diff --git a/src/tedax_netlist.c b/src/tedax_netlist.c index 5b2dee17..c7bad0fc 100644 --- a/src/tedax_netlist.c +++ b/src/tedax_netlist.c @@ -108,6 +108,7 @@ static int tedax_block_netlist(FILE *fd, int i) my_free(_ALLOC_ID_, &extra); fprintf(fd, "\n"); load_schematic(1,filename, 0, 1); + get_additional_symbols(1); err |= tedax_netlist(fd, tedax_stop); xctx->netlist_count++; diff --git a/src/verilog_netlist.c b/src/verilog_netlist.c index 3eddea01..6c7809f8 100644 --- a/src/verilog_netlist.c +++ b/src/verilog_netlist.c @@ -467,6 +467,7 @@ int verilog_block_netlist(FILE *fd, int i) my_strdup(_ALLOC_ID_, &extra2, get_tok_value(xctx->sym[i].prop_ptr, "verilog_extra", 0)); fprintf(fd, "// sch_path: %s\n", sanitized_abs_sym_path(filename, "")); verilog_stop? load_schematic(0,filename, 0, 1) : load_schematic(1,filename, 0, 1); + get_additional_symbols(1); /* print verilog timescale and preprocessor directives 10102004 */ fmt_attr = xctx->format ? xctx->format : "verilog_format"; for(j=0;jinstances; ++j) diff --git a/src/vhdl_netlist.c b/src/vhdl_netlist.c index 046b8865..d651d971 100644 --- a/src/vhdl_netlist.c +++ b/src/vhdl_netlist.c @@ -560,6 +560,7 @@ int vhdl_block_netlist(FILE *fd, int i) Int_hashtable table = {NULL, 0}; fprintf(fd, "-- sch_path: %s\n", sanitized_abs_sym_path(filename, "")); load_schematic(1,filename, 0, 1); + get_additional_symbols(1); dbg(1, "vhdl_block_netlist(): packages\n"); for(l=0;linstances; ++l) {