From 26fbb82f6b24efc7fd52751d11e60c7acdf7b3e2 Mon Sep 17 00:00:00 2001 From: stefan schippers Date: Mon, 27 Nov 2023 00:01:45 +0100 Subject: [PATCH] fix unwanted head_undo_ptr change when doing a netlist. Add current backannotation info in capa.sym, ind.sym, isource.sym, isource_table.sym --- src/save.c | 2 ++ src/scheduler.c | 17 +---------------- src/token.c | 4 ++++ xschem_library/devices/capa.sym | 3 ++- xschem_library/devices/ind.sym | 3 ++- xschem_library/devices/isource.sym | 3 ++- xschem_library/devices/isource_table.sym | 3 ++- xschem_library/ngspice/solar_panel.sch | 11 ++++++++--- 8 files changed, 23 insertions(+), 23 deletions(-) diff --git a/src/save.c b/src/save.c index 306bb04d..efd4ddab 100644 --- a/src/save.c +++ b/src/save.c @@ -3046,6 +3046,8 @@ void pop_undo(int redo, int set_modify_status) xctx->head_undo_ptr--; xctx->cur_undo_ptr--; } + /* was incremented by a previous push_undo() in netlisting code, so restore */ + if(redo == 4 && xctx->head_undo_ptr == xctx->cur_undo_ptr) xctx->head_undo_ptr--; if(xctx->cur_undo_ptr<=0) return; /* check undo tail */ xctx->cur_undo_ptr--; } else { /* redo == 2, get data without changing undo stack */ diff --git a/src/scheduler.c b/src/scheduler.c index d6d6003f..7e992fc7 100644 --- a/src/scheduler.c +++ b/src/scheduler.c @@ -4806,24 +4806,9 @@ int xschem(ClientData clientdata, Tcl_Interp *interp, int argc, const char * arg Tcl_ResetResult(interp); } else if(argc > 2 && atoi(argv[2]) == 2) { - copy_hierarchy_data(".drw", ".x1.drw"); + dbg(0, "cur=%d, tail=%d, head=%d\n", xctx->cur_undo_ptr, xctx->tail_undo_ptr, xctx->head_undo_ptr); Tcl_ResetResult(interp); } - else if(argc > 2 && atoi(argv[2]) == 3) { - Xschem_ctx **save_xctx = get_save_xctx(); - save_xctx[1]->raw = save_xctx[0]->raw; - Tcl_ResetResult(interp); - } - else if(argc > 2 && atoi(argv[2]) == 4) { - Xschem_ctx **save_xctx = get_save_xctx(); - save_xctx[1]->raw = NULL; - Tcl_ResetResult(interp); - } - else if(argc > 2 && atoi(argv[2]) == 5) { - Xschem_ctx **save_xctx = get_save_xctx(); - Tcl_SetResult(interp, save_xctx[1]->raw == NULL ? "null" : "not null", TCL_VOLATILE); - - } } /* text x y rot flip text props size draw diff --git a/src/token.c b/src/token.c index cde05a9d..9d87060b 100644 --- a/src/token.c +++ b/src/token.c @@ -3765,6 +3765,8 @@ const char *translate(int inst, const char* s) if(vsource) my_snprintf(fqdev, len, "i(%c.%s%s.%s)", prefix, path, instname, dev); else if(prefix == 'd') my_snprintf(fqdev, len, "i(@%c.%s%s.%s[id])", prefix, path, instname, dev); + else if(prefix == 'i') + my_snprintf(fqdev, len, "i(@%c.%s%s.%s[current])", prefix, path, instname, dev); else my_snprintf(fqdev, len, "i(@%c.%s%s.%s[i])", prefix, path, instname, dev); } else { my_snprintf(fqdev, len, "i(%s%s.%s)", path, instname, dev); @@ -3886,10 +3888,12 @@ const char *translate(int inst, const char* s) if(path[0]) { if(vsource) my_snprintf(fqdev, len, "i(%c.%s%s)", prefix, path, dev); else if(prefix=='d') my_snprintf(fqdev, len, "i(@%c.%s%s[id])", prefix, path, dev); + else if(prefix=='i') my_snprintf(fqdev, len, "i(@%c.%s%s[current])", prefix, path, dev); else my_snprintf(fqdev, len, "i(@%c.%s%s[i])", prefix, path, dev); } else { if(vsource) my_snprintf(fqdev, len, "i(%s)", dev); else if(prefix == 'd') my_snprintf(fqdev, len, "i(@%s[id])", dev); + else if(prefix == 'i') my_snprintf(fqdev, len, "i(@%s[current])", dev); else my_snprintf(fqdev, len, "i(@%s[i])", dev); } } else { diff --git a/xschem_library/devices/capa.sym b/xschem_library/devices/capa.sym index c5dc3c3d..c9162478 100644 --- a/xschem_library/devices/capa.sym +++ b/xschem_library/devices/capa.sym @@ -1,4 +1,4 @@ -v {xschem version=3.4.4 file_version=1.2 +v {xschem version=3.4.5 file_version=1.2 * * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit @@ -52,3 +52,4 @@ T {@value} 15 -6.25 0 0 0.2 0.2 {} T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15} T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15} T {m=@m} 15 6.25 0 0 0.2 0.2 {} +T {@spice_get_current} -2.5 5 0 1 0.2 0.2 {layer=15} diff --git a/xschem_library/devices/ind.sym b/xschem_library/devices/ind.sym index cb308d4d..175cf90c 100644 --- a/xschem_library/devices/ind.sym +++ b/xschem_library/devices/ind.sym @@ -1,4 +1,4 @@ -v {xschem version=3.4.4 file_version=1.2 +v {xschem version=3.4.5 file_version=1.2 * * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit @@ -50,3 +50,4 @@ T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15} T {@name} 15 -18.75 0 0 0.2 0.2 {} T {@value} 15 -3.75 0 0 0.2 0.2 {} T {m=@m} 15 11.25 0 0 0.2 0.2 {} +T {@spice_get_current} -12.5 5 0 1 0.2 0.2 {layer=15} diff --git a/xschem_library/devices/isource.sym b/xschem_library/devices/isource.sym index dfadfb34..4257d0b9 100644 --- a/xschem_library/devices/isource.sym +++ b/xschem_library/devices/isource.sym @@ -1,4 +1,4 @@ -v {xschem version=3.4.4 file_version=1.2 +v {xschem version=3.4.5 file_version=1.2 * * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit @@ -38,3 +38,4 @@ T {@name @value} 20 -10 0 0 0.2 0.2 {} T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15} T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15} +T {@spice_get_current} -4.375 15 0 1 0.2 0.2 {layer=15} diff --git a/xschem_library/devices/isource_table.sym b/xschem_library/devices/isource_table.sym index 8b78fca8..a44cd963 100644 --- a/xschem_library/devices/isource_table.sym +++ b/xschem_library/devices/isource_table.sym @@ -1,4 +1,4 @@ -v {xschem version=3.4.4 file_version=1.2 +v {xschem version=3.4.5 file_version=1.2 * * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit @@ -41,3 +41,4 @@ T {@CTRL @TABLE} 20 0 0 0 0.2 0.2 {} T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15} T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15} +T {@spice_get_current} -8.75 15 0 1 0.2 0.2 {layer=15} diff --git a/xschem_library/ngspice/solar_panel.sch b/xschem_library/ngspice/solar_panel.sch index 452b622f..7425cf04 100644 --- a/xschem_library/ngspice/solar_panel.sch +++ b/xschem_library/ngspice/solar_panel.sch @@ -98,8 +98,8 @@ jpeg_quality=30 linewidth_mult=2.0 hilight_wave=-1} B 2 1260 -390 1680 -220 {flags=graph -y1 = 0 -y2 = 6.7 +y1 = 3.35 +y2 = 10.05 divy = 4 subdivy=1 x1=5e-10 @@ -148,7 +148,8 @@ digital=0 ypos1=0.00261891 ypos2=0.51596 jpeg_quality=30 -linewidth_mult=2.0} +linewidth_mult=2.0 +} B 2 1260 -1140 1680 -950 {flags=graph y1 = 0 y2 = 1 @@ -206,6 +207,8 @@ T {@value} 985 -286.25 0 1 0.3 0.3 {layer=7 name=C1} T {m=@m} 985 -263.75 0 1 0.3 0.3 {layer=7 name=C1} T {Floater text example} 870 -440 0 0 0.4 0.4 {} +T {@spice_get_current} 875 -598.75 0 0 0.3 0.3 {layer=7 name=L2} +T {@spice_get_current} 1015 -268.75 0 0 0.3 0.3 {layer=7 name=C1} N 1010 -210 1100 -210 {lab=0} N 1100 -300 1100 -210 {lab=0} N 640 -610 730 -610 {lab=#net1} @@ -274,10 +277,12 @@ lab=0} C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers" net_name=true} C {code_shown.sym} 170 -310 0 0 {name=CONTROL value="tcleval( +.option savecurrents .control * example of tcl evaluation of code blocks: * current path: $path * schematic: [xschem get current_name] + save all tran .05u 1m uic write solar_panel.raw quit 0