diff --git a/scconfig/hooks.c b/scconfig/hooks.c index 65757fd6..ab9ba96d 100644 --- a/scconfig/hooks.c +++ b/scconfig/hooks.c @@ -297,12 +297,14 @@ int hook_detect_target() require("parsgen/bison/presents", 0, 1); require("libs/script/tk/*", 0, 1); /* this will also bring libs/script/tcl/* */ - if(!strstr(get("/host/libs/script/tcl/ldflags"),"-ltcl9.") && istrue(get("/local/xschem/debug"))) { - if(require("cc/argstd/std_c89", 0, 0) == 0) { - append("cc/cflags", " "); - append("cc/cflags", get("cc/argstd/std_c89")); - } - } + /* + * if(!strstr(get("/host/libs/script/tcl/ldflags"),"-ltcl9.") && istrue(get("/local/xschem/debug"))) { + * if(require("cc/argstd/std_c89", 0, 0) == 0) { + * append("cc/cflags", " "); + * append("cc/cflags", get("cc/argstd/std_c89")); + * } + * } + */ require("fstools/awk", 0, 1); require("libs/gui/xpm/*", 0, 1); diff --git a/src/actions.c b/src/actions.c index f51dc58d..efa24bd4 100644 --- a/src/actions.c +++ b/src/actions.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -218,7 +218,7 @@ int set_modify(int mod) void print_version() { printf("XSCHEM V%s\n", XSCHEM_VERSION); - printf("Copyright (C) 1998-2023 Stefan Schippers\n"); + printf("Copyright (C) 1998-2024 Stefan Schippers\n"); printf("\n"); printf("This is free software; see the source for copying conditions. There is NO\n"); printf("warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\n"); diff --git a/src/break.awk b/src/break.awk index e8db5253..fb1193c3 100755 --- a/src/break.awk +++ b/src/break.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/callback.c b/src/callback.c index c90cc5ab..352d223b 100644 --- a/src/callback.c +++ b/src/callback.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/change_ref.awk b/src/change_ref.awk index 58f8b66a..3ae1e6e9 100755 --- a/src/change_ref.awk +++ b/src/change_ref.awk @@ -1,4 +1,25 @@ #!/bin/sh +# +# File: change_ref.awk +# +# This file is part of XSCHEM, +# a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +# simulation. +# Copyright (C) 1998-2024 Stefan Frederik Schippers +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA awk ' BEGIN{ diff --git a/src/check.c b/src/check.c index 5ed485c8..69d8b35a 100644 --- a/src/check.c +++ b/src/check.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/clip.c b/src/clip.c index 0daa0642..95e3ee04 100644 --- a/src/clip.c +++ b/src/clip.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/convert_to_verilog2001.awk b/src/convert_to_verilog2001.awk index d4e86212..8c81c5e2 100755 --- a/src/convert_to_verilog2001.awk +++ b/src/convert_to_verilog2001.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/create_alloc_ids.awk b/src/create_alloc_ids.awk index c9710ff6..db26ae8c 100755 --- a/src/create_alloc_ids.awk +++ b/src/create_alloc_ids.awk @@ -1,4 +1,26 @@ #!/usr/bin/gawk -f +# +# File: create_alloc_ids.awk +# +# This file is part of XSCHEM, +# a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +# simulation. +# Copyright (C) 1998-2024 Stefan Frederik Schippers +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + # replaces _ALLOC_ID_ in all source files with unique ID for memory tracking BEGIN{ diff --git a/src/create_alloc_ids_windows.awk b/src/create_alloc_ids_windows.awk index bb93f275..24269c55 100644 --- a/src/create_alloc_ids_windows.awk +++ b/src/create_alloc_ids_windows.awk @@ -1,4 +1,26 @@ #!/usr/bin/gawk -f +# +# File: create_alloc_ids_windows.awk +# +# This file is part of XSCHEM, +# a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +# simulation. +# Copyright (C) 1998-2024 Stefan Frederik Schippers +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + # replaces _ALLOC_ID_ in all source files with unique ID for memory tracking BEGIN{ diff --git a/src/create_graph.tcl b/src/create_graph.tcl index b3346176..c5db207a 100644 --- a/src/create_graph.tcl +++ b/src/create_graph.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/create_symbol.tcl b/src/create_symbol.tcl index 896912cd..48b35491 100644 --- a/src/create_symbol.tcl +++ b/src/create_symbol.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/draw.c b/src/draw.c index 53488bcf..650d97dc 100644 --- a/src/draw.c +++ b/src/draw.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/editprop.c b/src/editprop.c index 95c950b7..23fe8230 100644 --- a/src/editprop.c +++ b/src/editprop.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/findnet.c b/src/findnet.c index 49448cb4..e5373fd8 100644 --- a/src/findnet.c +++ b/src/findnet.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/flatten.awk b/src/flatten.awk index 2bb19d63..cdaf768d 100755 --- a/src/flatten.awk +++ b/src/flatten.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/flatten_savenodes.awk b/src/flatten_savenodes.awk index 85399b22..195d6593 100755 --- a/src/flatten_savenodes.awk +++ b/src/flatten_savenodes.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/flatten_tedax.awk b/src/flatten_tedax.awk index 3a77ffc0..0999ac5c 100755 --- a/src/flatten_tedax.awk +++ b/src/flatten_tedax.awk @@ -1,4 +1,26 @@ #!/usr/bin/awk -f +# +# File: flatten_tedax.awk +# +# This file is part of XSCHEM, +# a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +# simulation. +# Copyright (C) 1998-2024 Stefan Frederik Schippers +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + BEGIN{ first = 1 diff --git a/src/font.c b/src/font.c index 749b563e..372f8b5a 100644 --- a/src/font.c +++ b/src/font.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/globals.c b/src/globals.c index 21ed5e75..36c2984a 100644 --- a/src/globals.c +++ b/src/globals.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/gschemtoxschem.awk b/src/gschemtoxschem.awk index 6adbeaa0..d09cc30c 100755 --- a/src/gschemtoxschem.awk +++ b/src/gschemtoxschem.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/hash_iterator.c b/src/hash_iterator.c index 9334f7c4..a76b50e7 100644 --- a/src/hash_iterator.c +++ b/src/hash_iterator.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/hilight.c b/src/hilight.c index 550671f7..b4a84303 100644 --- a/src/hilight.c +++ b/src/hilight.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/hspice_backannotate.tcl b/src/hspice_backannotate.tcl index 24ad513a..5f29b7f6 100644 --- a/src/hspice_backannotate.tcl +++ b/src/hspice_backannotate.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/icon.c b/src/icon.c index 1202665e..9c599e9c 100644 --- a/src/icon.c +++ b/src/icon.c @@ -4,7 +4,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/in_memory_undo.c b/src/in_memory_undo.c index 07497d74..4d2561ca 100644 --- a/src/in_memory_undo.c +++ b/src/in_memory_undo.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/main.c b/src/main.c index e501e19f..f3a5d07d 100644 --- a/src/main.c +++ b/src/main.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/make_sch_from_spice.awk b/src/make_sch_from_spice.awk index d9359216..d009e19d 100755 --- a/src/make_sch_from_spice.awk +++ b/src/make_sch_from_spice.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/make_sym.awk b/src/make_sym.awk index e5aeb34e..93b0f940 100755 --- a/src/make_sym.awk +++ b/src/make_sym.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/make_sym_from_spice.awk b/src/make_sym_from_spice.awk index dfb4d582..64bb3a36 100755 --- a/src/make_sym_from_spice.awk +++ b/src/make_sym_from_spice.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/make_sym_lcc.awk b/src/make_sym_lcc.awk index 05596cdf..910140cb 100644 --- a/src/make_sym_lcc.awk +++ b/src/make_sym_lcc.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/move.c b/src/move.c index 6c06be17..ad8583eb 100644 --- a/src/move.c +++ b/src/move.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/netlist.c b/src/netlist.c index 512b94c0..303a7ebf 100644 --- a/src/netlist.c +++ b/src/netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/ngspice_backannotate.tcl b/src/ngspice_backannotate.tcl index 52e4f408..57044006 100644 --- a/src/ngspice_backannotate.tcl +++ b/src/ngspice_backannotate.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/node_hash.c b/src/node_hash.c index 015ea75b..1c0c816c 100644 --- a/src/node_hash.c +++ b/src/node_hash.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/options.c b/src/options.c index f218b717..84015594 100644 --- a/src/options.c +++ b/src/options.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/order_labels.awk b/src/order_labels.awk index 3f15084f..f32b75ed 100755 --- a/src/order_labels.awk +++ b/src/order_labels.awk @@ -1,4 +1,26 @@ #!/usr/bin/awk -f +# +# File: order_labels.awk +# +# This file is part of XSCHEM, +# a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +# simulation. +# Copyright (C) 1998-2024 Stefan Frederik Schippers +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + #------------------------ BEGIN{ i=0 diff --git a/src/paste.c b/src/paste.c index f462da7c..125905e9 100644 --- a/src/paste.c +++ b/src/paste.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/psprint.c b/src/psprint.c index 7adcd09c..8d8581be 100644 --- a/src/psprint.c +++ b/src/psprint.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/rawtovcd.c b/src/rawtovcd.c index ddcfb51a..75112d09 100644 --- a/src/rawtovcd.c +++ b/src/rawtovcd.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/resources.tcl b/src/resources.tcl index 8569c0f3..802c4ecb 100644 --- a/src/resources.tcl +++ b/src/resources.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/save.c b/src/save.c index c387eb5d..a5a3517e 100644 --- a/src/save.c +++ b/src/save.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -2589,8 +2589,13 @@ static void write_xschem_file(FILE *fd) char *header_ptr = xctx->header_text ? xctx->header_text : ""; tmpstring_size = strlen(header_ptr) + 100; tmpstring = my_malloc(_ALLOC_ID_, tmpstring_size); - my_snprintf(tmpstring, tmpstring_size, "xschem version=%s file_version=%s\n%s", - XSCHEM_VERSION, XSCHEM_FILE_VERSION, header_ptr); + if(xctx->header_text && xctx->header_text[0]) { + my_snprintf(tmpstring, tmpstring_size, "xschem version=%s file_version=%s\n%s", + XSCHEM_VERSION, XSCHEM_FILE_VERSION, header_ptr); + } else { + my_snprintf(tmpstring, tmpstring_size, "xschem version=%s file_version=%s", + XSCHEM_VERSION, XSCHEM_FILE_VERSION); + } fprintf(fd, "v "); save_ascii_string(tmpstring, fd, 1); my_free(_ALLOC_ID_, &tmpstring); diff --git a/src/scheduler.c b/src/scheduler.c index b35b2767..9a9b0368 100644 --- a/src/scheduler.c +++ b/src/scheduler.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/select.c b/src/select.c index 33f2b641..e08d58ed 100644 --- a/src/select.c +++ b/src/select.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/sort_labels.awk b/src/sort_labels.awk index 38a57df6..57219aa2 100755 --- a/src/sort_labels.awk +++ b/src/sort_labels.awk @@ -1,4 +1,25 @@ #!/usr/bin/awk -f +# +# File: sort_labels.awk +# +# This file is part of XSCHEM, +# a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +# simulation. +# Copyright (C) 1998-2024 Stefan Frederik Schippers +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA BEGIN{ for(i=0;i<=127;i++) diff --git a/src/spice.awk b/src/spice.awk index 4d3f5ce6..5dc7b170 100755 --- a/src/spice.awk +++ b/src/spice.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/spice_netlist.c b/src/spice_netlist.c index 974d85a9..169318f1 100644 --- a/src/spice_netlist.c +++ b/src/spice_netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/store.c b/src/store.c index 4fab716a..e9fed4f1 100644 --- a/src/store.c +++ b/src/store.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/svgdraw.c b/src/svgdraw.c index 47a21286..383f82ed 100644 --- a/src/svgdraw.c +++ b/src/svgdraw.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/symgen.awk b/src/symgen.awk index 57dae531..236a0db4 100755 --- a/src/symgen.awk +++ b/src/symgen.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/tedax.awk b/src/tedax.awk index b506df39..93521273 100755 --- a/src/tedax.awk +++ b/src/tedax.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/tedax_netlist.c b/src/tedax_netlist.c index 44fd52bc..961ea92e 100644 --- a/src/tedax_netlist.c +++ b/src/tedax_netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/token.c b/src/token.c index aeaf8721..a8dc2beb 100644 --- a/src/token.c +++ b/src/token.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/traversal.tcl b/src/traversal.tcl index c1705e54..4ccbe437 100644 --- a/src/traversal.tcl +++ b/src/traversal.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/verilog.awk b/src/verilog.awk index 09b94e6a..407d7590 100755 --- a/src/verilog.awk +++ b/src/verilog.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/verilog_netlist.c b/src/verilog_netlist.c index 0a8ec9bf..8fa681ed 100644 --- a/src/verilog_netlist.c +++ b/src/verilog_netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/vhdl.awk b/src/vhdl.awk index 63edf792..621e23f7 100755 --- a/src/vhdl.awk +++ b/src/vhdl.awk @@ -5,7 +5,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by diff --git a/src/vhdl_netlist.c b/src/vhdl_netlist.c index 5e395635..c3845d94 100644 --- a/src/vhdl_netlist.c +++ b/src/vhdl_netlist.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/xinit.c b/src/xinit.c index 5c52f029..1717a71f 100644 --- a/src/xinit.c +++ b/src/xinit.c @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/xschem.h b/src/xschem.h index cb9e3d57..86bb2de3 100644 --- a/src/xschem.h +++ b/src/xschem.h @@ -3,7 +3,7 @@ * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. - * Copyright (C) 1998-2023 Stefan Frederik Schippers + * Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/src/xschem.tcl b/src/xschem.tcl index 4aa10927..3c1e051c 100644 --- a/src/xschem.tcl +++ b/src/xschem.tcl @@ -4,7 +4,7 @@ # This file is part of XSCHEM, # a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit # simulation. -# Copyright (C) 1998-2023 Stefan Frederik Schippers +# Copyright (C) 1998-2024 Stefan Frederik Schippers # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -4720,7 +4720,7 @@ proc about {} { button .about.link2 -text {https://github.com/StefanSchippers/xschem} -font Underline-Font -fg blue -relief flat button .about.link3 -text {Online XSCHEM Manual} -font Underline-Font -fg blue -relief flat button .about.link4 -text {Local XSCHEM Manual} -font Underline-Font -fg blue -relief flat - label .about.copyright -text "\n Copyright (C) 1998-2023 Stefan Schippers (stefan.schippers@gmail.com) \n + label .about.copyright -text "\n Copyright (C) 1998-2024 Stefan Schippers (stefan.schippers@gmail.com) \n This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE\n" button .about.close -text Close -command {destroy .about} -font {Sans 18} diff --git a/xschem_library/binto7seg/bcd.sch b/xschem_library/binto7seg/bcd.sch index 2a028543..f6f73d74 100644 --- a/xschem_library/binto7seg/bcd.sch +++ b/xschem_library/binto7seg/bcd.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/bcd.sym b/xschem_library/binto7seg/bcd.sym index e29c3f81..fc6ee1c5 100644 --- a/xschem_library/binto7seg/bcd.sym +++ b/xschem_library/binto7seg/bcd.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/sevenseg.sch b/xschem_library/binto7seg/sevenseg.sch index 74563d05..e9387c8d 100644 --- a/xschem_library/binto7seg/sevenseg.sch +++ b/xschem_library/binto7seg/sevenseg.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/sevenseg.sym b/xschem_library/binto7seg/sevenseg.sym index 918f3f01..7d2cdbb9 100644 --- a/xschem_library/binto7seg/sevenseg.sym +++ b/xschem_library/binto7seg/sevenseg.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/sevenseg012.sch b/xschem_library/binto7seg/sevenseg012.sch index 8e9cd45b..9b915097 100644 --- a/xschem_library/binto7seg/sevenseg012.sch +++ b/xschem_library/binto7seg/sevenseg012.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/sevenseg012.sym b/xschem_library/binto7seg/sevenseg012.sym index b94d8d5d..677eef38 100644 --- a/xschem_library/binto7seg/sevenseg012.sym +++ b/xschem_library/binto7seg/sevenseg012.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/binto7seg/top.sch b/xschem_library/binto7seg/top.sch index acf77bd9..bafa0348 100644 --- a/xschem_library/binto7seg/top.sch +++ b/xschem_library/binto7seg/top.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/adc_bridge.sym b/xschem_library/devices/adc_bridge.sym index 6a04d7ba..6898624b 100644 --- a/xschem_library/devices/adc_bridge.sym +++ b/xschem_library/devices/adc_bridge.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ammeter.sym b/xschem_library/devices/ammeter.sym index 5f64a836..4bc75427 100644 --- a/xschem_library/devices/ammeter.sym +++ b/xschem_library/devices/ammeter.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/arch_declarations.sym b/xschem_library/devices/arch_declarations.sym index 7f286e2e..f8349a52 100644 --- a/xschem_library/devices/arch_declarations.sym +++ b/xschem_library/devices/arch_declarations.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/architecture.sym b/xschem_library/devices/architecture.sym index 142177e9..e6ef60e8 100644 --- a/xschem_library/devices/architecture.sym +++ b/xschem_library/devices/architecture.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/asrc.sym b/xschem_library/devices/asrc.sym index 5be8253f..3295525f 100644 --- a/xschem_library/devices/asrc.sym +++ b/xschem_library/devices/asrc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/assign.sym b/xschem_library/devices/assign.sym index 4c6cc136..e4fede84 100644 --- a/xschem_library/devices/assign.sym +++ b/xschem_library/devices/assign.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/attributes.sym b/xschem_library/devices/attributes.sym index b5dde789..807aa9a3 100644 --- a/xschem_library/devices/attributes.sym +++ b/xschem_library/devices/attributes.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/bsource.sym b/xschem_library/devices/bsource.sym index d20000c0..0ac4668a 100644 --- a/xschem_library/devices/bsource.sym +++ b/xschem_library/devices/bsource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/bus_connect.sym b/xschem_library/devices/bus_connect.sym index dbb23151..00ebd55b 100644 --- a/xschem_library/devices/bus_connect.sym +++ b/xschem_library/devices/bus_connect.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/bus_connect_nolab.sym b/xschem_library/devices/bus_connect_nolab.sym index 78319212..2f6922b4 100644 --- a/xschem_library/devices/bus_connect_nolab.sym +++ b/xschem_library/devices/bus_connect_nolab.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/bus_tap.sym b/xschem_library/devices/bus_tap.sym index 5fef876f..e155f137 100644 --- a/xschem_library/devices/bus_tap.sym +++ b/xschem_library/devices/bus_tap.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/capa-2.sym b/xschem_library/devices/capa-2.sym index 2a03e425..6ec439d8 100644 --- a/xschem_library/devices/capa-2.sym +++ b/xschem_library/devices/capa-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/capa.sym b/xschem_library/devices/capa.sym index 055cbed4..51d9efa6 100644 --- a/xschem_library/devices/capa.sym +++ b/xschem_library/devices/capa.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/cccs.sym b/xschem_library/devices/cccs.sym index 9a094aad..b9396139 100644 --- a/xschem_library/devices/cccs.sym +++ b/xschem_library/devices/cccs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ccvs.sym b/xschem_library/devices/ccvs.sym index 06cab189..99f521c9 100644 --- a/xschem_library/devices/ccvs.sym +++ b/xschem_library/devices/ccvs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/code.sym b/xschem_library/devices/code.sym index 94bffc3b..3e3523dc 100644 --- a/xschem_library/devices/code.sym +++ b/xschem_library/devices/code.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/code_shown.sym b/xschem_library/devices/code_shown.sym index dc392bf5..acb0b3bf 100644 --- a/xschem_library/devices/code_shown.sym +++ b/xschem_library/devices/code_shown.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_10x2.sym b/xschem_library/devices/conn_10x2.sym index f6b81343..296c36c0 100644 --- a/xschem_library/devices/conn_10x2.sym +++ b/xschem_library/devices/conn_10x2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_14x1.sym b/xschem_library/devices/conn_14x1.sym index 05ccf85c..de865e6b 100644 --- a/xschem_library/devices/conn_14x1.sym +++ b/xschem_library/devices/conn_14x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_3x1.sym b/xschem_library/devices/conn_3x1.sym index 9c6258e9..f0ba3a39 100644 --- a/xschem_library/devices/conn_3x1.sym +++ b/xschem_library/devices/conn_3x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_4x1.sym b/xschem_library/devices/conn_4x1.sym index 1473b3e9..7a54100c 100644 --- a/xschem_library/devices/conn_4x1.sym +++ b/xschem_library/devices/conn_4x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_6x1.sym b/xschem_library/devices/conn_6x1.sym index 28f8eaa5..cbc0052e 100644 --- a/xschem_library/devices/conn_6x1.sym +++ b/xschem_library/devices/conn_6x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/conn_8x1.sym b/xschem_library/devices/conn_8x1.sym index 9e0b788a..4205719d 100644 --- a/xschem_library/devices/conn_8x1.sym +++ b/xschem_library/devices/conn_8x1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/connect.sym b/xschem_library/devices/connect.sym index a93138b3..773613c9 100644 --- a/xschem_library/devices/connect.sym +++ b/xschem_library/devices/connect.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/connector.sym b/xschem_library/devices/connector.sym index 70d4b3fe..6b4a4353 100644 --- a/xschem_library/devices/connector.sym +++ b/xschem_library/devices/connector.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/crystal-2.sym b/xschem_library/devices/crystal-2.sym index 380fc4bf..6e83795f 100644 --- a/xschem_library/devices/crystal-2.sym +++ b/xschem_library/devices/crystal-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/crystal.sym b/xschem_library/devices/crystal.sym index 55e0a7e9..4016729a 100644 --- a/xschem_library/devices/crystal.sym +++ b/xschem_library/devices/crystal.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/dac_bridge.sym b/xschem_library/devices/dac_bridge.sym index 6ff32329..da7bef1c 100644 --- a/xschem_library/devices/dac_bridge.sym +++ b/xschem_library/devices/dac_bridge.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/delay.sym b/xschem_library/devices/delay.sym index 0a7b111d..32e314ae 100644 --- a/xschem_library/devices/delay.sym +++ b/xschem_library/devices/delay.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/delay_line.sym b/xschem_library/devices/delay_line.sym index 7c2c37d9..8532d779 100644 --- a/xschem_library/devices/delay_line.sym +++ b/xschem_library/devices/delay_line.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/device_param_probe.sym b/xschem_library/devices/device_param_probe.sym index 969d9af9..f2b7aef8 100644 --- a/xschem_library/devices/device_param_probe.sym +++ b/xschem_library/devices/device_param_probe.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/diode.sym b/xschem_library/devices/diode.sym index c9cc0b63..a6ffe7f7 100644 --- a/xschem_library/devices/diode.sym +++ b/xschem_library/devices/diode.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/flash_cell.sym b/xschem_library/devices/flash_cell.sym index f27c8c40..fd89bc41 100644 --- a/xschem_library/devices/flash_cell.sym +++ b/xschem_library/devices/flash_cell.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/generic_pin.sym b/xschem_library/devices/generic_pin.sym index 98e0d39a..dad70030 100644 --- a/xschem_library/devices/generic_pin.sym +++ b/xschem_library/devices/generic_pin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/gnd.sym b/xschem_library/devices/gnd.sym index 0194ae92..9a28439e 100644 --- a/xschem_library/devices/gnd.sym +++ b/xschem_library/devices/gnd.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ic.sym b/xschem_library/devices/ic.sym index e7e82677..590b2d59 100644 --- a/xschem_library/devices/ic.sym +++ b/xschem_library/devices/ic.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ind.sym b/xschem_library/devices/ind.sym index 4f7124c8..b645c028 100644 --- a/xschem_library/devices/ind.sym +++ b/xschem_library/devices/ind.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/intuitive_interface_cheatsheet.sch b/xschem_library/devices/intuitive_interface_cheatsheet.sch index 35e52d27..e91bae65 100644 --- a/xschem_library/devices/intuitive_interface_cheatsheet.sch +++ b/xschem_library/devices/intuitive_interface_cheatsheet.sch @@ -1,4 +1,23 @@ -v {xschem version=3.4.5 file_version=1.2 +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA } G {} K {} diff --git a/xschem_library/devices/intuitive_interface_cheatsheet.sym b/xschem_library/devices/intuitive_interface_cheatsheet.sym index d41c64f7..b8a5b301 100644 --- a/xschem_library/devices/intuitive_interface_cheatsheet.sym +++ b/xschem_library/devices/intuitive_interface_cheatsheet.sym @@ -1,4 +1,23 @@ -v {xschem version=3.4.5 file_version=1.2 +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA } G {} K {type=subcircuit diff --git a/xschem_library/devices/iopin.sym b/xschem_library/devices/iopin.sym index b8cdfc8a..f46f5b37 100644 --- a/xschem_library/devices/iopin.sym +++ b/xschem_library/devices/iopin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ipin.sym b/xschem_library/devices/ipin.sym index fca509fb..22957839 100644 --- a/xschem_library/devices/ipin.sym +++ b/xschem_library/devices/ipin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/isource.sym b/xschem_library/devices/isource.sym index f080695f..f189867e 100644 --- a/xschem_library/devices/isource.sym +++ b/xschem_library/devices/isource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/isource_arith.sym b/xschem_library/devices/isource_arith.sym index c927b2c7..01ea4a99 100644 --- a/xschem_library/devices/isource_arith.sym +++ b/xschem_library/devices/isource_arith.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/isource_pwl.sym b/xschem_library/devices/isource_pwl.sym index 894267e6..2c9a47a5 100644 --- a/xschem_library/devices/isource_pwl.sym +++ b/xschem_library/devices/isource_pwl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/isource_table.sym b/xschem_library/devices/isource_table.sym index e0ed254a..4ce95cf7 100644 --- a/xschem_library/devices/isource_table.sym +++ b/xschem_library/devices/isource_table.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/jumper.sym b/xschem_library/devices/jumper.sym index 1e56866d..68b1c87d 100644 --- a/xschem_library/devices/jumper.sym +++ b/xschem_library/devices/jumper.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/k.sym b/xschem_library/devices/k.sym index ae74a232..e4d47809 100644 --- a/xschem_library/devices/k.sym +++ b/xschem_library/devices/k.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/lab_generic.sym b/xschem_library/devices/lab_generic.sym index a231a837..dae6e28b 100644 --- a/xschem_library/devices/lab_generic.sym +++ b/xschem_library/devices/lab_generic.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/lab_pin.sym b/xschem_library/devices/lab_pin.sym index e0bcc2fc..0f7182f3 100644 --- a/xschem_library/devices/lab_pin.sym +++ b/xschem_library/devices/lab_pin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/lab_show.sym b/xschem_library/devices/lab_show.sym index f9fc3a68..c2747b6e 100644 --- a/xschem_library/devices/lab_show.sym +++ b/xschem_library/devices/lab_show.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/lab_wire.sym b/xschem_library/devices/lab_wire.sym index 704c6f67..b779491c 100644 --- a/xschem_library/devices/lab_wire.sym +++ b/xschem_library/devices/lab_wire.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/launcher.sym b/xschem_library/devices/launcher.sym index b643db18..5a730289 100644 --- a/xschem_library/devices/launcher.sym +++ b/xschem_library/devices/launcher.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/led.sym b/xschem_library/devices/led.sym index c5b2c4c6..eb6fc83d 100644 --- a/xschem_library/devices/led.sym +++ b/xschem_library/devices/led.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist.sym b/xschem_library/devices/netlist.sym index 8f2b96fa..52ce8b9f 100644 --- a/xschem_library/devices/netlist.sym +++ b/xschem_library/devices/netlist.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist_at_end.sym b/xschem_library/devices/netlist_at_end.sym index 4fdfbec0..2344601b 100644 --- a/xschem_library/devices/netlist_at_end.sym +++ b/xschem_library/devices/netlist_at_end.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist_not_shown.sym b/xschem_library/devices/netlist_not_shown.sym index b7bb9d1c..78e74e2d 100644 --- a/xschem_library/devices/netlist_not_shown.sym +++ b/xschem_library/devices/netlist_not_shown.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist_not_shown_at_end.sym b/xschem_library/devices/netlist_not_shown_at_end.sym index 85970fb4..0096e6bd 100644 --- a/xschem_library/devices/netlist_not_shown_at_end.sym +++ b/xschem_library/devices/netlist_not_shown_at_end.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/netlist_options.sym b/xschem_library/devices/netlist_options.sym index 892e61aa..0777793c 100644 --- a/xschem_library/devices/netlist_options.sym +++ b/xschem_library/devices/netlist_options.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ngspice_analog_delay.sym b/xschem_library/devices/ngspice_analog_delay.sym index e2d12dca..1c950342 100644 --- a/xschem_library/devices/ngspice_analog_delay.sym +++ b/xschem_library/devices/ngspice_analog_delay.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ngspice_get_expr.sym b/xschem_library/devices/ngspice_get_expr.sym index 8bccac59..3fe01250 100644 --- a/xschem_library/devices/ngspice_get_expr.sym +++ b/xschem_library/devices/ngspice_get_expr.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ngspice_get_value.sym b/xschem_library/devices/ngspice_get_value.sym index 6c6e0ed5..9c923d2f 100644 --- a/xschem_library/devices/ngspice_get_value.sym +++ b/xschem_library/devices/ngspice_get_value.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/ngspice_probe.sym b/xschem_library/devices/ngspice_probe.sym index 84b64e81..12d23cc1 100644 --- a/xschem_library/devices/ngspice_probe.sym +++ b/xschem_library/devices/ngspice_probe.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/njfet.sym b/xschem_library/devices/njfet.sym index 72158637..07156add 100644 --- a/xschem_library/devices/njfet.sym +++ b/xschem_library/devices/njfet.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos-sub.sym b/xschem_library/devices/nmos-sub.sym index dea96495..d76f29da 100644 --- a/xschem_library/devices/nmos-sub.sym +++ b/xschem_library/devices/nmos-sub.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos.sym b/xschem_library/devices/nmos.sym index e8856874..ccfdf0ea 100644 --- a/xschem_library/devices/nmos.sym +++ b/xschem_library/devices/nmos.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos3.sym b/xschem_library/devices/nmos3.sym index fb65101c..948cb085 100644 --- a/xschem_library/devices/nmos3.sym +++ b/xschem_library/devices/nmos3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos4.sym b/xschem_library/devices/nmos4.sym index c269d105..601cfd77 100644 --- a/xschem_library/devices/nmos4.sym +++ b/xschem_library/devices/nmos4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/nmos4_depl.sym b/xschem_library/devices/nmos4_depl.sym index adda7831..dc41a876 100644 --- a/xschem_library/devices/nmos4_depl.sym +++ b/xschem_library/devices/nmos4_depl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/noconn.sym b/xschem_library/devices/noconn.sym index 20dd30ac..1fe4a887 100644 --- a/xschem_library/devices/noconn.sym +++ b/xschem_library/devices/noconn.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/npn.sym b/xschem_library/devices/npn.sym index ae45c71b..d511bdc3 100644 --- a/xschem_library/devices/npn.sym +++ b/xschem_library/devices/npn.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/opin.sym b/xschem_library/devices/opin.sym index 409931de..4e81f4f0 100644 --- a/xschem_library/devices/opin.sym +++ b/xschem_library/devices/opin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/package.sym b/xschem_library/devices/package.sym index 8ad289e2..fb060db9 100644 --- a/xschem_library/devices/package.sym +++ b/xschem_library/devices/package.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/package_not_shown.sym b/xschem_library/devices/package_not_shown.sym index 2220100b..d0a35aaf 100644 --- a/xschem_library/devices/package_not_shown.sym +++ b/xschem_library/devices/package_not_shown.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/param.sym b/xschem_library/devices/param.sym index 8492030e..8966d48b 100644 --- a/xschem_library/devices/param.sym +++ b/xschem_library/devices/param.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/param_agauss.sym b/xschem_library/devices/param_agauss.sym index 8ea678f5..f739d1c7 100644 --- a/xschem_library/devices/param_agauss.sym +++ b/xschem_library/devices/param_agauss.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/parax_cap.sym b/xschem_library/devices/parax_cap.sym index ac709aa1..1c9e64ed 100644 --- a/xschem_library/devices/parax_cap.sym +++ b/xschem_library/devices/parax_cap.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pjfet.sym b/xschem_library/devices/pjfet.sym index 84dd8abf..e1a46bce 100644 --- a/xschem_library/devices/pjfet.sym +++ b/xschem_library/devices/pjfet.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmos-sub.sym b/xschem_library/devices/pmos-sub.sym index e396cb8d..cf14e591 100644 --- a/xschem_library/devices/pmos-sub.sym +++ b/xschem_library/devices/pmos-sub.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmos.sym b/xschem_library/devices/pmos.sym index 1f5604f1..8b5f9cb6 100644 --- a/xschem_library/devices/pmos.sym +++ b/xschem_library/devices/pmos.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmos3.sym b/xschem_library/devices/pmos3.sym index 321a7bae..e80cae87 100644 --- a/xschem_library/devices/pmos3.sym +++ b/xschem_library/devices/pmos3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmos4.sym b/xschem_library/devices/pmos4.sym index c51b7501..03ba35e8 100644 --- a/xschem_library/devices/pmos4.sym +++ b/xschem_library/devices/pmos4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmoshv4.sym b/xschem_library/devices/pmoshv4.sym index 42e31c05..d9b6d75f 100644 --- a/xschem_library/devices/pmoshv4.sym +++ b/xschem_library/devices/pmoshv4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pmosnat.sym b/xschem_library/devices/pmosnat.sym index 69f281fc..e1aff7d8 100644 --- a/xschem_library/devices/pmosnat.sym +++ b/xschem_library/devices/pmosnat.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/pnp.sym b/xschem_library/devices/pnp.sym index ae9c0654..247d319e 100644 --- a/xschem_library/devices/pnp.sym +++ b/xschem_library/devices/pnp.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/port_attributes.sym b/xschem_library/devices/port_attributes.sym index a49a18df..707433f0 100644 --- a/xschem_library/devices/port_attributes.sym +++ b/xschem_library/devices/port_attributes.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/res.sym b/xschem_library/devices/res.sym index 6550b6ff..d526d7c3 100644 --- a/xschem_library/devices/res.sym +++ b/xschem_library/devices/res.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/res3.sym b/xschem_library/devices/res3.sym index 19c36e3c..60cc0045 100644 --- a/xschem_library/devices/res3.sym +++ b/xschem_library/devices/res3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/res_ac.sym b/xschem_library/devices/res_ac.sym index 2d435907..d8253016 100644 --- a/xschem_library/devices/res_ac.sym +++ b/xschem_library/devices/res_ac.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/rgb_led.sym b/xschem_library/devices/rgb_led.sym index 1180cd88..2da78bda 100644 --- a/xschem_library/devices/rgb_led.sym +++ b/xschem_library/devices/rgb_led.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/rnmos4.sym b/xschem_library/devices/rnmos4.sym index 7ece35e1..0a416d9c 100644 --- a/xschem_library/devices/rnmos4.sym +++ b/xschem_library/devices/rnmos4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/short.sym b/xschem_library/devices/short.sym index 3de083c0..0a582a19 100644 --- a/xschem_library/devices/short.sym +++ b/xschem_library/devices/short.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/simulator_commands.sym b/xschem_library/devices/simulator_commands.sym index f15ca8a0..ee2879f3 100644 --- a/xschem_library/devices/simulator_commands.sym +++ b/xschem_library/devices/simulator_commands.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/simulator_commands_shown.sym b/xschem_library/devices/simulator_commands_shown.sym index ca00873a..52556243 100644 --- a/xschem_library/devices/simulator_commands_shown.sym +++ b/xschem_library/devices/simulator_commands_shown.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/spice_probe.sym b/xschem_library/devices/spice_probe.sym index dd566763..8d73a419 100644 --- a/xschem_library/devices/spice_probe.sym +++ b/xschem_library/devices/spice_probe.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/spice_probe_vdiff.sym b/xschem_library/devices/spice_probe_vdiff.sym index 6dd2e335..243d235c 100644 --- a/xschem_library/devices/spice_probe_vdiff.sym +++ b/xschem_library/devices/spice_probe_vdiff.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/sqwsource.sym b/xschem_library/devices/sqwsource.sym index 59cdee06..d88e3cfd 100644 --- a/xschem_library/devices/sqwsource.sym +++ b/xschem_library/devices/sqwsource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/switch.sym b/xschem_library/devices/switch.sym index 7154a9a6..11515746 100644 --- a/xschem_library/devices/switch.sym +++ b/xschem_library/devices/switch.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/switch_ngspice.sym b/xschem_library/devices/switch_ngspice.sym index 3f183118..4f4e2fe1 100644 --- a/xschem_library/devices/switch_ngspice.sym +++ b/xschem_library/devices/switch_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/switch_v_xyce.sym b/xschem_library/devices/switch_v_xyce.sym index 13d5f13a..c1f662dc 100644 --- a/xschem_library/devices/switch_v_xyce.sym +++ b/xschem_library/devices/switch_v_xyce.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/title-2.sym b/xschem_library/devices/title-2.sym index 207010bb..44647c9b 100644 --- a/xschem_library/devices/title-2.sym +++ b/xschem_library/devices/title-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/title-3.sym b/xschem_library/devices/title-3.sym index 5571c075..ac4fc6cc 100644 --- a/xschem_library/devices/title-3.sym +++ b/xschem_library/devices/title-3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/title.sym b/xschem_library/devices/title.sym index 97c55707..744f468c 100644 --- a/xschem_library/devices/title.sym +++ b/xschem_library/devices/title.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/use.sym b/xschem_library/devices/use.sym index 82ad6cb9..f6969cfa 100644 --- a/xschem_library/devices/use.sym +++ b/xschem_library/devices/use.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/var_res.sym b/xschem_library/devices/var_res.sym index bb4b8b82..a4c25ae9 100644 --- a/xschem_library/devices/var_res.sym +++ b/xschem_library/devices/var_res.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vccs.sym b/xschem_library/devices/vccs.sym index 2bc466be..caae27f9 100644 --- a/xschem_library/devices/vccs.sym +++ b/xschem_library/devices/vccs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vcr.sym b/xschem_library/devices/vcr.sym index 2e551eb2..5b9631ba 100644 --- a/xschem_library/devices/vcr.sym +++ b/xschem_library/devices/vcr.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vcvs.sym b/xschem_library/devices/vcvs.sym index 7f5f36f7..6c0ad697 100644 --- a/xschem_library/devices/vcvs.sym +++ b/xschem_library/devices/vcvs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vdd.sym b/xschem_library/devices/vdd.sym index c9f106dd..f81db1d1 100644 --- a/xschem_library/devices/vdd.sym +++ b/xschem_library/devices/vdd.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/verilog_delay.sch b/xschem_library/devices/verilog_delay.sch index 68a7e9d1..2d6189a8 100644 --- a/xschem_library/devices/verilog_delay.sch +++ b/xschem_library/devices/verilog_delay.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/verilog_delay.sym b/xschem_library/devices/verilog_delay.sym index 2ff72e27..e1713ea2 100644 --- a/xschem_library/devices/verilog_delay.sym +++ b/xschem_library/devices/verilog_delay.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/verilog_preprocessor.sym b/xschem_library/devices/verilog_preprocessor.sym index 2d1ff710..f047a600 100644 --- a/xschem_library/devices/verilog_preprocessor.sym +++ b/xschem_library/devices/verilog_preprocessor.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/verilog_timescale.sym b/xschem_library/devices/verilog_timescale.sym index 895f570e..d9811bc7 100644 --- a/xschem_library/devices/verilog_timescale.sym +++ b/xschem_library/devices/verilog_timescale.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vsource.sym b/xschem_library/devices/vsource.sym index 40e5cb52..5c7a4bf1 100644 --- a/xschem_library/devices/vsource.sym +++ b/xschem_library/devices/vsource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vsource_arith.sym b/xschem_library/devices/vsource_arith.sym index f6860896..83b86a27 100644 --- a/xschem_library/devices/vsource_arith.sym +++ b/xschem_library/devices/vsource_arith.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/vsource_pwl.sym b/xschem_library/devices/vsource_pwl.sym index 8fbf39c9..71b9a65b 100644 --- a/xschem_library/devices/vsource_pwl.sym +++ b/xschem_library/devices/vsource_pwl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/devices/zener.sym b/xschem_library/devices/zener.sym index 8439d252..de47c8a2 100644 --- a/xschem_library/devices/zener.sym +++ b/xschem_library/devices/zener.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/0_examples_top.sch b/xschem_library/examples/0_examples_top.sch index 40b18ac3..5b95aed0 100644 --- a/xschem_library/examples/0_examples_top.sch +++ b/xschem_library/examples/0_examples_top.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/LCC_instances.sch b/xschem_library/examples/LCC_instances.sch index a15c4e78..036b3b14 100644 --- a/xschem_library/examples/LCC_instances.sch +++ b/xschem_library/examples/LCC_instances.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/LCC_instances.sym b/xschem_library/examples/LCC_instances.sym index b2d8a2b1..e4d06368 100644 --- a/xschem_library/examples/LCC_instances.sym +++ b/xschem_library/examples/LCC_instances.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/LM5134A.sch b/xschem_library/examples/LM5134A.sch index 23f9e85d..7fb466e6 100644 --- a/xschem_library/examples/LM5134A.sch +++ b/xschem_library/examples/LM5134A.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/LM5134A.sym b/xschem_library/examples/LM5134A.sym index 0de0422b..51bbd3ea 100644 --- a/xschem_library/examples/LM5134A.sym +++ b/xschem_library/examples/LM5134A.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/MSA-2643.sch b/xschem_library/examples/MSA-2643.sch index edfa83a1..af4aac3b 100644 --- a/xschem_library/examples/MSA-2643.sch +++ b/xschem_library/examples/MSA-2643.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/Q1.sch b/xschem_library/examples/Q1.sch index 0de297eb..67843d86 100644 --- a/xschem_library/examples/Q1.sch +++ b/xschem_library/examples/Q1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/Q1.sym b/xschem_library/examples/Q1.sym index e76a8710..68289177 100644 --- a/xschem_library/examples/Q1.sym +++ b/xschem_library/examples/Q1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/Q2.sch b/xschem_library/examples/Q2.sch index 7d5344b5..bb1c2686 100644 --- a/xschem_library/examples/Q2.sch +++ b/xschem_library/examples/Q2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/Q2.sym b/xschem_library/examples/Q2.sym index e76a8710..68289177 100644 --- a/xschem_library/examples/Q2.sym +++ b/xschem_library/examples/Q2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/SYMBOL_include.sch b/xschem_library/examples/SYMBOL_include.sch index cc338345..5d9c82c0 100644 --- a/xschem_library/examples/SYMBOL_include.sch +++ b/xschem_library/examples/SYMBOL_include.sch @@ -1,4 +1,23 @@ -v {xschem version=3.4.5 file_version=1.2 +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA } G {} K {} diff --git a/xschem_library/examples/SYMBOL_include.sym b/xschem_library/examples/SYMBOL_include.sym index f2c33133..c0914f09 100644 --- a/xschem_library/examples/SYMBOL_include.sym +++ b/xschem_library/examples/SYMBOL_include.sym @@ -1,4 +1,23 @@ -v {xschem version=3.4.5 file_version=1.2 +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA } G {} K {type=subcircuit diff --git a/xschem_library/examples/TwoStageAmp.sch b/xschem_library/examples/TwoStageAmp.sch index 9501703e..f3886de1 100644 --- a/xschem_library/examples/TwoStageAmp.sch +++ b/xschem_library/examples/TwoStageAmp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/an2.sym b/xschem_library/examples/an2.sym index b5b7ce3e..1a8d9fbf 100644 --- a/xschem_library/examples/an2.sym +++ b/xschem_library/examples/an2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/and.sym b/xschem_library/examples/and.sym index 1ce42b86..c6bb5f53 100644 --- a/xschem_library/examples/and.sym +++ b/xschem_library/examples/and.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/ao21.sym b/xschem_library/examples/ao21.sym index 49bba03b..760ffbaf 100644 --- a/xschem_library/examples/ao21.sym +++ b/xschem_library/examples/ao21.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/buf.sym b/xschem_library/examples/buf.sym index f2e5e449..39e7237f 100644 --- a/xschem_library/examples/buf.sym +++ b/xschem_library/examples/buf.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/bus_keeper.sch b/xschem_library/examples/bus_keeper.sch index 99fd46ac..d6ff798d 100644 --- a/xschem_library/examples/bus_keeper.sch +++ b/xschem_library/examples/bus_keeper.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/classD_amp.sch b/xschem_library/examples/classD_amp.sch index 81c2765a..591026c2 100644 --- a/xschem_library/examples/classD_amp.sch +++ b/xschem_library/examples/classD_amp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/classD_amp.sym b/xschem_library/examples/classD_amp.sym index 79a94fad..17adad8c 100644 --- a/xschem_library/examples/classD_amp.sym +++ b/xschem_library/examples/classD_amp.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/cmos_example.sch b/xschem_library/examples/cmos_example.sch index 9dfd2fd2..10360840 100644 --- a/xschem_library/examples/cmos_example.sch +++ b/xschem_library/examples/cmos_example.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/cmos_example.sym b/xschem_library/examples/cmos_example.sym index a4b76425..4f8da95f 100644 --- a/xschem_library/examples/cmos_example.sym +++ b/xschem_library/examples/cmos_example.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/cmos_inv.sch b/xschem_library/examples/cmos_inv.sch index 38163347..556573eb 100644 --- a/xschem_library/examples/cmos_inv.sch +++ b/xschem_library/examples/cmos_inv.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/cmos_inv.sym b/xschem_library/examples/cmos_inv.sym index 9a4f72af..0f72cfaf 100644 --- a/xschem_library/examples/cmos_inv.sym +++ b/xschem_library/examples/cmos_inv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/diode_1.sch b/xschem_library/examples/diode_1.sch index 90e070b5..816c46f0 100644 --- a/xschem_library/examples/diode_1.sch +++ b/xschem_library/examples/diode_1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/diode_1.sym b/xschem_library/examples/diode_1.sym index d1c3487e..258b9add 100644 --- a/xschem_library/examples/diode_1.sym +++ b/xschem_library/examples/diode_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/dlatch.sch b/xschem_library/examples/dlatch.sch index a07e6690..0548ce49 100644 --- a/xschem_library/examples/dlatch.sch +++ b/xschem_library/examples/dlatch.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/dlatch.sym b/xschem_library/examples/dlatch.sym index ee5b6f28..f6ca4498 100644 --- a/xschem_library/examples/dlatch.sym +++ b/xschem_library/examples/dlatch.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/doublepin.sch b/xschem_library/examples/doublepin.sch index 76459c80..cb6172a7 100644 --- a/xschem_library/examples/doublepin.sch +++ b/xschem_library/examples/doublepin.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/doublepin.sym b/xschem_library/examples/doublepin.sym index 883d2df4..182a07a6 100644 --- a/xschem_library/examples/doublepin.sym +++ b/xschem_library/examples/doublepin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/flop.sch b/xschem_library/examples/flop.sch index 9e777be5..6815ff6e 100644 --- a/xschem_library/examples/flop.sch +++ b/xschem_library/examples/flop.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/flop.sym b/xschem_library/examples/flop.sym index 655310dc..a23f7ba0 100644 --- a/xschem_library/examples/flop.sym +++ b/xschem_library/examples/flop.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/greycnt.sch b/xschem_library/examples/greycnt.sch index f50d282c..ecf23687 100644 --- a/xschem_library/examples/greycnt.sch +++ b/xschem_library/examples/greycnt.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/greycnt.sym b/xschem_library/examples/greycnt.sym index e14c4f19..d1f9554c 100644 --- a/xschem_library/examples/greycnt.sym +++ b/xschem_library/examples/greycnt.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/inv_bsource.sym b/xschem_library/examples/inv_bsource.sym index 7e18866e..26859f2d 100644 --- a/xschem_library/examples/inv_bsource.sym +++ b/xschem_library/examples/inv_bsource.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lightning.sch b/xschem_library/examples/lightning.sch index 72eec72e..889b56c0 100644 --- a/xschem_library/examples/lightning.sch +++ b/xschem_library/examples/lightning.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm317.sch b/xschem_library/examples/lm317.sch index 73944dfd..150810c6 100644 --- a/xschem_library/examples/lm317.sch +++ b/xschem_library/examples/lm317.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm317.sym b/xschem_library/examples/lm317.sym index 607d3d8b..c061994a 100644 --- a/xschem_library/examples/lm317.sym +++ b/xschem_library/examples/lm317.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm324.sym b/xschem_library/examples/lm324.sym index aaa92b9e..386d5389 100644 --- a/xschem_library/examples/lm324.sym +++ b/xschem_library/examples/lm324.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm337.sch b/xschem_library/examples/lm337.sch index 73944dfd..150810c6 100644 --- a/xschem_library/examples/lm337.sch +++ b/xschem_library/examples/lm337.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/lm337.sym b/xschem_library/examples/lm337.sym index 1e7d8ce5..9c4ad025 100644 --- a/xschem_library/examples/lm337.sym +++ b/xschem_library/examples/lm337.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/loading.sch b/xschem_library/examples/loading.sch index 33295e0d..ccb6013a 100644 --- a/xschem_library/examples/loading.sch +++ b/xschem_library/examples/loading.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/loading.sym b/xschem_library/examples/loading.sym index 0b9ba11d..2667f8bd 100644 --- a/xschem_library/examples/loading.sym +++ b/xschem_library/examples/loading.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/mos_power_ampli.sch b/xschem_library/examples/mos_power_ampli.sch index cc36ff05..e96d3451 100644 --- a/xschem_library/examples/mos_power_ampli.sch +++ b/xschem_library/examples/mos_power_ampli.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/mos_power_ampli.sym b/xschem_library/examples/mos_power_ampli.sym index 072539e4..7f5cb699 100644 --- a/xschem_library/examples/mos_power_ampli.sym +++ b/xschem_library/examples/mos_power_ampli.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/mos_power_ampli_extracted.sch b/xschem_library/examples/mos_power_ampli_extracted.sch index aabb93d8..9801f838 100644 --- a/xschem_library/examples/mos_power_ampli_extracted.sch +++ b/xschem_library/examples/mos_power_ampli_extracted.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/mos_power_ampli_extracted.sym b/xschem_library/examples/mos_power_ampli_extracted.sym index 5a8362b7..21afbd49 100644 --- a/xschem_library/examples/mos_power_ampli_extracted.sym +++ b/xschem_library/examples/mos_power_ampli_extracted.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nand.sym b/xschem_library/examples/nand.sym index 3d6263d8..2aef350d 100644 --- a/xschem_library/examples/nand.sym +++ b/xschem_library/examples/nand.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nand2.sch b/xschem_library/examples/nand2.sch index 77ec30e5..c94b2d58 100644 --- a/xschem_library/examples/nand2.sch +++ b/xschem_library/examples/nand2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nand2.sym b/xschem_library/examples/nand2.sym index 455766ca..7cb549de 100644 --- a/xschem_library/examples/nand2.sym +++ b/xschem_library/examples/nand2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nand3.sym b/xschem_library/examples/nand3.sym index a2ed4399..05586bea 100644 --- a/xschem_library/examples/nand3.sym +++ b/xschem_library/examples/nand3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nd2-1.sym b/xschem_library/examples/nd2-1.sym index 349a9e5e..044b3ed6 100644 --- a/xschem_library/examples/nd2-1.sym +++ b/xschem_library/examples/nd2-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/ne555.sym b/xschem_library/examples/ne555.sym index 91d27382..825775e7 100644 --- a/xschem_library/examples/ne555.sym +++ b/xschem_library/examples/ne555.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/not.sym b/xschem_library/examples/not.sym index 47289226..375ceb76 100644 --- a/xschem_library/examples/not.sym +++ b/xschem_library/examples/not.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/nr2-1.sym b/xschem_library/examples/nr2-1.sym index 23cf9c06..1dc5f4f7 100644 --- a/xschem_library/examples/nr2-1.sym +++ b/xschem_library/examples/nr2-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/or2.sym b/xschem_library/examples/or2.sym index 729cf386..c13d864e 100644 --- a/xschem_library/examples/or2.sym +++ b/xschem_library/examples/or2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/osc.sch b/xschem_library/examples/osc.sch index 2d112bfd..754dc31f 100644 --- a/xschem_library/examples/osc.sch +++ b/xschem_library/examples/osc.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/osc.sym b/xschem_library/examples/osc.sym index a4b76425..4f8da95f 100644 --- a/xschem_library/examples/osc.sym +++ b/xschem_library/examples/osc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/plot_manipulation.sch b/xschem_library/examples/plot_manipulation.sch index e6816b27..b0422a46 100644 --- a/xschem_library/examples/plot_manipulation.sch +++ b/xschem_library/examples/plot_manipulation.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/plot_manipulation.sym b/xschem_library/examples/plot_manipulation.sym index 3af2f514..a2b4d53c 100644 --- a/xschem_library/examples/plot_manipulation.sym +++ b/xschem_library/examples/plot_manipulation.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp.sch b/xschem_library/examples/poweramp.sch index 19cfcc16..f4ccf63c 100644 --- a/xschem_library/examples/poweramp.sch +++ b/xschem_library/examples/poweramp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp.sym b/xschem_library/examples/poweramp.sym index a6071917..5aef3d49 100644 --- a/xschem_library/examples/poweramp.sym +++ b/xschem_library/examples/poweramp.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp_lcc.sch b/xschem_library/examples/poweramp_lcc.sch index 4d7a2175..8f76c589 100644 --- a/xschem_library/examples/poweramp_lcc.sch +++ b/xschem_library/examples/poweramp_lcc.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp_lcc.sym b/xschem_library/examples/poweramp_lcc.sym index a6071917..5aef3d49 100644 --- a/xschem_library/examples/poweramp_lcc.sym +++ b/xschem_library/examples/poweramp_lcc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp_xyce.sch b/xschem_library/examples/poweramp_xyce.sch index a79c8246..a744dd6e 100644 --- a/xschem_library/examples/poweramp_xyce.sch +++ b/xschem_library/examples/poweramp_xyce.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/poweramp_xyce.sym b/xschem_library/examples/poweramp_xyce.sym index 12360edc..d681d23d 100644 --- a/xschem_library/examples/poweramp_xyce.sym +++ b/xschem_library/examples/poweramp_xyce.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/pump.sch b/xschem_library/examples/pump.sch index 629aacce..f521fc07 100644 --- a/xschem_library/examples/pump.sch +++ b/xschem_library/examples/pump.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/pump.sym b/xschem_library/examples/pump.sym index 529047bf..0886fe6e 100644 --- a/xschem_library/examples/pump.sym +++ b/xschem_library/examples/pump.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/rcline.sch b/xschem_library/examples/rcline.sch index 8cbd68fc..b231e1e6 100644 --- a/xschem_library/examples/rcline.sch +++ b/xschem_library/examples/rcline.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/rcline.sym b/xschem_library/examples/rcline.sym index 93220452..d0e057e6 100644 --- a/xschem_library/examples/rcline.sym +++ b/xschem_library/examples/rcline.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/real_capa.sch b/xschem_library/examples/real_capa.sch index a1046a18..bbdcfcec 100644 --- a/xschem_library/examples/real_capa.sch +++ b/xschem_library/examples/real_capa.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/real_capa.sym b/xschem_library/examples/real_capa.sym index f1c80c0a..44fa6ab7 100644 --- a/xschem_library/examples/real_capa.sym +++ b/xschem_library/examples/real_capa.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/rlc.sch b/xschem_library/examples/rlc.sch index b1ee9bce..8237537d 100644 --- a/xschem_library/examples/rlc.sch +++ b/xschem_library/examples/rlc.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/rlc.sym b/xschem_library/examples/rlc.sym index da7735ee..a3a0cdef 100644 --- a/xschem_library/examples/rlc.sym +++ b/xschem_library/examples/rlc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/sr_flop.sch b/xschem_library/examples/sr_flop.sch index 74c33ed5..2e59bca5 100644 --- a/xschem_library/examples/sr_flop.sch +++ b/xschem_library/examples/sr_flop.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/sr_flop.sym b/xschem_library/examples/sr_flop.sym index 098d6ca0..bf4fb409 100644 --- a/xschem_library/examples/sr_flop.sym +++ b/xschem_library/examples/sr_flop.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/switch_rreal.sch b/xschem_library/examples/switch_rreal.sch index 99aee3c3..d7b2d9e2 100644 --- a/xschem_library/examples/switch_rreal.sch +++ b/xschem_library/examples/switch_rreal.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/switch_rreal.sym b/xschem_library/examples/switch_rreal.sym index 2766a074..4d3c8fe1 100644 --- a/xschem_library/examples/switch_rreal.sym +++ b/xschem_library/examples/switch_rreal.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/symbol_include2.sch b/xschem_library/examples/symbol_include2.sch index 410f5e77..3e7352f4 100644 --- a/xschem_library/examples/symbol_include2.sch +++ b/xschem_library/examples/symbol_include2.sch @@ -1,4 +1,24 @@ -v {xschem version=3.4.5 file_version=1.2} +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA +} G {} V {} E {} diff --git a/xschem_library/examples/tb_symbol_include.sch b/xschem_library/examples/tb_symbol_include.sch index 8466397e..1a0d2f02 100644 --- a/xschem_library/examples/tb_symbol_include.sch +++ b/xschem_library/examples/tb_symbol_include.sch @@ -1,4 +1,23 @@ -v {xschem version=3.4.5 file_version=1.2 +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA } G {} K {} diff --git a/xschem_library/examples/tb_symbol_include.sym b/xschem_library/examples/tb_symbol_include.sym index 7d857e12..eeae0928 100644 --- a/xschem_library/examples/tb_symbol_include.sym +++ b/xschem_library/examples/tb_symbol_include.sym @@ -1,4 +1,24 @@ -v {xschem version=3.4.5 file_version=1.2} +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA +} K {type=subcircuit format="@name @pinlist @symname" template="name=x1" diff --git a/xschem_library/examples/tesla.sch b/xschem_library/examples/tesla.sch index a37d9c38..bf44e845 100644 --- a/xschem_library/examples/tesla.sch +++ b/xschem_library/examples/tesla.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/tesla.sym b/xschem_library/examples/tesla.sym index a4b76425..4f8da95f 100644 --- a/xschem_library/examples/tesla.sym +++ b/xschem_library/examples/tesla.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test.sch b/xschem_library/examples/test.sch index daa60c59..87d22b9c 100644 --- a/xschem_library/examples/test.sch +++ b/xschem_library/examples/test.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test2.sch b/xschem_library/examples/test2.sch index 981c6bd5..7eb2689a 100644 --- a/xschem_library/examples/test2.sch +++ b/xschem_library/examples/test2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ac.sch b/xschem_library/examples/test_ac.sch index 45a2ccc4..925eec9a 100644 --- a/xschem_library/examples/test_ac.sch +++ b/xschem_library/examples/test_ac.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ac.sym b/xschem_library/examples/test_ac.sym index 1065857f..b63e958a 100644 --- a/xschem_library/examples/test_ac.sym +++ b/xschem_library/examples/test_ac.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ac_xyce.sch b/xschem_library/examples/test_ac_xyce.sch index 62a57a81..ca281d8c 100644 --- a/xschem_library/examples/test_ac_xyce.sch +++ b/xschem_library/examples/test_ac_xyce.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ac_xyce.sym b/xschem_library/examples/test_ac_xyce.sym index 78482a6b..e53fcaab 100644 --- a/xschem_library/examples/test_ac_xyce.sym +++ b/xschem_library/examples/test_ac_xyce.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_backannotated_subckt.sch b/xschem_library/examples/test_backannotated_subckt.sch index 92332376..d6603ea8 100644 --- a/xschem_library/examples/test_backannotated_subckt.sch +++ b/xschem_library/examples/test_backannotated_subckt.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_backannotated_subckt.sym b/xschem_library/examples/test_backannotated_subckt.sym index b4bb37e2..bc4feb27 100644 --- a/xschem_library/examples/test_backannotated_subckt.sym +++ b/xschem_library/examples/test_backannotated_subckt.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_bus_tap.sch b/xschem_library/examples/test_bus_tap.sch index e97a4834..b80f9020 100644 --- a/xschem_library/examples/test_bus_tap.sch +++ b/xschem_library/examples/test_bus_tap.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_bus_tap.sym b/xschem_library/examples/test_bus_tap.sym index 78482a6b..e53fcaab 100644 --- a/xschem_library/examples/test_bus_tap.sym +++ b/xschem_library/examples/test_bus_tap.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_doublepin.sch b/xschem_library/examples/test_doublepin.sch index 1b53b0a8..d94d19ff 100644 --- a/xschem_library/examples/test_doublepin.sch +++ b/xschem_library/examples/test_doublepin.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_doublepin.sym b/xschem_library/examples/test_doublepin.sym index 1167ec67..b88691e6 100644 --- a/xschem_library/examples/test_doublepin.sym +++ b/xschem_library/examples/test_doublepin.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_extracted_netlist.sch b/xschem_library/examples/test_extracted_netlist.sch index 44aa7426..9325e70f 100644 --- a/xschem_library/examples/test_extracted_netlist.sch +++ b/xschem_library/examples/test_extracted_netlist.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_extracted_netlist.sym b/xschem_library/examples/test_extracted_netlist.sym index a6071917..5aef3d49 100644 --- a/xschem_library/examples/test_extracted_netlist.sym +++ b/xschem_library/examples/test_extracted_netlist.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_jfet.sch b/xschem_library/examples/test_jfet.sch index 7c61f6b1..258fd117 100644 --- a/xschem_library/examples/test_jfet.sch +++ b/xschem_library/examples/test_jfet.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_jfet.sym b/xschem_library/examples/test_jfet.sym index 78482a6b..e53fcaab 100644 --- a/xschem_library/examples/test_jfet.sym +++ b/xschem_library/examples/test_jfet.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_lm324.sch b/xschem_library/examples/test_lm324.sch index b71cc874..03ea93a6 100644 --- a/xschem_library/examples/test_lm324.sch +++ b/xschem_library/examples/test_lm324.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_lm324.sym b/xschem_library/examples/test_lm324.sym index a4b76425..4f8da95f 100644 --- a/xschem_library/examples/test_lm324.sym +++ b/xschem_library/examples/test_lm324.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_lvs_ignore.sch b/xschem_library/examples/test_lvs_ignore.sch index df671383..9d4b2de4 100644 --- a/xschem_library/examples/test_lvs_ignore.sch +++ b/xschem_library/examples/test_lvs_ignore.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_lvs_ignore.sym b/xschem_library/examples/test_lvs_ignore.sym index 3af2f514..a2b4d53c 100644 --- a/xschem_library/examples/test_lvs_ignore.sym +++ b/xschem_library/examples/test_lvs_ignore.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ne555.sch b/xschem_library/examples/test_ne555.sch index 49badadf..2f5cafbf 100644 --- a/xschem_library/examples/test_ne555.sch +++ b/xschem_library/examples/test_ne555.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_ne555.sym b/xschem_library/examples/test_ne555.sym index d5bc226b..44b6fed2 100644 --- a/xschem_library/examples/test_ne555.sym +++ b/xschem_library/examples/test_ne555.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_nyquist.sch b/xschem_library/examples/test_nyquist.sch index e84ea26c..6f004ad0 100644 --- a/xschem_library/examples/test_nyquist.sch +++ b/xschem_library/examples/test_nyquist.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_nyquist.sym b/xschem_library/examples/test_nyquist.sym index 6a2edfe1..84125835 100644 --- a/xschem_library/examples/test_nyquist.sym +++ b/xschem_library/examples/test_nyquist.sym @@ -1,4 +1,24 @@ -v {xschem version=3.4.5 file_version=1.2} +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA +} K {type=subcircuit format="@name @pinlist @symname" template="name=x1" diff --git a/xschem_library/examples/test_short_option.sch b/xschem_library/examples/test_short_option.sch index 637d7cf5..d19eb3d7 100644 --- a/xschem_library/examples/test_short_option.sch +++ b/xschem_library/examples/test_short_option.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/test_short_option.sym b/xschem_library/examples/test_short_option.sym index 3af2f514..a2b4d53c 100644 --- a/xschem_library/examples/test_short_option.sym +++ b/xschem_library/examples/test_short_option.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/xcross.sch b/xschem_library/examples/xcross.sch index c7329efb..f1b14eae 100644 --- a/xschem_library/examples/xcross.sch +++ b/xschem_library/examples/xcross.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/xcross.sym b/xschem_library/examples/xcross.sym index ea9d5a85..29522b19 100644 --- a/xschem_library/examples/xcross.sym +++ b/xschem_library/examples/xcross.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/xnor.sch b/xschem_library/examples/xnor.sch index 0ba5b9f9..eba100ee 100644 --- a/xschem_library/examples/xnor.sch +++ b/xschem_library/examples/xnor.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/examples/xnor.sym b/xschem_library/examples/xnor.sym index 13fea32b..e11e9cd7 100644 --- a/xschem_library/examples/xnor.sym +++ b/xschem_library/examples/xnor.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/my_inv.sch b/xschem_library/generators/my_inv.sch index c353ab93..500a7b54 100644 --- a/xschem_library/generators/my_inv.sch +++ b/xschem_library/generators/my_inv.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/my_inv.sym b/xschem_library/generators/my_inv.sym index 1271f14f..3cec65f8 100644 --- a/xschem_library/generators/my_inv.sym +++ b/xschem_library/generators/my_inv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_generators.sch b/xschem_library/generators/test_generators.sch index a0664179..4cafb4bb 100644 --- a/xschem_library/generators/test_generators.sch +++ b/xschem_library/generators/test_generators.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_generators.sym b/xschem_library/generators/test_generators.sym index da1e9f15..d5aac9be 100644 --- a/xschem_library/generators/test_generators.sym +++ b/xschem_library/generators/test_generators.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_mosgen.sch b/xschem_library/generators/test_mosgen.sch index 378bcc9d..6d0d54d0 100644 --- a/xschem_library/generators/test_mosgen.sch +++ b/xschem_library/generators/test_mosgen.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_symbolgen.sch b/xschem_library/generators/test_symbolgen.sch index f95218f2..4f22274f 100644 --- a/xschem_library/generators/test_symbolgen.sch +++ b/xschem_library/generators/test_symbolgen.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/generators/test_symbolgen.sym b/xschem_library/generators/test_symbolgen.sym index 1167ec67..b88691e6 100644 --- a/xschem_library/generators/test_symbolgen.sym +++ b/xschem_library/generators/test_symbolgen.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/24Cxx-1.sym b/xschem_library/gschem_import/24Cxx-1.sym index e28c6304..a020362e 100644 --- a/xschem_library/gschem_import/24Cxx-1.sym +++ b/xschem_library/gschem_import/24Cxx-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/2N4401.sym b/xschem_library/gschem_import/2N4401.sym index 73e7d6fe..08d3a822 100644 --- a/xschem_library/gschem_import/2N4401.sym +++ b/xschem_library/gschem_import/2N4401.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/2N4403.sym b/xschem_library/gschem_import/2N4403.sym index 1a54423e..cacd9f6c 100644 --- a/xschem_library/gschem_import/2N4403.sym +++ b/xschem_library/gschem_import/2N4403.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/3.3V-plus-1.sym b/xschem_library/gschem_import/3.3V-plus-1.sym index 6f4f0da6..7a4a10f3 100644 --- a/xschem_library/gschem_import/3.3V-plus-1.sym +++ b/xschem_library/gschem_import/3.3V-plus-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/5V-plus-1.sym b/xschem_library/gschem_import/5V-plus-1.sym index ef31584c..1c6ea15b 100644 --- a/xschem_library/gschem_import/5V-plus-1.sym +++ b/xschem_library/gschem_import/5V-plus-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/7414-1.sym b/xschem_library/gschem_import/7414-1.sym index 4ecf56eb..d4ddfdbb 100644 --- a/xschem_library/gschem_import/7414-1.sym +++ b/xschem_library/gschem_import/7414-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/BJT_Model.sym b/xschem_library/gschem_import/BJT_Model.sym index e54e3121..df7bd128 100644 --- a/xschem_library/gschem_import/BJT_Model.sym +++ b/xschem_library/gschem_import/BJT_Model.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/MSA-2643.sch b/xschem_library/gschem_import/MSA-2643.sch index 573b22dd..91ccb40e 100644 --- a/xschem_library/gschem_import/MSA-2643.sch +++ b/xschem_library/gschem_import/MSA-2643.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/Q1.sch b/xschem_library/gschem_import/Q1.sch index 13de89e5..3a25646e 100644 --- a/xschem_library/gschem_import/Q1.sch +++ b/xschem_library/gschem_import/Q1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/Q2.sch b/xschem_library/gschem_import/Q2.sch index dc65895c..8aea3d57 100644 --- a/xschem_library/gschem_import/Q2.sch +++ b/xschem_library/gschem_import/Q2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/Q_Model.sym b/xschem_library/gschem_import/Q_Model.sym index 2c22dd67..ee23c7e3 100644 --- a/xschem_library/gschem_import/Q_Model.sym +++ b/xschem_library/gschem_import/Q_Model.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/TwoStageAmp.sch b/xschem_library/gschem_import/TwoStageAmp.sch index 4ddd2132..6661fac1 100644 --- a/xschem_library/gschem_import/TwoStageAmp.sch +++ b/xschem_library/gschem_import/TwoStageAmp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/capacitor-1.sym b/xschem_library/gschem_import/capacitor-1.sym index 8f9aef31..4c435276 100644 --- a/xschem_library/gschem_import/capacitor-1.sym +++ b/xschem_library/gschem_import/capacitor-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/capacitor-2.sym b/xschem_library/gschem_import/capacitor-2.sym index 96dffbba..2c67bf72 100644 --- a/xschem_library/gschem_import/capacitor-2.sym +++ b/xschem_library/gschem_import/capacitor-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/connector4-1.sym b/xschem_library/gschem_import/connector4-1.sym index a4096ac0..7e1c3a85 100644 --- a/xschem_library/gschem_import/connector4-1.sym +++ b/xschem_library/gschem_import/connector4-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/connector8-1.sym b/xschem_library/gschem_import/connector8-1.sym index e86231d1..11db9d4a 100644 --- a/xschem_library/gschem_import/connector8-1.sym +++ b/xschem_library/gschem_import/connector8-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/copyleft.sym b/xschem_library/gschem_import/copyleft.sym index 893feeab..ec210da0 100644 --- a/xschem_library/gschem_import/copyleft.sym +++ b/xschem_library/gschem_import/copyleft.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/crystal-1.sym b/xschem_library/gschem_import/crystal-1.sym index 854b1156..c2f0e2bd 100644 --- a/xschem_library/gschem_import/crystal-1.sym +++ b/xschem_library/gschem_import/crystal-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/cy7c64603-52nc.sym b/xschem_library/gschem_import/cy7c64603-52nc.sym index 5a1f4de1..fcd617c8 100644 --- a/xschem_library/gschem_import/cy7c64603-52nc.sym +++ b/xschem_library/gschem_import/cy7c64603-52nc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/diode-1.sym b/xschem_library/gschem_import/diode-1.sym index 75d92228..536fe0ed 100644 --- a/xschem_library/gschem_import/diode-1.sym +++ b/xschem_library/gschem_import/diode-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-consio.sch b/xschem_library/gschem_import/gTAG-consio.sch index 7b221cca..b8c4737f 100644 --- a/xschem_library/gschem_import/gTAG-consio.sch +++ b/xschem_library/gschem_import/gTAG-consio.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-consio.sym b/xschem_library/gschem_import/gTAG-consio.sym index d7e709ca..9dbf8b54 100644 --- a/xschem_library/gschem_import/gTAG-consio.sym +++ b/xschem_library/gschem_import/gTAG-consio.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-jtagio.sch b/xschem_library/gschem_import/gTAG-jtagio.sch index 9844af6e..a4d2e466 100644 --- a/xschem_library/gschem_import/gTAG-jtagio.sch +++ b/xschem_library/gschem_import/gTAG-jtagio.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-jtagio.sym b/xschem_library/gschem_import/gTAG-jtagio.sym index 96fb20c0..bf046101 100644 --- a/xschem_library/gschem_import/gTAG-jtagio.sym +++ b/xschem_library/gschem_import/gTAG-jtagio.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-psu.sch b/xschem_library/gschem_import/gTAG-psu.sch index a1e3cd0d..139b8c00 100644 --- a/xschem_library/gschem_import/gTAG-psu.sch +++ b/xschem_library/gschem_import/gTAG-psu.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-psu.sym b/xschem_library/gschem_import/gTAG-psu.sym index dccf9942..aba134f9 100644 --- a/xschem_library/gschem_import/gTAG-psu.sym +++ b/xschem_library/gschem_import/gTAG-psu.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-ucont.sch b/xschem_library/gschem_import/gTAG-ucont.sch index a8c54584..e47ed90d 100644 --- a/xschem_library/gschem_import/gTAG-ucont.sch +++ b/xschem_library/gschem_import/gTAG-ucont.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG-ucont.sym b/xschem_library/gschem_import/gTAG-ucont.sym index 2b333e21..5ba8f65c 100644 --- a/xschem_library/gschem_import/gTAG-ucont.sym +++ b/xschem_library/gschem_import/gTAG-ucont.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gTAG.sch b/xschem_library/gschem_import/gTAG.sch index ec028997..6415706d 100644 --- a/xschem_library/gschem_import/gTAG.sch +++ b/xschem_library/gschem_import/gTAG.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/gnd-1.sym b/xschem_library/gschem_import/gnd-1.sym index aa624134..65afe63c 100644 --- a/xschem_library/gschem_import/gnd-1.sym +++ b/xschem_library/gschem_import/gnd-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/header20-1.sym b/xschem_library/gschem_import/header20-1.sym index c3075a64..7e9d4ad8 100644 --- a/xschem_library/gschem_import/header20-1.sym +++ b/xschem_library/gschem_import/header20-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/in-1.sym b/xschem_library/gschem_import/in-1.sym index 8e785260..39fef854 100644 --- a/xschem_library/gschem_import/in-1.sym +++ b/xschem_library/gschem_import/in-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/inductor-1.sym b/xschem_library/gschem_import/inductor-1.sym index c4af625e..12200444 100644 --- a/xschem_library/gschem_import/inductor-1.sym +++ b/xschem_library/gschem_import/inductor-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/jumper-1.sym b/xschem_library/gschem_import/jumper-1.sym index 57635f22..cb39908d 100644 --- a/xschem_library/gschem_import/jumper-1.sym +++ b/xschem_library/gschem_import/jumper-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/lightning.sch b/xschem_library/gschem_import/lightning.sch index 5c2f4426..bc81aac2 100644 --- a/xschem_library/gschem_import/lightning.sch +++ b/xschem_library/gschem_import/lightning.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/max882.sym b/xschem_library/gschem_import/max882.sym index ddcdddb8..466c9110 100644 --- a/xschem_library/gschem_import/max882.sym +++ b/xschem_library/gschem_import/max882.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/out-1.sym b/xschem_library/gschem_import/out-1.sym index 7a707164..539f797c 100644 --- a/xschem_library/gschem_import/out-1.sym +++ b/xschem_library/gschem_import/out-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/resistor-1.sym b/xschem_library/gschem_import/resistor-1.sym index 8a6e00b7..bcc766e8 100644 --- a/xschem_library/gschem_import/resistor-1.sym +++ b/xschem_library/gschem_import/resistor-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/resistor-2.sym b/xschem_library/gschem_import/resistor-2.sym index a9774264..d73e682b 100644 --- a/xschem_library/gschem_import/resistor-2.sym +++ b/xschem_library/gschem_import/resistor-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/resistor-variable-1.sym b/xschem_library/gschem_import/resistor-variable-1.sym index 0c9c3067..f4836928 100644 --- a/xschem_library/gschem_import/resistor-variable-1.sym +++ b/xschem_library/gschem_import/resistor-variable-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/show_all_syms.sch b/xschem_library/gschem_import/show_all_syms.sch index 3a74f30a..76aa26ed 100644 --- a/xschem_library/gschem_import/show_all_syms.sch +++ b/xschem_library/gschem_import/show_all_syms.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/sn75240pw.sym b/xschem_library/gschem_import/sn75240pw.sym index 3890459d..f5ab5ef9 100644 --- a/xschem_library/gschem_import/sn75240pw.sym +++ b/xschem_library/gschem_import/sn75240pw.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-directive-1.sym b/xschem_library/gschem_import/spice-directive-1.sym index b19c14e0..c222256d 100644 --- a/xschem_library/gschem_import/spice-directive-1.sym +++ b/xschem_library/gschem_import/spice-directive-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-include-1.sym b/xschem_library/gschem_import/spice-include-1.sym index 7b26927f..2456385b 100644 --- a/xschem_library/gschem_import/spice-include-1.sym +++ b/xschem_library/gschem_import/spice-include-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-model-1.sym b/xschem_library/gschem_import/spice-model-1.sym index e9a47ab9..993a5b41 100644 --- a/xschem_library/gschem_import/spice-model-1.sym +++ b/xschem_library/gschem_import/spice-model-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-subcircuit-IO-1.sym b/xschem_library/gschem_import/spice-subcircuit-IO-1.sym index 8c4d69e6..9d2540bf 100644 --- a/xschem_library/gschem_import/spice-subcircuit-IO-1.sym +++ b/xschem_library/gschem_import/spice-subcircuit-IO-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/spice-subcircuit-LL-1.sym b/xschem_library/gschem_import/spice-subcircuit-LL-1.sym index d9eebb40..b643461b 100644 --- a/xschem_library/gschem_import/spice-subcircuit-LL-1.sym +++ b/xschem_library/gschem_import/spice-subcircuit-LL-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/title-A2.sym b/xschem_library/gschem_import/title-A2.sym index b4e075af..8d999b6d 100644 --- a/xschem_library/gschem_import/title-A2.sym +++ b/xschem_library/gschem_import/title-A2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/title-A4.sym b/xschem_library/gschem_import/title-A4.sym index d3127aa6..a5588efc 100644 --- a/xschem_library/gschem_import/title-A4.sym +++ b/xschem_library/gschem_import/title-A4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/title-B.sym b/xschem_library/gschem_import/title-B.sym index da7aa2a7..55a0c8dd 100644 --- a/xschem_library/gschem_import/title-B.sym +++ b/xschem_library/gschem_import/title-B.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/transistor.sym b/xschem_library/gschem_import/transistor.sym index 0260d18d..70e58c94 100644 --- a/xschem_library/gschem_import/transistor.sym +++ b/xschem_library/gschem_import/transistor.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/vac-1.sym b/xschem_library/gschem_import/vac-1.sym index 23899b62..6f4f4eb1 100644 --- a/xschem_library/gschem_import/vac-1.sym +++ b/xschem_library/gschem_import/vac-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/vcc-1.sym b/xschem_library/gschem_import/vcc-1.sym index 5fcae1b6..df97fc3e 100644 --- a/xschem_library/gschem_import/vcc-1.sym +++ b/xschem_library/gschem_import/vcc-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/vdc-1.sym b/xschem_library/gschem_import/vdc-1.sym index ead03e66..b8918b11 100644 --- a/xschem_library/gschem_import/vdc-1.sym +++ b/xschem_library/gschem_import/vdc-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/gschem_import/vsin-1.sym b/xschem_library/gschem_import/vsin-1.sym index e82aefe0..648752db 100644 --- a/xschem_library/gschem_import/vsin-1.sym +++ b/xschem_library/gschem_import/vsin-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3.sch b/xschem_library/inst_sch_select/comp3.sch index 3c187ae5..4a1c831e 100644 --- a/xschem_library/inst_sch_select/comp3.sch +++ b/xschem_library/inst_sch_select/comp3.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3.sym b/xschem_library/inst_sch_select/comp3.sym index 1cb97bf3..d3ffdeed 100644 --- a/xschem_library/inst_sch_select/comp3.sym +++ b/xschem_library/inst_sch_select/comp3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3_empty.sch b/xschem_library/inst_sch_select/comp3_empty.sch index ac0fdefb..0336c69c 100644 --- a/xschem_library/inst_sch_select/comp3_empty.sch +++ b/xschem_library/inst_sch_select/comp3_empty.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3_parax.sch b/xschem_library/inst_sch_select/comp3_parax.sch index d590d4b7..f799f942 100644 --- a/xschem_library/inst_sch_select/comp3_parax.sch +++ b/xschem_library/inst_sch_select/comp3_parax.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/comp3_read.sym b/xschem_library/inst_sch_select/comp3_read.sym index bbbc0d1c..e7ada354 100644 --- a/xschem_library/inst_sch_select/comp3_read.sym +++ b/xschem_library/inst_sch_select/comp3_read.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/inst_sch_select.sch b/xschem_library/inst_sch_select/inst_sch_select.sch index 5ad24886..1d129cab 100644 --- a/xschem_library/inst_sch_select/inst_sch_select.sch +++ b/xschem_library/inst_sch_select/inst_sch_select.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/inst_sch_select/inst_sch_select.sym b/xschem_library/inst_sch_select/inst_sch_select.sym index da1e9f15..d5aac9be 100644 --- a/xschem_library/inst_sch_select/inst_sch_select.sym +++ b/xschem_library/inst_sch_select/inst_sch_select.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/bf.sch b/xschem_library/logic/bf.sch index 93e381b9..88831270 100644 --- a/xschem_library/logic/bf.sch +++ b/xschem_library/logic/bf.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/bf.sym b/xschem_library/logic/bf.sym index 10349f6e..257a91ea 100644 --- a/xschem_library/logic/bf.sym +++ b/xschem_library/logic/bf.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/eo.sch b/xschem_library/logic/eo.sch index fdf9cfeb..f1742701 100644 --- a/xschem_library/logic/eo.sch +++ b/xschem_library/logic/eo.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/eo.sym b/xschem_library/logic/eo.sym index fe30a009..95dba6cc 100644 --- a/xschem_library/logic/eo.sym +++ b/xschem_library/logic/eo.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ff.sch b/xschem_library/logic/ff.sch index 751e98c6..cf2c786b 100644 --- a/xschem_library/logic/ff.sch +++ b/xschem_library/logic/ff.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ff.sym b/xschem_library/logic/ff.sym index 9acf1400..5dddd1e9 100644 --- a/xschem_library/logic/ff.sym +++ b/xschem_library/logic/ff.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/iv.sch b/xschem_library/logic/iv.sch index 7533773d..fc831c02 100644 --- a/xschem_library/logic/iv.sch +++ b/xschem_library/logic/iv.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/iv.sym b/xschem_library/logic/iv.sym index 3abcc7ac..f2824da4 100644 --- a/xschem_library/logic/iv.sym +++ b/xschem_library/logic/iv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/latch.sch b/xschem_library/logic/latch.sch index 1c9dd1c3..ae7bd6b8 100644 --- a/xschem_library/logic/latch.sch +++ b/xschem_library/logic/latch.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/latch.sym b/xschem_library/logic/latch.sym index afa61540..141528b1 100644 --- a/xschem_library/logic/latch.sym +++ b/xschem_library/logic/latch.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/mux21.sch b/xschem_library/logic/mux21.sch index be7cf9ba..a5137bea 100644 --- a/xschem_library/logic/mux21.sch +++ b/xschem_library/logic/mux21.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/mux21.sym b/xschem_library/logic/mux21.sym index b25c4a89..f8fce24f 100644 --- a/xschem_library/logic/mux21.sym +++ b/xschem_library/logic/mux21.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/nd2.sym b/xschem_library/logic/nd2.sym index 0fec908c..2d201990 100644 --- a/xschem_library/logic/nd2.sym +++ b/xschem_library/logic/nd2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/nr2.sym b/xschem_library/logic/nr2.sym index da519c6e..6b80e5b4 100644 --- a/xschem_library/logic/nr2.sym +++ b/xschem_library/logic/nr2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ram.sch b/xschem_library/logic/ram.sch index b402a689..4d8acd48 100644 --- a/xschem_library/logic/ram.sch +++ b/xschem_library/logic/ram.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ram.sym b/xschem_library/logic/ram.sym index 2add1c09..ce3165ae 100644 --- a/xschem_library/logic/ram.sym +++ b/xschem_library/logic/ram.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/ram_tb.sch b/xschem_library/logic/ram_tb.sch index be85f6cb..ca456d99 100644 --- a/xschem_library/logic/ram_tb.sch +++ b/xschem_library/logic/ram_tb.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/sync_reg.sch b/xschem_library/logic/sync_reg.sch index 81f7b0c4..a0798140 100644 --- a/xschem_library/logic/sync_reg.sch +++ b/xschem_library/logic/sync_reg.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/sync_reg.sym b/xschem_library/logic/sync_reg.sym index dd364649..cb9384f7 100644 --- a/xschem_library/logic/sync_reg.sym +++ b/xschem_library/logic/sync_reg.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/test_mos_verilog.sch b/xschem_library/logic/test_mos_verilog.sch index 30fedb17..f1fa694e 100644 --- a/xschem_library/logic/test_mos_verilog.sch +++ b/xschem_library/logic/test_mos_verilog.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/test_mos_verilog.sym b/xschem_library/logic/test_mos_verilog.sym index 15f37489..06e18060 100644 --- a/xschem_library/logic/test_mos_verilog.sym +++ b/xschem_library/logic/test_mos_verilog.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/test_ngspice.sch b/xschem_library/logic/test_ngspice.sch index 233157b2..96b41d63 100644 --- a/xschem_library/logic/test_ngspice.sch +++ b/xschem_library/logic/test_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/test_ngspice.sym b/xschem_library/logic/test_ngspice.sym index 48e167af..6e7624b0 100644 --- a/xschem_library/logic/test_ngspice.sym +++ b/xschem_library/logic/test_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/testbench.sch b/xschem_library/logic/testbench.sch index 9cd608a0..b9a0819e 100644 --- a/xschem_library/logic/testbench.sch +++ b/xschem_library/logic/testbench.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/logic/testbench.sym b/xschem_library/logic/testbench.sym index 48e167af..6e7624b0 100644 --- a/xschem_library/logic/testbench.sym +++ b/xschem_library/logic/testbench.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/adc.sch b/xschem_library/ngspice/adc.sch index 8a91e9e1..029ac5e1 100644 --- a/xschem_library/ngspice/adc.sch +++ b/xschem_library/ngspice/adc.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/adc.sym b/xschem_library/ngspice/adc.sym index f86eb2ca..5d538907 100644 --- a/xschem_library/ngspice/adc.sym +++ b/xschem_library/ngspice/adc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/amp_xschem.sch b/xschem_library/ngspice/amp_xschem.sch index 0b1e2100..ea82722e 100644 --- a/xschem_library/ngspice/amp_xschem.sch +++ b/xschem_library/ngspice/amp_xschem.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/and3_ngspice.sch b/xschem_library/ngspice/and3_ngspice.sch index 7de1c786..d0c29c54 100644 --- a/xschem_library/ngspice/and3_ngspice.sch +++ b/xschem_library/ngspice/and3_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/and3_ngspice.sym b/xschem_library/ngspice/and3_ngspice.sym index 84285858..9c2e3590 100644 --- a/xschem_library/ngspice/and3_ngspice.sym +++ b/xschem_library/ngspice/and3_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/and_ngspice.sch b/xschem_library/ngspice/and_ngspice.sch index 5d22b175..5078b996 100644 --- a/xschem_library/ngspice/and_ngspice.sch +++ b/xschem_library/ngspice/and_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/and_ngspice.sym b/xschem_library/ngspice/and_ngspice.sym index dd6e69c3..0a1a0481 100644 --- a/xschem_library/ngspice/and_ngspice.sym +++ b/xschem_library/ngspice/and_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/autozero_comp.sch b/xschem_library/ngspice/autozero_comp.sch index 9e593a23..8fb149ed 100644 --- a/xschem_library/ngspice/autozero_comp.sch +++ b/xschem_library/ngspice/autozero_comp.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/autozero_comp.sym b/xschem_library/ngspice/autozero_comp.sym index 6efa83c2..5d01ae14 100644 --- a/xschem_library/ngspice/autozero_comp.sym +++ b/xschem_library/ngspice/autozero_comp.sym @@ -1,4 +1,24 @@ -v {xschem version=3.4.5 file_version=1.2} +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA +} K {type=subcircuit format="@name @pinlist @symname" template="name=x1" diff --git a/xschem_library/ngspice/autozero_comp_xyce.sch b/xschem_library/ngspice/autozero_comp_xyce.sch index 768e7e5d..bd6ca4d2 100644 --- a/xschem_library/ngspice/autozero_comp_xyce.sch +++ b/xschem_library/ngspice/autozero_comp_xyce.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/buck.sch b/xschem_library/ngspice/buck.sch index 8276fe4e..c962afc3 100644 --- a/xschem_library/ngspice/buck.sch +++ b/xschem_library/ngspice/buck.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/buf_ngspice.sch b/xschem_library/ngspice/buf_ngspice.sch index e0c19aa4..290062ce 100644 --- a/xschem_library/ngspice/buf_ngspice.sch +++ b/xschem_library/ngspice/buf_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/buf_ngspice.sym b/xschem_library/ngspice/buf_ngspice.sym index 0a068d16..2fb4ad37 100644 --- a/xschem_library/ngspice/buf_ngspice.sym +++ b/xschem_library/ngspice/buf_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/colpitts_xschem.sch b/xschem_library/ngspice/colpitts_xschem.sch index ebb0b560..bca6c74a 100644 --- a/xschem_library/ngspice/colpitts_xschem.sch +++ b/xschem_library/ngspice/colpitts_xschem.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/comp_65nm.sch b/xschem_library/ngspice/comp_65nm.sch index d8b1f8af..97c80be4 100644 --- a/xschem_library/ngspice/comp_65nm.sch +++ b/xschem_library/ngspice/comp_65nm.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/comp_65nm.sym b/xschem_library/ngspice/comp_65nm.sym index f5f86582..0914a82c 100644 --- a/xschem_library/ngspice/comp_65nm.sym +++ b/xschem_library/ngspice/comp_65nm.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/comp_ngspice.sch b/xschem_library/ngspice/comp_ngspice.sch index 00a370e0..36809ee7 100644 --- a/xschem_library/ngspice/comp_ngspice.sch +++ b/xschem_library/ngspice/comp_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/comp_ngspice.sym b/xschem_library/ngspice/comp_ngspice.sym index fa2b7f01..007eb77f 100644 --- a/xschem_library/ngspice/comp_ngspice.sym +++ b/xschem_library/ngspice/comp_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/counter_6bit_ngspice.sch b/xschem_library/ngspice/counter_6bit_ngspice.sch index 033cc7a4..7f4d8931 100644 --- a/xschem_library/ngspice/counter_6bit_ngspice.sch +++ b/xschem_library/ngspice/counter_6bit_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/counter_6bit_ngspice.sym b/xschem_library/ngspice/counter_6bit_ngspice.sym index 6c767050..0fadc3bd 100644 --- a/xschem_library/ngspice/counter_6bit_ngspice.sym +++ b/xschem_library/ngspice/counter_6bit_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/delta_sigma.sch b/xschem_library/ngspice/delta_sigma.sch index 47da13d9..7270c806 100644 --- a/xschem_library/ngspice/delta_sigma.sch +++ b/xschem_library/ngspice/delta_sigma.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/delta_sigma.sym b/xschem_library/ngspice/delta_sigma.sym index 1fb5120c..3dbd3824 100644 --- a/xschem_library/ngspice/delta_sigma.sym +++ b/xschem_library/ngspice/delta_sigma.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/diff_amp.sym b/xschem_library/ngspice/diff_amp.sym index 44a0d646..d0321586 100644 --- a/xschem_library/ngspice/diff_amp.sym +++ b/xschem_library/ngspice/diff_amp.sym @@ -1,4 +1,23 @@ -v {xschem version=3.4.6RC file_version=1.2 +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA } G {} K {type=opamp_va diff --git a/xschem_library/ngspice/diode_ngspice.sch b/xschem_library/ngspice/diode_ngspice.sch index 61b13737..66415bb0 100644 --- a/xschem_library/ngspice/diode_ngspice.sch +++ b/xschem_library/ngspice/diode_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/diode_ngspice.sym b/xschem_library/ngspice/diode_ngspice.sym index 9e5d8683..002e17fe 100644 --- a/xschem_library/ngspice/diode_ngspice.sym +++ b/xschem_library/ngspice/diode_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/flip_flop_ngspice.sch b/xschem_library/ngspice/flip_flop_ngspice.sch index 8286a2ae..caa300f8 100644 --- a/xschem_library/ngspice/flip_flop_ngspice.sch +++ b/xschem_library/ngspice/flip_flop_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/flip_flop_ngspice.sym b/xschem_library/ngspice/flip_flop_ngspice.sym index 81244fc4..5e042d8a 100644 --- a/xschem_library/ngspice/flip_flop_ngspice.sym +++ b/xschem_library/ngspice/flip_flop_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/full_adder_ngspice.sch b/xschem_library/ngspice/full_adder_ngspice.sch index d3de734c..f4eabb26 100644 --- a/xschem_library/ngspice/full_adder_ngspice.sch +++ b/xschem_library/ngspice/full_adder_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/full_adder_ngspice.sym b/xschem_library/ngspice/full_adder_ngspice.sym index 13ead6d8..49c935f9 100644 --- a/xschem_library/ngspice/full_adder_ngspice.sym +++ b/xschem_library/ngspice/full_adder_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/half_adder_ngspice.sch b/xschem_library/ngspice/half_adder_ngspice.sch index 9fc4e892..67056c09 100644 --- a/xschem_library/ngspice/half_adder_ngspice.sch +++ b/xschem_library/ngspice/half_adder_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/half_adder_ngspice.sym b/xschem_library/ngspice/half_adder_ngspice.sym index b024694d..baa1dc9a 100644 --- a/xschem_library/ngspice/half_adder_ngspice.sym +++ b/xschem_library/ngspice/half_adder_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/hpf_xschem.sch b/xschem_library/ngspice/hpf_xschem.sch index d7298205..c96e01d1 100644 --- a/xschem_library/ngspice/hpf_xschem.sch +++ b/xschem_library/ngspice/hpf_xschem.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/inv-2.sym b/xschem_library/ngspice/inv-2.sym index 97010653..bf81046d 100644 --- a/xschem_library/ngspice/inv-2.sym +++ b/xschem_library/ngspice/inv-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/inv_ngspice.sch b/xschem_library/ngspice/inv_ngspice.sch index 29b1864b..0d0afeaa 100644 --- a/xschem_library/ngspice/inv_ngspice.sch +++ b/xschem_library/ngspice/inv_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/inv_ngspice.sym b/xschem_library/ngspice/inv_ngspice.sym index 28a81038..c65dc641 100644 --- a/xschem_library/ngspice/inv_ngspice.sym +++ b/xschem_library/ngspice/inv_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/keeper_ngspice.sch b/xschem_library/ngspice/keeper_ngspice.sch index ae250cb3..cc20b6c2 100644 --- a/xschem_library/ngspice/keeper_ngspice.sch +++ b/xschem_library/ngspice/keeper_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/keeper_ngspice.sym b/xschem_library/ngspice/keeper_ngspice.sym index 691b4561..e4977f1c 100644 --- a/xschem_library/ngspice/keeper_ngspice.sym +++ b/xschem_library/ngspice/keeper_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/led_driver.sch b/xschem_library/ngspice/led_driver.sch index 3fa50277..95c70d02 100644 --- a/xschem_library/ngspice/led_driver.sch +++ b/xschem_library/ngspice/led_driver.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/lm741.sym b/xschem_library/ngspice/lm741.sym index 8a71a4aa..fcf2dc2a 100644 --- a/xschem_library/ngspice/lm741.sym +++ b/xschem_library/ngspice/lm741.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nand_ngspice.sch b/xschem_library/ngspice/nand_ngspice.sch index 4907eb08..caa68194 100644 --- a/xschem_library/ngspice/nand_ngspice.sch +++ b/xschem_library/ngspice/nand_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nand_ngspice.sym b/xschem_library/ngspice/nand_ngspice.sym index 980cbf93..fea37e5d 100644 --- a/xschem_library/ngspice/nand_ngspice.sym +++ b/xschem_library/ngspice/nand_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nmos4-v.sym b/xschem_library/ngspice/nmos4-v.sym index 50c007bd..f53bad1e 100644 --- a/xschem_library/ngspice/nmos4-v.sym +++ b/xschem_library/ngspice/nmos4-v.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nor_ngspice.sch b/xschem_library/ngspice/nor_ngspice.sch index 1ad416e0..3915f274 100644 --- a/xschem_library/ngspice/nor_ngspice.sch +++ b/xschem_library/ngspice/nor_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/nor_ngspice.sym b/xschem_library/ngspice/nor_ngspice.sym index dcc10111..2fa0e4cc 100644 --- a/xschem_library/ngspice/nor_ngspice.sym +++ b/xschem_library/ngspice/nor_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/opamp_65nm.sch b/xschem_library/ngspice/opamp_65nm.sch index fd57a9fd..6bbd6d58 100644 --- a/xschem_library/ngspice/opamp_65nm.sch +++ b/xschem_library/ngspice/opamp_65nm.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/opamp_65nm.sym b/xschem_library/ngspice/opamp_65nm.sym index f5f86582..0914a82c 100644 --- a/xschem_library/ngspice/opamp_65nm.sym +++ b/xschem_library/ngspice/opamp_65nm.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/or_ngspice.sch b/xschem_library/ngspice/or_ngspice.sch index badcf5ee..715fddd7 100644 --- a/xschem_library/ngspice/or_ngspice.sch +++ b/xschem_library/ngspice/or_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/or_ngspice.sym b/xschem_library/ngspice/or_ngspice.sym index 40ed85e2..e241457e 100644 --- a/xschem_library/ngspice/or_ngspice.sym +++ b/xschem_library/ngspice/or_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/passgate.sym b/xschem_library/ngspice/passgate.sym index cbfc21ab..0fbd9dcf 100644 --- a/xschem_library/ngspice/passgate.sym +++ b/xschem_library/ngspice/passgate.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/pmos4-v.sym b/xschem_library/ngspice/pmos4-v.sym index 9e0fa798..d21398d4 100644 --- a/xschem_library/ngspice/pmos4-v.sym +++ b/xschem_library/ngspice/pmos4-v.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/pv_ngspice.sch b/xschem_library/ngspice/pv_ngspice.sch index 82ba36f2..cab6b854 100644 --- a/xschem_library/ngspice/pv_ngspice.sch +++ b/xschem_library/ngspice/pv_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/pv_ngspice.sym b/xschem_library/ngspice/pv_ngspice.sym index bf0dcd3b..fc42d843 100644 --- a/xschem_library/ngspice/pv_ngspice.sym +++ b/xschem_library/ngspice/pv_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/solar_panel.sch b/xschem_library/ngspice/solar_panel.sch index 91e03ac9..68f7a68f 100644 --- a/xschem_library/ngspice/solar_panel.sch +++ b/xschem_library/ngspice/solar_panel.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.6RC file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/solar_panel.sym b/xschem_library/ngspice/solar_panel.sym index 456a9740..b25ae6f6 100644 --- a/xschem_library/ngspice/solar_panel.sym +++ b/xschem_library/ngspice/solar_panel.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/solar_panel_xyce.sch b/xschem_library/ngspice/solar_panel_xyce.sch index c93b59f3..485047c7 100644 --- a/xschem_library/ngspice/solar_panel_xyce.sch +++ b/xschem_library/ngspice/solar_panel_xyce.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/tb_diff_amp.sch b/xschem_library/ngspice/tb_diff_amp.sch index 86c92a6f..a41b144d 100644 --- a/xschem_library/ngspice/tb_diff_amp.sch +++ b/xschem_library/ngspice/tb_diff_amp.sch @@ -1,4 +1,23 @@ -v {xschem version=3.4.6RC file_version=1.2 +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA } G {} K {} diff --git a/xschem_library/ngspice/tb_diff_amp.sym b/xschem_library/ngspice/tb_diff_amp.sym index 3ca9999d..3dd49617 100644 --- a/xschem_library/ngspice/tb_diff_amp.sym +++ b/xschem_library/ngspice/tb_diff_amp.sym @@ -1,4 +1,24 @@ -v {xschem version=3.4.6RC file_version=1.2} +v {xschem version=3.4.6 file_version=1.2 +* +* This file is part of XSCHEM, +* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit +* simulation. +* Copyright (C) 1998-2024 Stefan Frederik Schippers +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; either version 2 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA +} K {type=subcircuit format="@name @pinlist @symname" template="name=x1" diff --git a/xschem_library/ngspice/xnor_ngspice.sch b/xschem_library/ngspice/xnor_ngspice.sch index c57db1f9..29592cdb 100644 --- a/xschem_library/ngspice/xnor_ngspice.sch +++ b/xschem_library/ngspice/xnor_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/xnor_ngspice.sym b/xschem_library/ngspice/xnor_ngspice.sym index de8dc0e8..7da1d77d 100644 --- a/xschem_library/ngspice/xnor_ngspice.sym +++ b/xschem_library/ngspice/xnor_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/xor_ngspice.sch b/xschem_library/ngspice/xor_ngspice.sch index 356bd2f8..df3e4850 100644 --- a/xschem_library/ngspice/xor_ngspice.sch +++ b/xschem_library/ngspice/xor_ngspice.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/ngspice/xor_ngspice.sym b/xschem_library/ngspice/xor_ngspice.sym index d372b33c..a5fa8265 100644 --- a/xschem_library/ngspice/xor_ngspice.sym +++ b/xschem_library/ngspice/xor_ngspice.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/0_pcb_top.sch b/xschem_library/pcb/0_pcb_top.sch index 6d09ff11..54842676 100644 --- a/xschem_library/pcb/0_pcb_top.sch +++ b/xschem_library/pcb/0_pcb_top.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/74ls00-2.sym b/xschem_library/pcb/74ls00-2.sym index ab81c2b3..b4607a91 100644 --- a/xschem_library/pcb/74ls00-2.sym +++ b/xschem_library/pcb/74ls00-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/74ls00.sym b/xschem_library/pcb/74ls00.sym index 039a8c8b..c4e0e995 100644 --- a/xschem_library/pcb/74ls00.sym +++ b/xschem_library/pcb/74ls00.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/7805.sym b/xschem_library/pcb/7805.sym index 2bbadeab..791168df 100644 --- a/xschem_library/pcb/7805.sym +++ b/xschem_library/pcb/7805.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/bc817.sym b/xschem_library/pcb/bc817.sym index d25c0eae..61d1ca51 100644 --- a/xschem_library/pcb/bc817.sym +++ b/xschem_library/pcb/bc817.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/hierarchical_tedax.sch b/xschem_library/pcb/hierarchical_tedax.sch index 0e315f5a..511d820a 100644 --- a/xschem_library/pcb/hierarchical_tedax.sch +++ b/xschem_library/pcb/hierarchical_tedax.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/hierarchical_tedax.sym b/xschem_library/pcb/hierarchical_tedax.sym index a382b3bd..fb9e32d2 100644 --- a/xschem_library/pcb/hierarchical_tedax.sym +++ b/xschem_library/pcb/hierarchical_tedax.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/lm358.sym b/xschem_library/pcb/lm358.sym index 1c2fd670..9f04a034 100644 --- a/xschem_library/pcb/lm358.sym +++ b/xschem_library/pcb/lm358.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_current_protection.sch b/xschem_library/pcb/pcb_current_protection.sch index 004b1302..a3b15574 100644 --- a/xschem_library/pcb/pcb_current_protection.sch +++ b/xschem_library/pcb/pcb_current_protection.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_current_protection.sym b/xschem_library/pcb/pcb_current_protection.sym index 0370e5d3..266bef09 100644 --- a/xschem_library/pcb/pcb_current_protection.sym +++ b/xschem_library/pcb/pcb_current_protection.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_current_protection_embed.sch b/xschem_library/pcb/pcb_current_protection_embed.sch index ffaf2111..73e520d3 100644 --- a/xschem_library/pcb/pcb_current_protection_embed.sch +++ b/xschem_library/pcb/pcb_current_protection_embed.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_test1.sch b/xschem_library/pcb/pcb_test1.sch index 89a0fc8a..15d4ace6 100644 --- a/xschem_library/pcb/pcb_test1.sch +++ b/xschem_library/pcb/pcb_test1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_test1.sym b/xschem_library/pcb/pcb_test1.sym index 2956e4cb..79c1cd6e 100644 --- a/xschem_library/pcb/pcb_test1.sym +++ b/xschem_library/pcb/pcb_test1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_test1_embed.sch b/xschem_library/pcb/pcb_test1_embed.sch index b05d02e1..ee347733 100644 --- a/xschem_library/pcb/pcb_test1_embed.sch +++ b/xschem_library/pcb/pcb_test1_embed.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_test2.sch b/xschem_library/pcb/pcb_test2.sch index 71595f1b..3860c7b9 100644 --- a/xschem_library/pcb/pcb_test2.sch +++ b/xschem_library/pcb/pcb_test2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_voltage_protection.sch b/xschem_library/pcb/pcb_voltage_protection.sch index d752850b..5c871b95 100644 --- a/xschem_library/pcb/pcb_voltage_protection.sch +++ b/xschem_library/pcb/pcb_voltage_protection.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_voltage_protection.sym b/xschem_library/pcb/pcb_voltage_protection.sym index ce06fdac..a02091c1 100644 --- a/xschem_library/pcb/pcb_voltage_protection.sym +++ b/xschem_library/pcb/pcb_voltage_protection.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/pcb_voltage_protection_embed.sch b/xschem_library/pcb/pcb_voltage_protection_embed.sch index d118841f..f41735e3 100644 --- a/xschem_library/pcb/pcb_voltage_protection_embed.sch +++ b/xschem_library/pcb/pcb_voltage_protection_embed.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/reg.sch b/xschem_library/pcb/reg.sch index b51a0ab1..c75dfd14 100644 --- a/xschem_library/pcb/reg.sch +++ b/xschem_library/pcb/reg.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/si2306.sym b/xschem_library/pcb/si2306.sym index 36ff49ed..67be9b08 100644 --- a/xschem_library/pcb/si2306.sym +++ b/xschem_library/pcb/si2306.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/voltage_protection.sch b/xschem_library/pcb/voltage_protection.sch index 780c5005..a0dc2dfb 100644 --- a/xschem_library/pcb/voltage_protection.sch +++ b/xschem_library/pcb/voltage_protection.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/pcb/voltage_protection.sym b/xschem_library/pcb/voltage_protection.sym index 9d933294..a78401e2 100644 --- a/xschem_library/pcb/voltage_protection.sym +++ b/xschem_library/pcb/voltage_protection.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/LD2QHDX4stef.sch b/xschem_library/rom8k/LD2QHDX4stef.sch index cd9575e9..1e14c05a 100644 --- a/xschem_library/rom8k/LD2QHDX4stef.sch +++ b/xschem_library/rom8k/LD2QHDX4stef.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/LD2QHDX4stef.sym b/xschem_library/rom8k/LD2QHDX4stef.sym index 279140b6..5e802f70 100644 --- a/xschem_library/rom8k/LD2QHDX4stef.sym +++ b/xschem_library/rom8k/LD2QHDX4stef.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/bts.sch b/xschem_library/rom8k/bts.sch index f31d323b..02f5ac1b 100644 --- a/xschem_library/rom8k/bts.sch +++ b/xschem_library/rom8k/bts.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/bts.sym b/xschem_library/rom8k/bts.sym index bffccb8d..51dd2017 100644 --- a/xschem_library/rom8k/bts.sym +++ b/xschem_library/rom8k/bts.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnand2.sch b/xschem_library/rom8k/lvnand2.sch index f92ab1fc..bac4e2e5 100644 --- a/xschem_library/rom8k/lvnand2.sch +++ b/xschem_library/rom8k/lvnand2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnand2.sym b/xschem_library/rom8k/lvnand2.sym index 429b5826..2fa69bb9 100644 --- a/xschem_library/rom8k/lvnand2.sym +++ b/xschem_library/rom8k/lvnand2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnand3.sch b/xschem_library/rom8k/lvnand3.sch index 1750bb06..b0d5ab3e 100644 --- a/xschem_library/rom8k/lvnand3.sch +++ b/xschem_library/rom8k/lvnand3.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnand3.sym b/xschem_library/rom8k/lvnand3.sym index d8bb557c..1ff74d34 100644 --- a/xschem_library/rom8k/lvnand3.sym +++ b/xschem_library/rom8k/lvnand3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnor2.sch b/xschem_library/rom8k/lvnor2.sch index 5c7e1d91..44e64821 100644 --- a/xschem_library/rom8k/lvnor2.sch +++ b/xschem_library/rom8k/lvnor2.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnor2.sym b/xschem_library/rom8k/lvnor2.sym index 762d4c8a..28cea362 100644 --- a/xschem_library/rom8k/lvnor2.sym +++ b/xschem_library/rom8k/lvnor2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnot.sch b/xschem_library/rom8k/lvnot.sch index c116dd5f..5bdb109a 100644 --- a/xschem_library/rom8k/lvnot.sch +++ b/xschem_library/rom8k/lvnot.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/lvnot.sym b/xschem_library/rom8k/lvnot.sym index eab95fe4..59321d63 100644 --- a/xschem_library/rom8k/lvnot.sym +++ b/xschem_library/rom8k/lvnot.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/n.sym b/xschem_library/rom8k/n.sym index fa1fceec..8cf3e1c8 100644 --- a/xschem_library/rom8k/n.sym +++ b/xschem_library/rom8k/n.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/nlv.sym b/xschem_library/rom8k/nlv.sym index c384d909..a417fc5b 100644 --- a/xschem_library/rom8k/nlv.sym +++ b/xschem_library/rom8k/nlv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/nlv4t.sym b/xschem_library/rom8k/nlv4t.sym index dfcdc660..a1ac1787 100644 --- a/xschem_library/rom8k/nlv4t.sym +++ b/xschem_library/rom8k/nlv4t.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/p.sym b/xschem_library/rom8k/p.sym index a2ea830b..5b2b8c6c 100644 --- a/xschem_library/rom8k/p.sym +++ b/xschem_library/rom8k/p.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/passhs.sch b/xschem_library/rom8k/passhs.sch index 255ae0f3..9b384bff 100644 --- a/xschem_library/rom8k/passhs.sch +++ b/xschem_library/rom8k/passhs.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/passhs.sym b/xschem_library/rom8k/passhs.sym index 64c23297..7f631836 100644 --- a/xschem_library/rom8k/passhs.sym +++ b/xschem_library/rom8k/passhs.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/plv.sym b/xschem_library/rom8k/plv.sym index b46bd6fb..a18ce0c5 100644 --- a/xschem_library/rom8k/plv.sym +++ b/xschem_library/rom8k/plv.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/plv4t.sym b/xschem_library/rom8k/plv4t.sym index a12fee02..1aa19a4f 100644 --- a/xschem_library/rom8k/plv4t.sym +++ b/xschem_library/rom8k/plv4t.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_addlatch.sch b/xschem_library/rom8k/rom2_addlatch.sch index 8238bb87..bf57d4e4 100644 --- a/xschem_library/rom8k/rom2_addlatch.sch +++ b/xschem_library/rom8k/rom2_addlatch.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_addlatch.sym b/xschem_library/rom8k/rom2_addlatch.sym index 3f7bf4e5..d39cee58 100644 --- a/xschem_library/rom8k/rom2_addlatch.sym +++ b/xschem_library/rom8k/rom2_addlatch.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_col_prech.sch b/xschem_library/rom8k/rom2_col_prech.sch index d89826ce..5b4c2b6d 100644 --- a/xschem_library/rom8k/rom2_col_prech.sch +++ b/xschem_library/rom8k/rom2_col_prech.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_col_prech.sym b/xschem_library/rom8k/rom2_col_prech.sym index e62c6392..7243d8df 100644 --- a/xschem_library/rom8k/rom2_col_prech.sym +++ b/xschem_library/rom8k/rom2_col_prech.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_coldec.sch b/xschem_library/rom8k/rom2_coldec.sch index 67de8057..ac6f57a3 100644 --- a/xschem_library/rom8k/rom2_coldec.sch +++ b/xschem_library/rom8k/rom2_coldec.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_coldec.sym b/xschem_library/rom8k/rom2_coldec.sym index 14848521..e986e38b 100644 --- a/xschem_library/rom8k/rom2_coldec.sym +++ b/xschem_library/rom8k/rom2_coldec.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_coldec_ref.sch b/xschem_library/rom8k/rom2_coldec_ref.sch index d83d88f6..de0eb961 100644 --- a/xschem_library/rom8k/rom2_coldec_ref.sch +++ b/xschem_library/rom8k/rom2_coldec_ref.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_coldec_ref.sym b/xschem_library/rom8k/rom2_coldec_ref.sym index ebbe2339..d1ffc791 100644 --- a/xschem_library/rom8k/rom2_coldec_ref.sym +++ b/xschem_library/rom8k/rom2_coldec_ref.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_ctrl.sch b/xschem_library/rom8k/rom2_ctrl.sch index 3bf958c0..b45041e9 100644 --- a/xschem_library/rom8k/rom2_ctrl.sch +++ b/xschem_library/rom8k/rom2_ctrl.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_ctrl.sym b/xschem_library/rom8k/rom2_ctrl.sym index a161e6cb..d9475a5c 100644 --- a/xschem_library/rom8k/rom2_ctrl.sym +++ b/xschem_library/rom8k/rom2_ctrl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec1.sch b/xschem_library/rom8k/rom2_predec1.sch index ece8aa28..48a071d9 100644 --- a/xschem_library/rom8k/rom2_predec1.sch +++ b/xschem_library/rom8k/rom2_predec1.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec1.sym b/xschem_library/rom8k/rom2_predec1.sym index 70090da9..630760ce 100644 --- a/xschem_library/rom8k/rom2_predec1.sym +++ b/xschem_library/rom8k/rom2_predec1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec3.sch b/xschem_library/rom8k/rom2_predec3.sch index 931583be..71e71279 100644 --- a/xschem_library/rom8k/rom2_predec3.sch +++ b/xschem_library/rom8k/rom2_predec3.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec3.sym b/xschem_library/rom8k/rom2_predec3.sym index 70090da9..630760ce 100644 --- a/xschem_library/rom8k/rom2_predec3.sym +++ b/xschem_library/rom8k/rom2_predec3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec4.sch b/xschem_library/rom8k/rom2_predec4.sch index 846e63aa..048d6a8a 100644 --- a/xschem_library/rom8k/rom2_predec4.sch +++ b/xschem_library/rom8k/rom2_predec4.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_predec4.sym b/xschem_library/rom8k/rom2_predec4.sym index 1de1c6cf..9c6d165c 100644 --- a/xschem_library/rom8k/rom2_predec4.sym +++ b/xschem_library/rom8k/rom2_predec4.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_sa.sch b/xschem_library/rom8k/rom2_sa.sch index d617d052..d6f5573a 100644 --- a/xschem_library/rom8k/rom2_sa.sch +++ b/xschem_library/rom8k/rom2_sa.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_sa.sym b/xschem_library/rom8k/rom2_sa.sym index f6392add..a7ab71b3 100644 --- a/xschem_library/rom8k/rom2_sa.sym +++ b/xschem_library/rom8k/rom2_sa.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_sacell.sch b/xschem_library/rom8k/rom2_sacell.sch index 92f09ad1..ad02ced7 100644 --- a/xschem_library/rom8k/rom2_sacell.sch +++ b/xschem_library/rom8k/rom2_sacell.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom2_sacell.sym b/xschem_library/rom8k/rom2_sacell.sym index 22c180e0..775768dc 100644 --- a/xschem_library/rom8k/rom2_sacell.sym +++ b/xschem_library/rom8k/rom2_sacell.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_array.sch b/xschem_library/rom8k/rom3_array.sch index 48a6f06f..9e55bed5 100644 --- a/xschem_library/rom8k/rom3_array.sch +++ b/xschem_library/rom8k/rom3_array.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_array.sym b/xschem_library/rom8k/rom3_array.sym index 5bf78f99..8a9178d4 100644 --- a/xschem_library/rom8k/rom3_array.sym +++ b/xschem_library/rom8k/rom3_array.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_array_ref.sch b/xschem_library/rom8k/rom3_array_ref.sch index 3a7010e8..0292129d 100644 --- a/xschem_library/rom8k/rom3_array_ref.sch +++ b/xschem_library/rom8k/rom3_array_ref.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_array_ref.sym b/xschem_library/rom8k/rom3_array_ref.sym index cec511e5..ad679dad 100644 --- a/xschem_library/rom8k/rom3_array_ref.sym +++ b/xschem_library/rom8k/rom3_array_ref.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_rowdec.sch b/xschem_library/rom8k/rom3_rowdec.sch index b6166317..aa4f1501 100644 --- a/xschem_library/rom8k/rom3_rowdec.sch +++ b/xschem_library/rom8k/rom3_rowdec.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom3_rowdec.sym b/xschem_library/rom8k/rom3_rowdec.sym index 2df71f2a..0eb33ce1 100644 --- a/xschem_library/rom8k/rom3_rowdec.sym +++ b/xschem_library/rom8k/rom3_rowdec.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom8k.sch b/xschem_library/rom8k/rom8k.sch index efbaa2f6..ea849252 100644 --- a/xschem_library/rom8k/rom8k.sch +++ b/xschem_library/rom8k/rom8k.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rom8k/rom8k.sym b/xschem_library/rom8k/rom8k.sym index d5ec2270..8e8119b9 100644 --- a/xschem_library/rom8k/rom8k.sym +++ b/xschem_library/rom8k/rom8k.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rulz-r8c33/ft232rl.sym b/xschem_library/rulz-r8c33/ft232rl.sym index 987c1141..a33a5f27 100644 --- a/xschem_library/rulz-r8c33/ft232rl.sym +++ b/xschem_library/rulz-r8c33/ft232rl.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rulz-r8c33/r8c-33c.sym b/xschem_library/rulz-r8c33/r8c-33c.sym index 26a0857e..8854bd25 100644 --- a/xschem_library/rulz-r8c33/r8c-33c.sym +++ b/xschem_library/rulz-r8c33/r8c-33c.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rulz-r8c33/rulz-r8c33.sch b/xschem_library/rulz-r8c33/rulz-r8c33.sch index 16ada7f1..e5b3e81c 100644 --- a/xschem_library/rulz-r8c33/rulz-r8c33.sch +++ b/xschem_library/rulz-r8c33/rulz-r8c33.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/rulz-r8c33/usb-minib.sym b/xschem_library/rulz-r8c33/usb-minib.sym index c31f49c4..2d586768 100644 --- a/xschem_library/rulz-r8c33/usb-minib.sym +++ b/xschem_library/rulz-r8c33/usb-minib.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/24cxx.sym b/xschem_library/xTAG/24cxx.sym index 712abb38..87e3aec1 100644 --- a/xschem_library/xTAG/24cxx.sym +++ b/xschem_library/xTAG/24cxx.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/7414.sym b/xschem_library/xTAG/7414.sym index 52a0e63f..927d3ffe 100644 --- a/xschem_library/xTAG/7414.sym +++ b/xschem_library/xTAG/7414.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/cy7c64603-52nc.sym b/xschem_library/xTAG/cy7c64603-52nc.sym index 3dd6f783..fd8e4315 100644 --- a/xschem_library/xTAG/cy7c64603-52nc.sym +++ b/xschem_library/xTAG/cy7c64603-52nc.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/max882.sym b/xschem_library/xTAG/max882.sym index d72a0ed9..ce6bbc9e 100644 --- a/xschem_library/xTAG/max882.sym +++ b/xschem_library/xTAG/max882.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/sn75240pw.sym b/xschem_library/xTAG/sn75240pw.sym index a190b510..f71f87ae 100644 --- a/xschem_library/xTAG/sn75240pw.sym +++ b/xschem_library/xTAG/sn75240pw.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-consio.sch b/xschem_library/xTAG/xTAG-consio.sch index 2d00d5b8..e966498f 100644 --- a/xschem_library/xTAG/xTAG-consio.sch +++ b/xschem_library/xTAG/xTAG-consio.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-consio.sym b/xschem_library/xTAG/xTAG-consio.sym index 11900f89..c15bbeb8 100644 --- a/xschem_library/xTAG/xTAG-consio.sym +++ b/xschem_library/xTAG/xTAG-consio.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-jtagio.sch b/xschem_library/xTAG/xTAG-jtagio.sch index 65601d9f..968d1df3 100644 --- a/xschem_library/xTAG/xTAG-jtagio.sch +++ b/xschem_library/xTAG/xTAG-jtagio.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-jtagio.sym b/xschem_library/xTAG/xTAG-jtagio.sym index b807da3a..36902ea4 100644 --- a/xschem_library/xTAG/xTAG-jtagio.sym +++ b/xschem_library/xTAG/xTAG-jtagio.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-psu.sch b/xschem_library/xTAG/xTAG-psu.sch index 660babc2..ca664ec5 100644 --- a/xschem_library/xTAG/xTAG-psu.sch +++ b/xschem_library/xTAG/xTAG-psu.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-psu.sym b/xschem_library/xTAG/xTAG-psu.sym index f9196e51..5cd31f94 100644 --- a/xschem_library/xTAG/xTAG-psu.sym +++ b/xschem_library/xTAG/xTAG-psu.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-ucont.sch b/xschem_library/xTAG/xTAG-ucont.sch index 3c84afad..5f61e9f3 100644 --- a/xschem_library/xTAG/xTAG-ucont.sch +++ b/xschem_library/xTAG/xTAG-ucont.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG-ucont.sym b/xschem_library/xTAG/xTAG-ucont.sym index 04389e65..a18be548 100644 --- a/xschem_library/xTAG/xTAG-ucont.sym +++ b/xschem_library/xTAG/xTAG-ucont.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xTAG/xTAG.sch b/xschem_library/xTAG/xTAG.sch index cb2b4f66..78e8b05e 100644 --- a/xschem_library/xTAG/xTAG.sch +++ b/xschem_library/xTAG/xTAG.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/and2_1.sym b/xschem_library/xschem_simulator/and2_1.sym index 3cecbcc4..0301da0e 100644 --- a/xschem_library/xschem_simulator/and2_1.sym +++ b/xschem_library/xschem_simulator/and2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/and3_1.sym b/xschem_library/xschem_simulator/and3_1.sym index dbc301f8..d9311418 100644 --- a/xschem_library/xschem_simulator/and3_1.sym +++ b/xschem_library/xschem_simulator/and3_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/and4_1.sym b/xschem_library/xschem_simulator/and4_1.sym index de39ac12..8b304c09 100644 --- a/xschem_library/xschem_simulator/and4_1.sym +++ b/xschem_library/xschem_simulator/and4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dev-1.sym b/xschem_library/xschem_simulator/dev-1.sym index 898f6e1f..9e39ee09 100644 --- a/xschem_library/xschem_simulator/dev-1.sym +++ b/xschem_library/xschem_simulator/dev-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dev-2.sym b/xschem_library/xschem_simulator/dev-2.sym index 6c3a3ca3..d46bc288 100644 --- a/xschem_library/xschem_simulator/dev-2.sym +++ b/xschem_library/xschem_simulator/dev-2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dfrbp_1.sym b/xschem_library/xschem_simulator/dfrbp_1.sym index 69438f4f..c2732e85 100644 --- a/xschem_library/xschem_simulator/dfrbp_1.sym +++ b/xschem_library/xschem_simulator/dfrbp_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dfrtp_1.sym b/xschem_library/xschem_simulator/dfrtp_1.sym index c6a97216..1d9f9bc7 100644 --- a/xschem_library/xschem_simulator/dfrtp_1.sym +++ b/xschem_library/xschem_simulator/dfrtp_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/diode_3.sym b/xschem_library/xschem_simulator/diode_3.sym index cc16db36..7d133693 100644 --- a/xschem_library/xschem_simulator/diode_3.sym +++ b/xschem_library/xschem_simulator/diode_3.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dlrtn_1.sym b/xschem_library/xschem_simulator/dlrtn_1.sym index a06942e4..56bd0ef1 100644 --- a/xschem_library/xschem_simulator/dlrtn_1.sym +++ b/xschem_library/xschem_simulator/dlrtn_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/dlrtp_1.sym b/xschem_library/xschem_simulator/dlrtp_1.sym index 51151d41..4ffbfbe2 100644 --- a/xschem_library/xschem_simulator/dlrtp_1.sym +++ b/xschem_library/xschem_simulator/dlrtp_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/einvp_1.sym b/xschem_library/xschem_simulator/einvp_1.sym index 60f4b18c..f8fd9481 100644 --- a/xschem_library/xschem_simulator/einvp_1.sym +++ b/xschem_library/xschem_simulator/einvp_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/fa_1.sym b/xschem_library/xschem_simulator/fa_1.sym index ed9ce704..83d65a6e 100644 --- a/xschem_library/xschem_simulator/fa_1.sym +++ b/xschem_library/xschem_simulator/fa_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/giant_label.sym b/xschem_library/xschem_simulator/giant_label.sym index 2c519947..d5be315a 100644 --- a/xschem_library/xschem_simulator/giant_label.sym +++ b/xschem_library/xschem_simulator/giant_label.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/giant_label2.sym b/xschem_library/xschem_simulator/giant_label2.sym index 4ebc6486..56fb9173 100644 --- a/xschem_library/xschem_simulator/giant_label2.sym +++ b/xschem_library/xschem_simulator/giant_label2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/inv_2.sym b/xschem_library/xschem_simulator/inv_2.sym index 3d146f9c..230cae03 100644 --- a/xschem_library/xschem_simulator/inv_2.sym +++ b/xschem_library/xschem_simulator/inv_2.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/invert-1.sym b/xschem_library/xschem_simulator/invert-1.sym index 4a8b5f6a..e505aafe 100644 --- a/xschem_library/xschem_simulator/invert-1.sym +++ b/xschem_library/xschem_simulator/invert-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/logic_test.sch b/xschem_library/xschem_simulator/logic_test.sch index 35b556c9..778bed61 100644 --- a/xschem_library/xschem_simulator/logic_test.sch +++ b/xschem_library/xschem_simulator/logic_test.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/logic_test.sym b/xschem_library/xschem_simulator/logic_test.sym index 1450cc1e..48c6c175 100644 --- a/xschem_library/xschem_simulator/logic_test.sym +++ b/xschem_library/xschem_simulator/logic_test.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/mux2_1.sym b/xschem_library/xschem_simulator/mux2_1.sym index 0209f13d..6d4a8bf9 100644 --- a/xschem_library/xschem_simulator/mux2_1.sym +++ b/xschem_library/xschem_simulator/mux2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/nand2_1.sym b/xschem_library/xschem_simulator/nand2_1.sym index 28f3bd4d..615df86b 100644 --- a/xschem_library/xschem_simulator/nand2_1.sym +++ b/xschem_library/xschem_simulator/nand2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/nand3_1.sym b/xschem_library/xschem_simulator/nand3_1.sym index 8b533436..7bbe7251 100644 --- a/xschem_library/xschem_simulator/nand3_1.sym +++ b/xschem_library/xschem_simulator/nand3_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/nand4_1.sym b/xschem_library/xschem_simulator/nand4_1.sym index 764ff1e4..217f8259 100644 --- a/xschem_library/xschem_simulator/nand4_1.sym +++ b/xschem_library/xschem_simulator/nand4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/nor4_1.sym b/xschem_library/xschem_simulator/nor4_1.sym index 1d2dac26..4e5b0b4b 100644 --- a/xschem_library/xschem_simulator/nor4_1.sym +++ b/xschem_library/xschem_simulator/nor4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/ntrans.sym b/xschem_library/xschem_simulator/ntrans.sym index 6cafa539..600c8ad2 100644 --- a/xschem_library/xschem_simulator/ntrans.sym +++ b/xschem_library/xschem_simulator/ntrans.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/o21ai_1.sym b/xschem_library/xschem_simulator/o21ai_1.sym index fe37a2d9..effc086a 100644 --- a/xschem_library/xschem_simulator/o21ai_1.sym +++ b/xschem_library/xschem_simulator/o21ai_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/or4_1.sym b/xschem_library/xschem_simulator/or4_1.sym index 5bf5fea5..d0657ab6 100644 --- a/xschem_library/xschem_simulator/or4_1.sym +++ b/xschem_library/xschem_simulator/or4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/ptrans.sym b/xschem_library/xschem_simulator/ptrans.sym index 6f0483ae..4c61868d 100644 --- a/xschem_library/xschem_simulator/ptrans.sym +++ b/xschem_library/xschem_simulator/ptrans.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/segment.sym b/xschem_library/xschem_simulator/segment.sym index fb74f928..29a9ec29 100644 --- a/xschem_library/xschem_simulator/segment.sym +++ b/xschem_library/xschem_simulator/segment.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/simulate_ff.sch b/xschem_library/xschem_simulator/simulate_ff.sch index 523d9905..773a4ece 100644 --- a/xschem_library/xschem_simulator/simulate_ff.sch +++ b/xschem_library/xschem_simulator/simulate_ff.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.5 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/simulate_ff.sym b/xschem_library/xschem_simulator/simulate_ff.sym index 1fb5120c..3dbd3824 100644 --- a/xschem_library/xschem_simulator/simulate_ff.sym +++ b/xschem_library/xschem_simulator/simulate_ff.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/switch-1.sym b/xschem_library/xschem_simulator/switch-1.sym index 22b41f4a..68879101 100644 --- a/xschem_library/xschem_simulator/switch-1.sym +++ b/xschem_library/xschem_simulator/switch-1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/switch_level_sim.sch b/xschem_library/xschem_simulator/switch_level_sim.sch index 142f292f..420f726a 100644 --- a/xschem_library/xschem_simulator/switch_level_sim.sch +++ b/xschem_library/xschem_simulator/switch_level_sim.sch @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/xnor2_1.sym b/xschem_library/xschem_simulator/xnor2_1.sym index cd39fc88..4926d8ec 100644 --- a/xschem_library/xschem_simulator/xnor2_1.sym +++ b/xschem_library/xschem_simulator/xnor2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/xor2_1.sym b/xschem_library/xschem_simulator/xor2_1.sym index f9146d84..b3f6666e 100644 --- a/xschem_library/xschem_simulator/xor2_1.sym +++ b/xschem_library/xschem_simulator/xor2_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/xor3_1.sym b/xschem_library/xschem_simulator/xor3_1.sym index 3ebcc077..e6fafc13 100644 --- a/xschem_library/xschem_simulator/xor3_1.sym +++ b/xschem_library/xschem_simulator/xor3_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/xschem_library/xschem_simulator/xor4_1.sym b/xschem_library/xschem_simulator/xor4_1.sym index fa7ad2da..83480161 100644 --- a/xschem_library/xschem_simulator/xor4_1.sym +++ b/xschem_library/xschem_simulator/xor4_1.sym @@ -3,7 +3,7 @@ v {xschem version=3.4.4 file_version=1.2 * This file is part of XSCHEM, * a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit * simulation. -* Copyright (C) 1998-2023 Stefan Frederik Schippers +* Copyright (C) 1998-2024 Stefan Frederik Schippers * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by